Showing papers on "Anodic bonding published in 1994"

Vacuum packaging for microsensors by glass-silicon anodic bonding

Abstract: Vacuum packaging by the glass-silicon anodic process is studied. The residual gas generated during the anodic binding process and that desobed from the silicon and glass surface increase the pressure in a sealed cavity. In order to fabricate a vacuum sealed cavity, two methods are proposed to eliminate the residual gas; (i) the residual gases are evacuated through a small opening after bonding and then the opening is plugged by depositing a material in vacuum, (ii) the residual gases are absorbed by a getter inside the sealed cavity. A non-evaporable getter (NEG) is used for the second method. A vacuum sealing of tens of Torr is obtained by the firat method. The second method and a combnation of the two methids enables vacuum sealing at a pressure lower than 10-5Torr. A prototype of a capacitive vacuum sensor is fabricated by using the second method.

Low-temperature silicon wafer-to-wafer bonding using gold at eutectic temperature

Abstract: Micromechanical smart sensor and actuator systems of high complexity become commercially viable when realized as a multi-wafer device in which the mechanical functions are distributed over different wafers and one of the wafers is dedicated to contain the readout circuits The individually-processed wafers can be assembled using wafer-to-wafer bonding and can be combined to one single functional electro-mechanical unit using through-wafer interconnect, provided that the processes involved comply with the constraints imposed by the proper operation of the active electrical and micromechanical subsystems This implies low-temperature wafer-to-wafer bonding and through-wafer interconnect Au/Si eutectic bonding has been investigated as it can conveniently be combined with bulk-micromachined through-wafer interconnect The temperature control in eutectic bonding has been shown to be critical

Bonded wafer processing with metal silicidation

Abstract: Low temperature silicon-on-insulator wafer bonding using a silicide bond formation reaction. Dielectric isolation with silicon dioxide, diamond, silicon-nitride, and so forth yields buried resistors under trench isolated silicon islands. Buried dielectrics can be thermally susceptible films like diamond due to the low temperature of the bonding silicidation reaction. Bonding silicides also provide thermal dissipating layer between a buried diamond layer and a handle wafer for good overall thermal conductivity. Bonding silicides also act as diffusion barriers.

Hydrophobic silicon wafer bonding

Abstract: Wafers prepared by an HF dip without a subsequent water rinse were bonded at room temperature and annealed at temperatures up to 1100 °C. Based on substantial differences between bonded hydrophilic and hydrophobic Si wafer pairs in the changes of the interface energy with respect to temperature, secondary ion mass spectrometry (SIMS) and transmission electron microscopy (TEM), we suggest that hydrogen bonding between Si‐F and H‐Si across two mating wafers is responsible for room temperature bonding of hydrophobic Si wafers. The interface energy of the bonded hydrophobic Si wafer pairs does not change appreciably with time up to 150 °C. This stability of the bonding interface makes reversible room‐temperature hydrophobic wafer bonding attractive for the protection of silicon wafer surfaces.

Bonded wafer processing

Abstract: Low temperature wafer bonding using a silicon-oxidizing bonding liquid permits introduction of radiation hardening dopants and electrically active dopants as constituents of the bonding liquid. Oxidizers such as nitric acid may be used in the bonding liquid. Dielectric layers on the device wafer and the handle wafer may be used when additional silicon is provided for the oxidative bonding. Integrated circuits fabricated from such bonded wafers may have buried layers and radiation hardening with device silicon too thick for implantation.

Bonded wafer processing with oxidative bonding

Abstract: Low temperature wafer bonding using a chemically reacting material between wafers to form a bonded zone to bond two wafers together. Examples include silicon wafers with a silicon-oxidizing bonding liquid which also permits introduction of radiation hardening dopants and electrically active dopants as constituents of the bonding liquid. Silicon wafers also may use solid reactants which include deposited layers of metal and polysilicon to form silicide bonded zones. Oxidizers such as nitric acid may be used in the bonding liquid, and a bonding liquid may be used in conjunction with a solid bonding reactant. Dielectric layers on silicon wafers may be used when additional silicon is provided for the bonding reactions. Integrated circuits fabricated from such bonded wafers may have buried layers and radiation hardening and buried resistors.

Encapsulated micro mechanical sensors

Abstract: Encapsulated micro mechanical sensors were fabricated using glass-silicon anodic bonding and an electrical feedthrough structure. Two parallel plates which can be used not only for capacitive sensors but also electrostatic actuators are adopted for integrated sensors as capacitive pressure sensors, accelerometers and resonating sensors. Micromachining technologies were developed for these packaged micro sensors. These include silicon etching technologies as laser assisted etching, deep RIE and in-process thickness monitoring during wet etching. Anodic bonding technologies which enable to incorporate a circuit inside the package and to keep a sealed cavity at a high vacuum are also developed.

Effects of Heat Treatment on Bonding Properties in InP-to-Si Direct Wafer Bonding

Abstract: Effects of heat treatment on bonding properties, which include bonding strength, photoluminescence intensity, and electrical conduction through the interface, have been investigated in InP-to-Si direct wafer bonding for the first time. Bonding strength and electrical conduction were found to be improved by heat treatment. On the other hand, a degradation of photoluminescence intensity was observed with high-temperature treatment.

Process for manufacturing a semiconductor device bump electrode using a rapid thermal anneal

Abstract: A rapid thermal anneal (RTA) process minimizes the intermixing of materials between a bump and a bonding pad so as to provide for a more reliable and durable interconnect between the bump and the bonding pad and so as to allow the probing of wafers prior to bumping A barrier layer is formed over the bonding pads of devices formed over a semiconductor substrate Bumps are then formed over the bonding pads and are annealed for a short time at a high temperature so as to soften the bumps for later assembly in a semiconductor package As a result of this quick annealing process, the intermixing of materials between the bumps and the bonding pads is minimized This is so despite any decreased step coverage of the barrier layer over probe marks on the bonding pads which resulted from testing the wafer Accordingly, wafers may now be tested prior to bumping, thus saving the cost, time, and process steps typically incurred in bumping wafers having a zero or low yield of properly functioning semiconductor devices

Silicon wafer‐to‐wafer bonding at T<200 °C with polymethylmethacrylate

Abstract: A versatile method for low temperature (T<200 °C) bonding of silicon and oxidized silicon wafers is reported using spun cast films of polymethylmethacrylate (PMMA) as the bonding material. The PMMA films are thermoplastic, transparent, dielectric, planarizing, and photopatternable. Bonding was achieved with both unpatterned and patterned, 1‐μm‐thick films. Tensile bond strengths of 3.12 MPa were typical (although the strongest bond had a strength of 5.85 MPa) and thin film stresses of 10 MPa (tensile) were measured. Photopatterned PMMA films exhibited approximately 14% lateral pattern smear after bonding.

High aspect ratio aligned multilayer microstructure fabrication

Abstract: This paper presents a technique for fabricating precisely aligned high aspect ratio multilayer microstructures based on anodic bonding of silicon and PyrexTM glass. The process involves stacking alternate silicon substrates containing patterns in two dimensions with thin Pyrex glass spacers to form tall three‐dimensional structures. The methods used for accurately aligning the layers by optical microscopy and for bonding the layers anodically are described. The application of this technique for building fully functional microlenses for electron‐beam microcolumns is presented.

Method and apparatus for wafer bonding

Abstract: A method of wafer bonding with less elongation and contraction of wafers at the time of and after the bonding of the wafers is disclosed. In the method of wafer bonding, wafers are bonded together with sticking force of their surfaces to form a bonded wafer. The bonding is done by selecting the pressure of the gas between the wafers to be lower than the atmospheric pressure, for instance, and also selecting the kind of gas between the wafers to H2, for instance.

New applications of R.F.-sputtered glass films as protection and bonding layers in silicon micromachining

Abstract: Different r.f-sputtered borosilicate glass films are characterized. Layers sputtered in 100% Ar and annealed in N2 at 550 °C for 3.5 h are found to be best applicable as protection layers in anisotropic etching of Si in KOH solutions and as bonding layers in silicon micromachining. For in situ inspection of the progress of the silicon-to-silicon anodic bonding process using sputtered glass as intermediate layer, an infrared inspection equipment is built. Also, an alternative evaluation method of the bonding quality is presented. Bonding experiments with sputtered glass layer thicknesses ranging from 20 to 1000 nm show corresponding progress of the bonding process. The yield does not seem to depend on the thickness of the borosilicate layer. Furthermore, new possible applications are demonstrated, in which the sputtered glass layer acts both as an etch stop and bonding layer.

A micromachined enzyme reactor in ⪢110 > -oriented silicon

Abstract: An enzyme reactor was fabricated in a ⪢110 > -oriented silicon wafer. By using anisotropic etching a structure. with 30 channels, 12 mm long, 50 μm wide and spaced 50 μ apart was achieved. The channel formation was sealed by anodic bonding of a glass lid to the surface of the silicon wafer. The reaction structure occupied a silicon wafer area of 3 mm×15 mm and had a total volume of 4.2 γl. Peroxidase (POD) and glucose oxidase (GOD) were immobilized on two different reactor structures. The amount of active enzyme in the POD reactor was estimated to 4.8 mU. The GOD reactor was connected to a system for continuous glucose measurements showing a dynamic response to glucose concentration ranging from 0 to 34 mM.

Packaging considerations for planar optical interconnection systems

Abstract: We discuss various aspects of building an integrated optoelectronic system that is based on the concept of planar optics. A particular optical interconnection system has been fabricated and demonstrated. It provides parallel interconnections with 1024 optical channels that could be useful as an optical backplane in an optoelectronic multichip module. We consider the design and the fabrication of the optical system, schemes for the hybrid integration with optoelectronic device arrays, and the thermal management of an integrated system. The proposed hybrid integration scheme is based on mature technologies such as thermal anodic bonding and flip-chip bonding. Possibilities for efficient heat sinking are described.

Silicon Wafer Direct Bonding without Hydrophilic Native Oxides

Abstract: Silicon wafer direct bonding was accomplished between two surfaces which had no hydrophilic native oxide layers. Prior to bonding, two wafers were dipped in conc-HF solution ( ~49% aq.) to remove the native oxide layers and then immersed in deionized water. The level of bonding was evaluated by X-ray topography, high resolution transmission electron microscopy (HRTEM) and tensile strength measurement. It was found that the bonded wafer pairs were void-free and had good bonding strength. HRTEM observation showed that the crystal lattice was continuous and had only small distortions and precipitates. Spreading resistance (SR) measurement across the interface showed that the electric resistance did not increase at the bonding interface. It is suggested that the OH groups which substitute the F atoms terminated on the small portion of the surface play an important role in this conc-HF-treated bonding.

Bonding film member and mounting method of electronic component

Abstract: A method of mounting electronic components on circuit boards, which includes the steps of obtaining a bonding film member by filling bonding material into openings in a predetermined pattern of an electrically-insulating and heat-proof film and holding the bonding material in the openings by a flux layer laminated on one surface of the film, overlaying the bonding material of the bonding film member onto conductive layers of a circuit board by supplying the bonding film member onto the circuit board, superposing electrodes of electronic components onto the bonding material of the bonding film member by supplying the electronic components onto the bonding film member, and melting the bonding material by heating the circuit board.

A Kinetics Study of the Bond Strength of Direct Bonded Wafers

Abstract: In order to determine whether low temperature wafer bonding is thermodynamically prohibited or simply a slow kinetic reaction, a systematic evaluation of the interface bond kinetics of silicon direct wafer bonding was performed over the temperature range of 200–1000°C for annealing times ranging from 15 min to 45 days. The tensile, shear, and torsion tests were developed to monitor the strength kinetics of silicon and silicon dioxide bonded wafers. The strength evolution is found to obey an Arrhenius relationship over the temperature range of 200–1000°C. Tensile strength of Si‐Si bonded substrates varies from a minimum of 0.08 MPa at contact to a maximum of 4.25 MPa after high temperature thermal annealing. The failure of low temperature annealed samples to develop strong bonding in short periods of time has been correlated to microvoid formation at the interface as determined by TEM examination. Geometrical studies indicate that the microvoid formation is the result of trapped gases and can be reduced by appropriate choices of bonded geometries.

Attraction device and its manufacture

Abstract: PURPOSE: To relax the thermomechanical stress of a ceramic board by a bonding section, to prevent the mechanical deformation of the ceramic board and to reduce a thermal adverse effect on a body to be attracted by bringing the bonding section to the state, in which the bonding section is brought to a gelled state or a rubbery state. CONSTITUTION: In an electrostatic chuck 10 attracting and fixing a wafer 20 by electrostatic force, an electrode section 15 is buried into the inside, a top face 11a can be brought into contact with the rear of the wafer 20, and a ceramic board 11 having a fixed thermal expansion coefficient and excellent thermal conductivity and the underside of the board 11 are supported by a top face 12b. A metallic base 12 having a thermal expansion coefficient different from the ceramic board 11 and being made of aluminum and a bonding section 13 bonding the top face 12b of the base 12 made of the metal and the underside of the ceramic board 11 are provided. Soft adhesives being solidified and having high elasticity such as a silicon resin are used as the bonding section 13. Accordingly, thermomechanical stress due to the difference of the thermal expansion coefficient of the ceramic board and the thermal expansion coefficient of the base made of the metal can be relaxed. COPYRIGHT: (C)1995,JPO

Buried Cobalt Silicide Layers in Silicon Created by Wafer Bonding

Abstract: A buried conductive layer in silicon has been created using wafer bonding technique, with a cobalt interfacial layer.Co-coated silicon wafers were brought into contact with either similar or uncoated wafers at room temperature. CoSi2 wasthen formed through a solid-phase reaction, during an anneal at 700 to 900°C. A 700 A buried CoSi2-layer, with a resistivityof approximately 21 µ cm, was achieved. Good adhesion, as measured by tensile strength testing, between the wafers wasachieved. Transmission electron microscopic investigations (Co-coated wafer bonded to bare silicon) showed that thesilicide has not grown into the opposite wafer, and that an amorphous layer exists between the silicide and the siliconsurface. The presence of such a layer has been confirmed by electrical characterization.

Direct bonding of organic materials

Abstract: Direct bonding of polymethylmethacrylate (PMMA) is described as an example of the applicability of direct bonding to organic materials such as polymers. Direct bonding of a PMMA wafer to itself and to silicon and fused silica wafers is realized. At room temperature, the value of the bond energy indicates the presence of weak chemical interactions at the bonded interface. Heating a bonded PMMA/PMMA wafer pair to the glass transition temperature of PMMA (105 °C) and higher temperatures causes the two surfaces to fuse and the interface to become bridged by polymer chains.

Low‐Temperature Wafer Bonding of Surfaces Using a Reactive Sputtered Oxide

Abstract: A low-temperature silicon wafer bonding technique has been demonstrated to give bond strengths as high as 2.4 MPa for anneal temperatures as low as 400 C. The technique involves RF magnetron reactive sputter deposition of nonstoichiometric SiO[sub x] (x < 2) films on one or both surfaces prior to contacting at room temperature. Surfaces investigated include bare silicon, thermally grown silicon dioxide, and low pressure chemical vapor deposited silicon nitride. Experimental results provide new evidence that removal of oxygen or water from the bonding interface during annealing is critical to the formation of strong interfacial bonds.

Method for fabricating transistors using crystalline silicon devices on glass

Abstract: A method for fabricating transistors using single-crystal silicon devices. This method overcomes the potential damage that may be caused to the device during high voltage bonding (21) and employs a metal layer (18) which may be incorporated as part of the transistor. This is accomplished such that when the bonding of the silicon wafer or substrate (10) to the glass substrate (20) is performed, the voltage and current pass through areas where transistors will not be fabricated. After removal of the silicon substrate, further metal may be deposited to form electrical contact or add functionality to the devices. By this method both single and gate-all-around devices may be formed.

Packaged micromechanical sensors

Abstract: Packaged micro mechanical sensors were fabricated using glass-silicon anodic bonding and an electrical feedthrough structure Two parallel plates which can be used not only for capacitive sensors but also electrostatic actuators are adopted for integrated sensors as capacitive pressure sensors, accelerometers and resonating sensors Micromaching technologies were developed for these packaged micro sensors These include laser assisted silicon etching and anodic bonding which enables to incorporate a circuit inside the package and to keep a sealed cavity at a high vacuum >

Characterization Of Spontaneously Bonded Hydrophobic Silicon Surfaces

Abstract: The choice of surface treatment prior to silicon wafer bonding is crucial both for the reliability of the bonding process and the electrical properties of the bonded structure. In the case of silicon direct bonding for manufacturing of buried electrical junctions, the bonding step is particularly critical for accurate and reproducible results. In this work, the attraction between HF-etched surfaces and the effect of a following water rinse were investigated by studying the bonding spontaneity, velocity of the initial bonding wave, and the electrical properties of the bonded junctions. Spontaneous bonding occurred when no subsequent water rinse was made after the HF-etch, while water-rinsed wafers did bond only with the help of an applied pressure and also ended up with more voids

Direct Bonding of LiTaO3 Single Crystals.

Abstract: A new fabrication method for combining lithium tantalate single crystals by direct bonding without using bonding agents has been developed. The bonded interface was found to be very uniform, and bonding on an atomic scale was achieved in spite of a relatively low heat-treatment temperature of 350°C. This method is very promising for realizing new stacked structures and new fabrication processes for piezoelectric and electrooptic devices, such for a layer of ferroelectric single crystal on insulator or semiconductor.

A fluxless oxidation-free bonding technology

Abstract: A fluxless oxidation-free bonding technology is reported. The technology uses the direct deposition of multilayer composite in high vacuum to prevent oxidation. The outer layer of the composite is either gold or copper which protects the inner layers from oxidation when the composite is later exposed to atmosphere. As a result of oxidation prevention neither flux nor scrubbing action is required in the bonding process. Two processes based on Pb-Sn-Au and Sn-Cu have been developed for a processing temperature of 250/spl deg/C to prove the working concept. GaAs dies have been well bonded on glass and alumina substrates as shown by scanning acoustic microscope. SEM and EDX studies verify the bonding principle, reveal the bonding mechanism and identify the intermetallic compounds in the joints. Apart from fluxless feature, other advantages include good control of joint thickness, good control of composition, and direct deposition of bonding media on wafers or substrates. >

Optical assembly/housing for securing optical fiber components, devices and fibers to the same or to mounting fixtures

Abstract: A method of bonding glass-based optical elements comprising the steps of positioning a first glass-based optical element relative to a second glass-based optical element, applying a glass-based bonding compound about the first and second optical elements, and applying sufficient localized heat to the glass-based bonding compound to cause the glass-based bonding compound to soften and fuse with the optical elements.

Atomic Bonding at Oxide Surfaces

Abstract: The fundamental interactions involved in the bonding of atoms and molecules to metal oxides are discussed. Surface defects play a major role in many of those interactions. Both acid/base and oxidation/reduction reactions occur at metal-oxide surfaces, with the latter dominating at point defect sites. The reaction of metals with oxide surfaces is governed largely by the relative heats of formation of the respective oxides, although surface point defects also play an important role. Preliminary studies of ceramic/ceramic interfaces indicate that interfacial interactions are much weaker than for metal/ceramic interfaces.