Showing papers on "Gate driver published in 1997"

Isolated gate driver for power switching device and method for carrying out same

Abstract: An isolated gate driver device for a power switching device having a plurality of transistors includes a primary circuit having a voltage source of a first voltage potential. The primary circuit constantly switches the voltage source to generate first and second load signals based on control signals received from a microcontroller. The first load signal is modulated at a first frequency for enabling the transistors, and the second load signal is modulated at a second frequency, different from the first frequency, for disabling the transistors. A plurality of high frequency transformers corresponding to each of the transistors is coupled to the primary circuit. The transformers have a primary side for receiving one of the first and second load signals and a secondary side for transforming the one of the first and second load signals into corresponding signals at a second voltage potential. A secondary circuit coupled between each of the transformers and each of the corresponding transistors provides a bias power supply to each of the transistors at the second voltage potential. The secondary circuit also enables and disables each of the transistors based on the first and second load signals.

All-optical logic NOR gate using a semiconductor laser amplifier

Abstract: The authors report on the realisation of a NOR gate using SLA. The operation is based on the nonlinearity of the SLA gain. The power difference between the output logic level is > 100 µW with a 9 dB contrast.

Three-terminal power mosfet switch for use as synchronous rectifier or voltage clamp

Abstract: An N-channel power MOSFET (M2) is fabricated with its source and body connected together and biased at a positive voltage with respect to its drain. The gate is controlled by a switch (1184) which alternatively connects the gate to the source or to a voltage (VCP) which turns the channel of the MOSFET fully on. When the gate is connected to the source, the device functions as a 'pseudo-Schottky' diode which turns on at a lower voltage and provides a lower-resistance path than a conventional PN diode. When the gate is connected to the positive voltage the channel of the MOSFET is turned fully on. This MOSFET switch is particularly suitable as a synchronous rectifier in a power converter where it reduces the power loss and stored charge in the 'break before make' interval.

High speed gate oxide protected level shifter

Abstract: An improved gate oxide protected level shifter is provided which has a higher speed of operation than is traditionally available. The level shifter includes a first capacitor coupled between a first output terminal and the input of an inverter and a second capacitor coupled between a first node and the output of the inverter. As a result, the speed of the transitions at the gates of the pair of cross-coupled P-channel MOS transistors is increased several times.

IGBT negative gate capacitance and related instability effects

Abstract: For high collector voltages, Insulated Gate Bipolar Transistors (IGBTs) exhibit a negative gate capacitance. In this condition, a p-channel inversion layer is formed on the N-base surface. The positive charges in the p-channel induce negative charges in the MOS gate electrode. This results in a negative gate capacitance. As a consequence of this negative capacitance, IGBT operation is inherently unstable, leading to current redistribution between cells or even chips.

2-GHz Si power MOSFET technology

Abstract: A 2-GHz Si power MOSFET with 50% power-added efficiency and 1.0-W output power at a 3.6-V supply voltage has been developed for use as an RF high-power amplifier in wireless applications. This MOSFET achieves this performance by using a 0.4-/spl mu/m gate power device with an Al-shorted metal-silicide/Si gate structure and a reduced gate finger width pattern.

Parameter extraction methodology and validation for an electro-thermal physics-based NPT IGBT model

Abstract: A physics-based dynamic electro-thermal nonpunch through (NPT) insulated gate bipolar transistor (IGBT) model is presented. For the electrical and thermal parameters an extraction methodology is given. The model reproduces the static, dynamic and short circuit characteristics of the IGBT.

Bidirectional lateral insulated gate bipolar transistor having increased voltage blocking capability

Abstract: A bidirectional lateral insulated gate bipolar transistor (IGBT) includes two gate electrodes. The IGBT can conduct current in two directions. The IGBT relies on a double RESURF structure to provide high voltage blocking in both directions. The IGBT is symmetrical, having an N-type drift region in contact with an oxide layer. A P-type region is provided above the N-type drift region, having a portion more heavily doped with P-type dopants. The double RESURF structure can be provided by a buried oxide layer, a floating doped region, or a horizontal PN junction. The IGBT can be utilized in various power operations, including a matrix switch or a voltage source converter.

Series connection of IGBTs with active voltage balancing

Abstract: This paper describes a gate drive circuit for series-connected IGBTs in high voltage applications. The control criterion of the gate drive circuit is to actively limit the voltages during switching transients, while minimizing the switching transient and losses. In order to achieve the control criterion, a closed loop control scheme is adopted. The closed loop control injects current to an IGBT gate as required to limit the IGBT collector-emitter voltage to a predefined level. The performance of the gate drive circuit is examined experimentally by the series connection of three IGBTs with conventional snubber circuits. The experimental results show the voltage balancing by an active control with wide variations in loads and imbalance conditions.

A novel high-frequency high-voltage LDMOS transistor using an extended gate RESURF technology

Abstract: A novel high-voltage DMOS transistor with a low doped extended gate is presented. The device withstands 240 V in the off-state and has a specific on-resistance of 24 m/spl Omega/cm/sup 2/. The transconductance is 60 mS/mm at 3 V gate voltage. The sub-micron channel length gives small-signal high-frequency performance as f/sub T/=2.8 GHz and f/sub max/=5.8 GHz and the unilateral power gain at 900 MHz is over 15 dB. The dependence of breakdown voltage and on-resistance on gate doping level and polysilicon gate length is investigated with device simulations. It is found that the breakdown voltage is highly dependent on the gate doping level.

Low noise, high current-drive MOSFET structure for uniform serpentine-shaped poly-gate turn-on during an ESD event

Abstract: A multi-gate-finger MOSFET structure positions the gate element over a channel between drain and source diffusion regions, such that the entire structure is within the active region in a substrate. The gate/channel-to-drain and gate/channel-to-source diffusion edges are continuous along the gate/channel layout, so as to cascade the snap-back action to enhance uniform turn on of the entire gate element during an ESD event. In addition, the gate signal RC delay is sufficient to provide noise suppression of the output voltage when the MOSFET is used as a high current-drive CMOS output buffer.

Heavy ion induced failures in a power IGBT

Abstract: Heavy ion induced destructive failures are reported in N-channel power IGBTs. For the first time, an experimental and 2D simulation investigation shows that latchup is involved in the triggering of the device.

Coreless PCB-based transformers for power MOSFET/IGBT gate drive circuits

Abstract: Gate drive circuits for modern power electronic switches such as MOSFET and IGBT often require electrical isolation. This paper describes initial results of some coreless PCB-based transformers that can be used for MOSFET and IGBT devices at high frequency (500 kHz to 2 MHz) operation. Such transformers substantially reduce the labour cost in winding core-based transformers and simplifies the automation process of gate drive circuits.

Level shifter for a liquid crystal display

Abstract: This invention is related to a level shifter in an LCD using dual power voltages. A gate voltage generator generates a gate voltage through a charge pumping not to turn on both a PMOS transistor and an NMOS transistor at the same time, and the PMOS transistor is switched by the gate voltage. In this level shifter, a current to generate an output signal flows instantly only the moment the PMOS transistor and the NMOS transistor are switched, and an unwanted current path is therefore not formed. Therefore, a voltage level can be shifted without the unnecessary power consumption in the level shifter.

Single-power-supply-based transformerless IGBT/MOSFET gate driver with 100% high-side turn-on duty cycle operation performance using auxiliary bootstrapped charge pumper

Abstract: Using an invented auxiliary bootstrapped charge pumper, a smart new design of single-power-supply-based transformerless IGBT/MOSFET gate driver with 100% high-side turn-on duty cycle operation performance is proposed in this paper. The experimental results of the proposed circuit have been obtained to verify the power sourcing performance of the invented transformerless auxiliary bootstrapped charge pumper for the high-side driving circuit of the single-level two-switch half-bridge using the same single power supply of the low-side driving circuit. Also, with the help of the invented auxiliary bootstrapped charge pumper, the application of the single-level two-switch half-bridge can be extended to the applications of multi-level multi-switch half-bridges.

Snubberless balancement of series connected insulated gate devices by a novel gate control strategy

Abstract: The series connection of insulated gate devices, such as MOSFETs or IGBTs, is increasingly used in high-voltage power converters where the demand for fast power switches is growing. The main problem in such an application is to guarantee the voltage balance across the devices both at steady-state and during switching transients, in order to avoid damaging overvoltages. In this paper, a novel approach is used to balance the voltage during switching transients by controlling the charge profile of the input gate capacitance. The main advantages of the proposed method consist in avoiding the common use of balancing capacitors in the output power side, and in working on the gate drive signals only. The application of the proposed gate drive technique is discussed first and then validated by experimental tests applied to the control of two series connected devices (MOSFETs or IGBTs). The proposed approach is also applicable for more than two devices. In particular, the validity has been proven by computer simulations for three components. Finally, a comparison is performed between the switching behaviors of two different configurations: a high-voltage application having for a high-voltage single switch device; or a series of two lower voltage rated devices. The advantage of the latter configuration, having the proposed active voltage balancing, over the former has been experimentally demonstrated with regard to the turn-off power losses.

High-frequency power amplifier and mobile communication device using same

Abstract: A MESFET of a GaAs semiconductor device having a p-pocket LDD structure is used for a high-frequency power amplifier of a mobile communication device, in order to decrease current consumption and to increase the continuous operating time of a battery. The high-frequency power amplifier is provided with a gate-bias adjusting feedback element between the drain and gate of the MESFET. Thus, even if there is a great difference between the filled and terminated potentials of the discharge voltage of the battery for supplying electric power to the amplifier, electric power can be supplied near the terminated potential for a long time, so that the mobile communication device can be continuously used for a long time.

Frame display control in an image display having a liquid crystal display panel

Abstract: An image display device having a liquid crystal display panel in which display picture elements are arranged according to a dot matrix form includes a control circuit that controls the drive of a source driver and gate driver such that writing of signals for frame display in a horizontal direction is performed during the vertical blanking interval of input image signals. During the vertical blanking interval, the control circuit writes to the source driver each source selection signal of picture elements that are to display the horizontal frame and holds this data. The control circuit then generates sequential gate selection signals from the gate driver while supplying the held output of the source driver to the sources of the picture elements, and supplies horizontal frame display signals to the picture elements.

Strange ways to use the MOSFET

Abstract: This paper discusses uses of the MOSFET other than as a transconductor or switch. Several possibilities are reviewed, and new ones are described. The techniques discussed include the use of the MOSFET as a capacitor, as a linearized resistor, as a tunable distributed RC filter element, as a passive voltage amplifier, and as a discrete-time parametric amplifier; also described are resistive-gate MOSFETs and resistive gate/resistive body MOSFETs.

Input harmonics control using non-linear capacitor in GaAs FET power amplifier

Abstract: We address the effect of gate signal distortion arising from capacitance non-linearity on the power added efficiencies of power amplifiers based on FETs. A novel method which can compensate the non-linearity of gate capacitance is proposed. The key idea is that a reversed diode is connected to the gate, where the gate and source part of a FET is simply modeled as a diode. We demonstrated this scheme with the load-pull and source-pull measurement of the circuit. A 7% increase in power added efficiency is achieved.

Power mosfet having current detection means

Abstract: A power MOSFET includes a main MOSFET connected in series with a load resistor between a high voltage power supply voltage and ground, and a series circuit connected in parallel to the main MOSFET and composed of a sensing MOSFET and a converting MOSFET for converting a shunted current flowing through the sensing MOSFET into a detected voltage signal, which is supplied to one input of an operational amplifier. A gate of the main MOSFET and a gate of the sensing MOSFET are connected in common to an output of a gate drive circuit. The other input of the operational amplifier is connected to a reference voltage, so that the detected voltage signal is compared with the reference voltage. An output of the operational amplifier is fed back to the gate drive circuit, so that the gate drive circuit controls a gate voltage supplied to the gate of the main MOSFET and the gate of the sensing MOSFET, in order to prevent an overcurrent from flowing through the power MOSFET.

Boost capacitor for an H-bridge integrated circuit motor controller having matching characteristics with that of the low-side switching devices of the bridge

Abstract: An H-bridge circuit having a boost capacitor coupled to the gate of the low-side driver. A driver, in the form of a switching transistor is connected between the load and ground, thus providing a low-side driver. A capacitor is coupled to the gate of the low-side driver to provide a boosted voltage for rapid turn on of the gate. The size of the capacitor selected to be similar to the size of the capacitance associated with the low-side driver transistor.

Transistor output circuit

Abstract: A transistor output circuit comprises a first insulated gate transistor having a control electrode connected to an input terminal, one main electrode connected to a first diode, and the other main electrode connected to a reference voltage source, and a second insulated gate transistor having a control electrode connected to the input terminal, one main electrode connected to an output terminal, and the other main electrode connected to the reference voltage source. A ratio (W1/L1) of a gate width (W1) to a gate length (L1) of the first insulated gate transistor is larger than a ratio (W2/L2) of a gate width (W2) to a gate length (L2) of the second insulated gate transistor.

Method for the turn-on regulation of an IGBT and apparatus for carrying out the method

Abstract: A method for the turn-on regulation of an IGBT and an apparatus for carrying out the method are specified. In contrast to the prior art, the gate current is used as controlled variable rather than the gate voltage. Said gate current acts on the gate electrode according to a desired-actual comparison of an actual voltage value present at the gate electrode and of a corresponding desired value. The regulation guides the load current on a predetermined trajectory during the switching operation. Nevertheless, no current detection is necessary on the load side. Instead, use is made of the fact that, during the turn-on of the MOSFETs in the IGBT, the behavior of the latter predominates. It can be shown that there is a quadratic relationship between the gate voltage and the load current as soon as the gate voltage is greater than the threshold voltage. This is true until the full load current flows. Regulation of the gate voltage to a specific trajectory from the off state to the on state enables the load current to rise quadratically proportionally thereto. Conversely, the gate voltage profile can easily be calculated to a desired load current profile. The fact that no measuring apparatuses on the load side are required is also particularly advantageous.

Fast isolated IGBT driver for high voltage switching circuitry

Abstract: A fast insulated gate bipolar transistor (IGBT) driver circuit for trunking waveforms in external defibrillators is provided. An input circuit is provided to receive input signals. An isolation transformer is provided to isolate the output from the input. A biasing circuit is connected to the isolation transformer for biasing the IGBT. In response to the biasing circuitry, the IGBT rapidly switches between operational states to truncate waveforms at any point during the delivery of energy to a patient.

Gate drive circuit for power converters that reduces surge voltages

Abstract: A current detector includes a chopper circuit composed of a switching circuit, ie an inverse-parallel circuit composed of an insulated gate bipolar transistor IGBT and a diode, and a switching circuit, ie an inverse-parallel circuit composed of an IGBT and a diode, which are connected in series When the diode on the opposite arm is turned on, a reverse recovery current is detected and its output is directed to a gate drive circuit via an insulating circuit A switch in the gate drive circuit is opened to increase resistance, in order to reduce the speed at which the gate of the switching device is charged Thus, the surge voltage and its increase ratio are reduced without reducing a switching speed or requiring a snubber circuit

Synchronous semiconductor memory having a reduced number of registers

Abstract: In a synchronous DRAM including a register having an input gate and an output gate, for holding read-out data between the input gate and the output gate by opening the input gate, and for transferring or outputting the held data by opening the output gate. An input gate control circuit for controlling an open/close of the input gate is supplied with a output switch feedback signal in the form of a one-shot pulse generated by an output gate control circuit for controlling an open/close of the output gate, in synchronism with an output gate switch signal, so that only after the data held in the register has been outputted to an external of the register, the next data to be succeedingly transferred from the read/write bus to the register is actually latched in the register.

Experimental characterization of insulated gate power components: capacitive aspects

Abstract: In this paper, the parasitic capacitive behaviour of insulated gate power modules (MOSFET, IGBT, MCT, etc) is presented First, a theory on nonlinear electrostatic quadripoles is developed Secondly, based on this theory, an original experimental characterization method is presented Results provide more information than manufacturer datasheets, which makes the method very interesting for designers Finally, the influence of the two potentials V/sub ce/ and V/sub ge/ on capacitor values is analysed at turn on using a simple model of an IGBT

High speed biCMOS gate driver for MOSFETs incorporating improved injection immunity

Abstract: A circuit and method for implementing a MOSFET gate driver. Two bipolar NPN transistors (Q1, Q2), constructed to achieve rail-to-rail swings when driving a capacitive load (23) by overlapping their respective emitter regions (13) over their contained contact regions (19) to prolong internal device saturation and resulting turn-off delays, alternately connect the gate drive terminal (31) to either a supply terminal (HVDC) or an output terminal (29). Predrive circuitry for these transistors comprises NMOS transistors (M9, M18, M12 and M13). The NPN transistors are supplemented by a CMOS inverter (PMOS transistor M6 and NMOS transistor M17). A PMOS transistor (M7) provides additional base drive for transistor Q1 when the gate drive node is approaching the supply node. A diode (D2) protects transistor Q1 against base-emitter avalanche and protects transistor M7 from excessive drain-to-source voltages. The circuit can tolerate negative voltages up to approximately two diode drops on its output and gate drive terminals because (a) when transistor Q2 is conducting it is effectively configured as an NPN diode and the collector cannot sustain a voltage less than one base-emitter drop above its emitter, (b) transistor M13 is a DMOS transistor which can withstand negative voltages upon its source when it is nonconducting due to the interposition of the backgate between the source and the drain and (c) transistors M17 and M18 are returned to ground and not to the output terminal.

Input/output protection circuit having an SOI structure

Abstract: An I/O protection circuit includes a P-channel MOS transistor connected between an input terminal and a power supply line, and an N-channel MOS transistor connected between the input terminal and a ground line. Gate electrodes of both the transistors are floated. The transistors may be replaced with gate diodes. Further, gate electrodes may be formed from the same layer as a gate electrode provided for field shielding.