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Showing papers on "Inverter published in 1990"


Journal ArticleDOI
TL;DR: In this paper, an alpha-power-law MOS model that includes the carrier velocity saturation effect, which becomes prominent in short-channel MOSFETs, is introduced and closed-form expressions for the delay, short-circuit power, and transition voltage of CMOS inverters are derived.
Abstract: An alpha -power-law MOS model that includes the carrier velocity saturation effect, which becomes prominent in short-channel MOSFETs, is introduced. The model is an extension of Shockley's square-law MOS model in the saturation region. Since the model is simple, it can be used to handle MOSFET circuits analytically and can predict the circuit behavior in the submicrometer region. Using the model, closed-form expressions for the delay, short-circuit power, and transition voltage of CMOS inverters are derived. The delay expression includes input waveform slope effects and parasitic drain/source resistance effects and can be used in simulation and/or optimization CAD tools. It is found that the CMOS inverter delay becomes less sensitive to the input waveform slope and that short-circuit dissipation increases as the carrier velocity saturation effect in short-channel MOSFETs gets more severe. >

1,596 citations


Journal ArticleDOI
11 Jun 1990
TL;DR: In this article, a generalization of the Pulse Width Modulation (PWM) subharmonic method for controlling single-phase or three-phase multilevel voltage source inverters (VSIs) is considered.
Abstract: A generalization of the PWM (pulse width modulation) subharmonic method for controlling single-phase or three-phase multilevel voltage source inverters (VSIs) is considered. Three multilevel PWM techniques for VSI inverters are presented. An analytical expression of the spectral components of the output waveforms covering all the operating conditions is derived. The analysis is based on an extension of Bennet's method. The improvements in harmonic spectrum are pointed out, and several examples are presented which prove the validity of the multilevel modulation. Improvements in the harmonic contents were achieved due to the increased number of levels. >

1,139 citations


Journal ArticleDOI
TL;DR: In this paper, an adaptive hysteresis-band control method where the band is modulated with the system parameters to maintain the modulation frequency to be nearly constant is described, and an interior permanent magnet (IPM) synchronous machine load is considered.
Abstract: An adaptive hysteresis-band control method where the band is modulated with the system parameters to maintain the modulation frequency to be nearly constant is described. Although the technique is applicable to general AC motor drives and other types of load, an interior permanent magnet (IPM) synchronous machine load is considered. Systematic analytical expressions of the hysteresis band are derived as functions of system parameters. An IPM machine drive system with a voltage-fed current-controlled PWM (pulse width modulation) inverter has been computer simulated to study the performance of the proposed method. >

510 citations


Journal ArticleDOI
TL;DR: In this article, a hysteresis control method for three-phase current-controlled voltage-source PWM inverters is presented, which minimizes interference among phases, thus allowing phase-locked loop (PLL) control of the modulation frequency of inverter switches.
Abstract: A hysteresis control method for three-phase current-controlled voltage-source PWM inverters is presented. The method minimizes interference among phases, thus allowing phase-locked loop (PLL) control of the modulation frequency of inverter switches. The control theory is discussed, and the controller implementation is described. Design criteria are also given. The results of experimental tests show excellent static and dynamic performance. >

344 citations


Journal ArticleDOI
TL;DR: New method of high performance current and/or voltage control of three phase PWM inverter, especially suitable for high speed switching devices such as Transistor and BIMOS is proposed.
Abstract: A novel method for microprocessor control of three-phase sinusoidal-voltage pulse-width-modulated (PWM) inverters is proposed. First, the discretized state equations of the inverter main circuit on the d-q frame are derived. An algorithm for dead beat control with a current minor loop that constrains the inverter current within the safety limit is subsequently developed. To compensate the computing time delay, a second-order prediction method and a novel discretization method using twice the time of the sampling period have been adopted. This method is especially suitable for inverters using high-speed switching devices and digital signal processors. The validity of the control system has been demonstrated by precise simulation using a hybrid computer. >

272 citations


Journal ArticleDOI
07 Oct 1990
TL;DR: In this article, five inverter power circuits suitable for switched reluctance motor (SRM) drives are analyzed and the peak voltage and current ratings of power switches and the size and peak ratings of the DC link components of each circuit are compared.
Abstract: Five inverter power circuits suitable for switched reluctance motor (SRM) drives are analyzed. The peak voltage and current ratings of the power switches and the size and peak ratings of the DC link components of each circuit are compared. As an example, a converter analysis and selection are performed for a high-speed, 6/2 SRM, suitable for a spindle drive, and a high-torque, 8/6 motor. Experimental results obtained for a high-torque drive are presented. Of the five circuits, only two are found suitable for industrial SRM drives, supplied from 380 or 460 V AC lines. The remaining circuits all use dual rail topology, requiring that the inverter active devices have a rating at least twice the motor supply voltage. A discussion of basic motor requirements is included. >

235 citations


Journal ArticleDOI
TL;DR: In this article, the theory of vector control is applied to the nonlinear model of a permanent magnet synchronous motor to develop a linear model for controller design purposes, and the operation and relevant mathematics of a pseudo-derivative feedback controller are presented.
Abstract: The theory of vector control is applied to the nonlinear model of a permanent magnet synchronous motor to develop a linear model for controller design purposes. The operation and relevant mathematics of a pseudo-derivative feedback controller are presented. Controller designs for three different speeds are then considered, and a comparative evaluation is made on the basis of their large and small-signal behavior. In order to test the large-signal response, the detailed nonlinear model of the machine and a real-time model of the inverter switches are used. Results indicate that a critically damped design done so as to ensure that all control and power signals never saturate gives an extremely poor result. Much better small and large-signal responses are achieved by avoiding this constraint and using Zener diodes instead to limit the commanded input into the inverter. Two designs using this technique are presented, an underdamped design with low speed overshoot and an overdamped design with no speed overshoot. The response of the underdamped design was much quicker than that of the overdamped. However the overdamped design has application when speed overshoot is intolerable. >

152 citations


Journal ArticleDOI
11 Jun 1990
TL;DR: In this paper, a new proposal to reject DC-link voltage ripple in inverters operating on programmed PWM (pulse width modulation) waveforms is examined in detail, where continuous elimination of harmonics is achieved at the inverter output while simultaneously rejecting the voltage ripple.
Abstract: A new proposal to reject DC-link voltage ripple in inverters operating on programmed PWM (pulse width modulation) waveforms is examined in detail. It is demonstrated how continuous elimination of harmonics is achieved at the inverter output while simultaneously rejecting the DC-link voltage ripple. Thus, with the proposed technique, high-quality voltage is guaranteed at the inverter output terminals even with a substantial low-frequency voltage ripple on the DC-link. A thorough modeling of this technique, along with the tradeoffs involved in acquiring the immunity to DC-link ripple, is illustrated in detail. Potential applications of the proposed technique are in fixed and variable frequency inverters for power supplies and AC motor drives which experience voltage ripple in the DC-link, such as when fed from a weak AC-system which is frequently unbalanced. A design procedure and the digital implementation of the proposed technique are described. Selected results are verified experimentally on a laboratory inverter. >

136 citations


Journal ArticleDOI
TL;DR: In this article, the concept of a redundant multi-inverter UPS (uninterruptible power supply) system which includes extended monitoring of the status and the operating conditions of all power electronic equipment is described.
Abstract: The concept of a redundant multi-inverter UPS (uninterruptible power supply) system which includes extended monitoring of the status and the operating conditions of all power electronic equipment is described. Each block of the UPS system is monitored by two independent microcomputers that process the same data. The microcomputers are part of a redundant distributed monitoring system that is separately interlinked by two serial data buses through which they communicate. They establish a hierarchy among the participating blocks by defining one of the healthy inverter blocks as the master. The actual master runs the central synchronizing unit for the entire system, whereas the slave units perform the control of equal active and reactive load sharing. Operation and fault detection are experimentally illustrated in a dual inverter system with a rating of 10 kVA of redundant power. >

119 citations


Proceedings ArticleDOI
07 Oct 1990
TL;DR: An alternative topology for a synchronous reluctance motor (SRM) is proposed utilizing a novel five-phase, concentrated winding, wye connected stator, which operates at a better switch utilization factor than a conventional three phase, six-transistor bridge as mentioned in this paper.
Abstract: An alternative topology for a synchronous reluctance motor (SRM) is proposed utilizing a novel five-phase, concentrated winding, wye connected stator. The corresponding inverter requires only 10 transistors, each of which operates at a better switch utilization factor than a conventional three-phase, six-transistor bridge. Linear analysis is used to search for an optimum pole arc and the required third harmonic of current to be added to the fundamental current waveform. These results have been backed by a more detailed analysis using the finite-element approach. It is found out that an addition of 33% third harmonic results in 10% more torque even when saturation is properly taken into account. Also, lower flux density in the air gap leaves room for deeper slots and consequently more copper, resulting in a potential further improvement in future designs. >

118 citations


Journal ArticleDOI
11 Jun 1990
TL;DR: In this article, a two-phase high-frequency inverter using parasitic resonant impedances incorporated in the ultrasonic motor, which is represented in terms of an electrical resonant tank circuit model, is proposed as a high-power density switching mode ultrasonic power amplifier.
Abstract: The basic driving and control principles and the operating characteristics of a newly-developed ultrasonic motor (USM) are described. The two-phase resonant inverter for driving the USM, which includes a variable-frequency PWM (pulse width modulation) control scheme and a phasor control function between inverters, is discussed. A novel automatic resonant frequency tracking strategy using the PLL (phase-locked loop) technique is presented. It uses both sensor and sensorless interfaces to operate at a certain optimum point. The two-phase high-frequency inverter using parasitic resonant impedances incorporated in the ultrasonic motor, which is represented in terms of an electrical resonant tank circuit model, is proposed as a high-power density switching mode ultrasonic power amplifier. Experimental results obtained with this inverter-drive USM system with frequency timing control are illustrated. >

Proceedings ArticleDOI
Takao Kawabata1, K. Honjo1, Nobuo Sashida1, Kazunori Sanada1, Masato Koyama1 
07 Oct 1990
TL;DR: In this article, a high-frequency link DC/AC converter for flexible, compact, and high-efficiency uninterruptible power supply (UPS) systems is discussed, which consists of a 50% duty ratio rectangular voltage output inverter, a highfrequency transformer, a pulsewidth modulation (PWM) cycloconverter, and an LC filter.
Abstract: A high-frequency link DC/AC converter developed for flexible, compact, and high-efficiency uninterruptible power supply (UPS) systems is discussed. The DC/AC converter consists of a 50% duty ratio rectangular voltage output inverter, a high-frequency transformer, a pulse-width modulation (PWM) cycloconverter, and an LC filter. For this converter, a three-phase output DC/AC converter can be easily realized with only one inverter and one three-phase cycloconverter. Conversion efficiency is inherently high because the inverter can utilize zero-current switching to minimize the switching loss. Output waveform control is improved because the dead time in the cycloconverter PWM can be eliminated. The main circuit configuration, the PWM method of the cycloconverter used to obtain a sinusoidal output voltage and the switching method of the inverter are described. The experimental results of a 1 kVA DC/AC converter using a high-frequency link of 20 kHz in both single-phase and three-phase output are discussed. >

Journal ArticleDOI
07 Oct 1990
TL;DR: In this paper, the authors proposed a parallel-resonant DC-link (PRDCL) circuit to provide zero-DC link voltage periods for PWM inverter switchings.
Abstract: A zero-voltage-switching (ZVS) three-phase pulse width modulated (PWM) inverter which uses a parallel-resonant DC-link (PRDCL) circuit proposed by J. He and N. Mohan (1989) is examined. The PRDCL circuit is aimed at both providing zero-DC link voltage periods for PWM inverter switchings and imposing minimum DC bus voltage stress to PWM inverters. A simple circuit control scheme and the design formulas are offered. To confirm the circuit theoretical analyses and results, a 50 W ZVS single-phase PWM inverter experimental prototype using the proposed PRDCL circuit was fabricated and tested. The test results have proved the proposed circuit and concept. Power device selections and device stress evaluations are described. A detailed comparison of the proposed PRDCL ZVS inverter system with conventional voltage source PWM inverters is discussed. >

Patent
16 Feb 1990
TL;DR: In this paper, the authors propose to facilitate the change of the driving capability of the device by constituting the final stage of an output circuit driving an external circuit with plural number of transistors and changing the combination of the acting transistors in response to a control signal.
Abstract: PURPOSE:To facilitate the change of the driving capability of the device by constituting the final stage of an output circuit driving an external circuit with plural number of transistors(TRs) and changing the combination of the acting TRs in response to a control signal CONSTITUTION:When an instruction I is given to an output port circuit 6 from an instruction program array (IPLA), P TRs 22, 24 or a NOR gate 20 are turned off, an NTR 23 is turned on and an L signal is sent to an inverter 25 Then an NTR 28 is turned on and an L level is given to an external device from a pad 30 On the other hand, NTRs 28, 29 are both turned on by an instruction II and an external device is driven by a large driving capability Thus, the driving capability is easily changed and the semiconductor integrated circuit device whose performance is enhanced along with the application request with a wide range by the user is obtained

Proceedings ArticleDOI
07 Oct 1990
TL;DR: In this article, a new control strategy for variable-speed drives is presented, aimed at improving or even replacing existing volts-per-hertz (V/f) open-loop variable speed drives.
Abstract: A new control strategy for variable-speed drives is presented. It is aimed at improving or even replacing existing volts-per-hertz (V/f) open-loop variable-speed drives. This strategy generates d-q voltage commands in the stator-flux-oriented reference frame by closing a torque loop and a flux loop. Stator flux and electromagnetic torque feedback signals are derived from DC voltage, DC current, and inverter switching states. Digital implementation is seen to be possible with slight modification of existing V/f drives. Satisfactory performance was achieved on a prototype. The proposed strategy appears to be a good compromise between high-cost, high-performance field-oriented drives and low-cost, low-performance V/f drives. >

Journal ArticleDOI
11 Jun 1990
TL;DR: In this paper, a PWM rectifier/inverter system using IGBTs (insulated-gate bipolar transistors), capable of switching at 20 kHz, is reported.
Abstract: A PWM (pulse width modulation) rectifier/inverter system using IGBTs (insulated-gate bipolar transistors), capable of switching at 20 kHz, is reported. The base drive circuit for the IGBT, incorporating short circuit protection, is presented. The inverter uses an Undeland snubber together with a simple energy recovery circuit, which ensures reliable and efficient operation even for 20 kHz switching. The front end for the system is a regenerative single-phase full-bridge IGBT inverter along with an AC reactor. The steady-state design considerations are explained, and control techniques for unity power factor operation and fast current control of the front end converter, in rotating as well as stationary reference frames, are discussed and compared. Results from computer simulations and experimental results for a 1.5 kW prototype system using GE type 6E20 IGBTs are presented. >

Patent
Kakitani Tsutomu1
27 Jul 1990
TL;DR: In this article, a discharge lamp lighting apparatus is described, which includes an inverter circuit (16) for supplying a high frequency power source to discharge lamp (18) having one of different ratings, a voltage detecting coil (PT) of a inverter transformer (32) for detecting a load voltage applied from the inverter circuit (16), a current transformer (34), and a control section (22) and an oscillation circuit (20) for controlling the starting voltage and current of the discharge lamp.
Abstract: A discharge lamp lighting apparatus according to this invention includes an inverter circuit (16) for supplying a high frequency power source to a discharge lamp (18) having one of different ratings, a voltage detecting coil (PT) of an inverter transformer (32) for detecting a load voltage applied from the inverter cir­cuit (16) to the discharge lamp (18), a current trans­former for detecting a load current supplied from the inverter circuit (16) to the discharge lamp (18), and a control section (22) and an oscillation circuit (20) for controlling the power source supplying operation of the inverter circuit (16) based on detection outputs of the voltage detection coil (PT) and current transformer (34). The control section (22) and oscillation circuit (20) sequentially raise an output of the inverter cir­cuit (16) at the starting time of the discharge lamp (18), identifies the type of the discharge lamp accord­ing to the starting voltage at the lighting time of the discharge lamp (18), and controls the starting voltage and current of the discharge lamp (18) according to the type of the discharge lamp (18) thus identified.

Patent
01 Mar 1990
TL;DR: In this paper, the authors propose to reduce the power loss when a switching device is turned off by providing a device removing charges between the gate and emitter of a bipolar type MOSFET and a device suppressing the oscillation of the gate voltage.
Abstract: PURPOSE:To reduce the power loss when a switching device is turned off by providing a device removing charges between the gate and emitter of a bipolar type MOSFET and a device suppressing the oscillation of the gate voltage. CONSTITUTION:The switching circuit 13 of an inverter circuit 3 is connected to a driving circuit 15 via a parallel circuit of a resistor R10 and a capacitor C10. When the circuit 13 is turned off, charges between the gate and emitter of an FET101 are instantaneously charged, i.e., the capacitor C10 removes the charges between the gate and emitter. Since the parallel circuit of the resistor R10 and the capacitor C10 is inserted between the gate of the circuit 13 and the circuit 15, the gate voltage VGE when the circuit 13 is turned off is lowered to 0V, the circuit 13 is surely and instantaneously turned off, thus the ringing generated by the inductance existing in a wiring material between the circuit 3 and the circuit 15 can be suppressed.

Journal ArticleDOI
TL;DR: In this paper, an analysis of the brushless DC motor with a 120 degrees inverter is presented, and it is shown that the motor phase current in which the inverter transistors are not conducting (gated off) is used to classify the modes of operation.
Abstract: An analysis of the brushless DC motor with a 120 degrees inverter is presented. It is shown that the brushless DC motor-120 degrees inverter system has several distinct operating modes. The status of the motor phase current in which the inverter transistors are not conducting (gated off) is used to classify the modes of operation. These modes are identified and their relationship to the speed and the advance in the firing angle is established. >

Journal ArticleDOI
TL;DR: In this paper, the authors presented an analysis for a class-E power inverter that exhibits any of the following characteristics: (1) load-independent, nonzero output voltage, but not load independent efficiency; (2) load independent non-zero efficiency, not load output voltage; (3) simultaneous load independent, non zero output voltage and loadindependent nonzero efficiency.
Abstract: An analysis is presented for a class-E power inverter that exhibits any of the following characteristics: (1) load-independent, nonzero output voltage, but not load-independent efficiency; (2) load-independent nonzero efficiency, but not load output voltage; (3) simultaneous load-independent, nonzero output voltage and load-independent nonzero efficiency. Solutions for a class-E inverter with load-independent, nonzero output voltage and 100% efficiency are given. The infinite set of solutions is reduced by practical considerations. Circuit parameters for practical load-independent class-E inverters are provided. >

Journal ArticleDOI
07 Oct 1990
TL;DR: In this paper, a reduced-harmonics pulsewidth modulator and its application to the control of a three-level line-side power converter for a speed-variable AC drive are described.
Abstract: A reduced-harmonics pulse-width modulator and its application to the control of a three-level line-side power converter for a speed-variable AC drive are described. The pulse-width modulation scheme for the voltage source inverter determines each individual switching instant on the basis of a continuously updated volt-second balance between the reference vector and the actual switching state vector. The generated pulse sequence is shown to be asynchronous. The Fourier spectra are characterized by the absence of high-amplitude discrete carrier components. The emission of acoustic noise radiated from magnetic components is reduced. Experimental results have been obtained from a transistor converter operated from the 660 V industrial power supply. The DC-link voltage is 1200 V. With appropriate simplifications, the method is suitable for the control of two-level inverters as well. >

Journal ArticleDOI
01 Mar 1990
TL;DR: In this article, the effect of dead time on the output voltage waveforms of a bridge inverter was investigated, and it was shown that the effect can be substantially eliminated by compensating for dead time.
Abstract: The output voltage waveforms of a bridge inverter using some form of modulation strategy, such as pulse width modulation (PWM), are not the same as the ideal modulated waveforms because of the effect of ‘dead time’. This is the short period of time that is allowed to elapse for safety reasons between switching one device in an inverter leg off and the other device on. It has been found that the dead time causes a reduction in the fundamental component of the output voltage and introduces low order harmonics which are not intrinsically present in the ideal modulated waveforms.In variable speed drive systems the reduction in fundamental voltage causes a reduction in the torque. Furthermore, with synchronous modulation strategies there is a step change in torque when a ‘gear change’ takes place. In uninterruptible power supply (UPS) systems the low order harmonics are difficult to remove, with the result that the fundamental output voltage is contaminated.Methods of compensating for dead time are proposed and investigated and it is shown that its effects can be substantially eliminated. Tests with a compensated variable speed drive, using an inverter fed induction motor, demonstrate that the torque perturbations at a gear change are now negligible. Similarly, in a UPS application the low order harmonics are found to be removed from the filtered output voltage when dead time compensation is introduced.

Journal ArticleDOI
TL;DR: In this article, a novel control approach for a robust induction motor drive system with a voltage source inverter has been developed, where the induction motor and its corresponding inverter gating signal are controlled using the decoupling control theory.
Abstract: A novel control approach for a robust induction motor drive system with a voltage source inverter has been developed. In the scheme, the induction motor and its corresponding inverter gating signal are controlled using the decoupling control theory. In addition, an adaptive optimal speed regulator employing the model reference adaptive control (MRAC) is incorporated into the drive system to compensate for unfavorable errors. The principles and special features of the control scheme are discussed, and the configuration of the drive system is presented. Comparison is made between conventional proportional plus integral (PI) control and the MRAC. Test results show the robustness and superior dynamic performance of the proposed control system. >

Journal ArticleDOI
11 Jun 1990
TL;DR: A novel DC/AC power converter for variable-speed AC motor drives using the zero voltage switching technique is described and the soft commutation reduces the constraints on the switches and the PWM enables simple and efficient regulation of the power flow.
Abstract: A novel DC/AC power converter for variable-speed AC motor drives using the zero voltage switching technique is described. This converter combines the advantages of soft commutated inverter and those of conventional PWM (pulse width modulation) control inverters. In the proposed scheme the soft commutation reduces the constraints on the switches and the PWM enables simple and efficient regulation of the power flow. Furthermore the zero voltage switching technique makes operation very safe, and switching bipolar transistors at 20 kHz is easily achieved without compromising the efficiency of the system. >

Patent
Ito Tomotaka1
19 Jul 1990
TL;DR: In this paper, a pulsewidth modulation-type inverter is proposed to operate in a high carrier frequency range, which reduces the audio noise, and it can be modified on the basis of temperature, output current, and output frequency levels.
Abstract: A pulse-width modulation-type inverter operable at a variable frequency and amplitude and having the ability to modify carrier frequency on the basis of changes in temperature, output current and output frequency levels. The inverter operates in a high carrier frequency range which reduces the audio noise.

Proceedings ArticleDOI
07 Oct 1990
TL;DR: In this article, a power factor improvement to a diode rectifier having a high-frequency inverter on the load is described based on dither signal effects for linearization of the nonlinear system.
Abstract: A power factor improvement to a diode rectifier having a high-frequency inverter on the load is described. The principle of the improvement is based on dither signal effects for linearization of the nonlinear system. A diode rectifier circuit, which can be regarded as a dead-zone element, is linearized based on this principle by adding a high-frequency dither signal to the input voltage. The output voltage of the high-frequency inverter is applied to the dither, which makes the input current of the rectifier sinusoidal. The dither rectifier circuit is composed of a diode voltage-doubler rectifier and a high frequency inverter that consists of only two switching elements. Its power factor is shown to be 99.2%, and the third and fifth harmonics are 10% and 0.4%, respectively. Uses of the high-frequency inverter in fluorescent lamp and switching power supply applications are discussed. >

Journal ArticleDOI
11 Jun 1990
TL;DR: In this article, an induction motor drive using an improved high-frequency resonant DC link inverter is presented, which solves voltage overshoot and zero-crossing failure problems in the ordinary resonant dc link inverters.
Abstract: An induction motor drive using an improved high-frequency resonant DC link inverter is presented. The resonant circuit was systematically analyzed first to establish the criteria for initial current selection, and a new circuit was then proposed to establish the bidirectional initial current. The proposed current initialization scheme solves voltage overshoot and zero-crossing failure problems in the ordinary resonant DC link inverters. A three-phase 3 kW IGBT (insulated-gate bipolar transistor) based 60 kHz resonant link inverter has been constructed and successfully tested with an induction motor drive. The speed control system is implemented using two microprocessors: TMS320C25 for computation and INTEL 80386 for monitoring and user interface. Experimental results showing the superior operation of the proposed resonant DC link inverter drive are presented. >

Patent
Hiroyuki C1, Hideaki C1, Yasunori C
13 Nov 1990
TL;DR: In this paper, an inverter is formed of three transistors including the transistor having its gate connected to the dummy word line, with the output of the inverter connected to a capacitor.
Abstract: A random access memory (RAM) array has a dummy word line having a similar pattern to the word lines provided for the RAM cells. A transistor having the same channel width and channel length as one of the transistors in the RAM cells has its gate connected to the dummy word line. An inverter is formed of three transistors including the transistor having its gate connected to the dummy word line, with the output of the inverter connected to a capacitor. The capacitance of the capacitor is set close to the capacitance of a bus line of the RAM to adjust the dummy word line and the word lines of the RAM circuits to have the same transfer delay. If the capacitance of the capacitor is made slightly smaller than the bus line capacitance, the potential at the output of the inverter can be changed by this difference. The output of the inverter is detected, and can be used as a drive signal to drive a sense amplifier used to read the RAM cells. Further, the signal traveling through the dummy word line can be used as a precharge signal.

Proceedings ArticleDOI
01 Dec 1990
TL;DR: In this article, the authors proposed resistive-load-based deadbeat (DB) control, disturbance-observer-based DB control I, internal-model-principle-based pole placement, and digital proportional-integral (PI) control.
Abstract: The five schemes are resistive-load-based deadbeat (DB) control, disturbance-observer-based DB control I. disturbance-observer-based DB control II, internal-model-principle-based pole placement, and digital proportional-integral (PI) control. The control schemes are applicable to single-phase and three-phase balanced-load inverter systems because the balanced three-phase system can be converted to two decoupled single phase systems. The modification of the control law from a single-phase to a three-phase system is explained. Simulations were performed in both systems, and experiments were carried out in the three-phase PWM inverter system. The disturbance-observer-based I and the digital PI control schemes yielded the best overall performance. The former is better in terms of total harmonic distortion for a nonlinear load, but the latter is based on a much simpler algorithm. >

Proceedings ArticleDOI
07 Oct 1990
TL;DR: In this article, a high-frequency quasi-resonant DC voltage notching inverter derived from a resonant DC link inverter is discussed, which provides a DC voltage with resonant notches to the inverter such that the switch can switch at zero voltage crossing.
Abstract: A high-frequency quasi-resonant DC voltage notching inverter derived from a resonant DC link inverter is discussed. The quasi-resonant link circuit provides a DC voltage with resonant notches to the inverter such that inverter switches can switch at zero voltage crossing. Compared to resonant DC link inverters, the size of passive components is reduced. Compared to traditional pulse-width modulation (PWM) inverters, the efficiency and performance are largely improved because high-frequency switching occurs at zero voltage crossing. The resonant voltage notches can be created at any instant, which permits the inverter to operate at standard or optimized PWM control. A least current error square method is proposed to incorporate the quasi-resonant DC voltage notching inverter, resulting in minimum output current ripples. For regenerative-type AC drive operation, a bidirectional current initialization is included in the circuit. The complete system was simulated using PC-SIMNON and fabricated as a laboratory prototype. >