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Showing papers on "Junction temperature published in 1991"


Journal ArticleDOI
TL;DR: In this paper, a novel method that converts a semiconductor transient thermal impedance curve (TTIC) into an equivalent thermal RC network model is presented, which is illustrated using an isolated base power transistor module.
Abstract: A novel method that converts a semiconductor transient thermal impedance curve (TTIC) into an equivalent thermal RC network model is presented. Thermal resistance (R) and thermal capacitance (C) parameters of the model are identified using manufacturer's data and offline recursive least square techniques. Relevant estimation theory concepts and the formulation of an appropriate model for the identification process are given. Model synthesis is illustrated using an isolated base power transistor module. The application of time decoupled theory for high order thermal models is outlined. Simulation of junction temperature responses using model and manufacturer TTICs are compared. Estimated parameter validity is further confirmed by parameter calculation obtained from module physical dimensions. >

65 citations


Patent
01 Aug 1991
TL;DR: In this article, the output of the thermopile is calibrated to best match a linear function which intersects the thermopsile output function at a temperature in the center of a temperature range of interest.
Abstract: A radiation detector employs a thermopile having a potentiometer for calibrating the thermopile output to best suit a particular output meter and sensing application. A thermocouple may be connected in series with the thermopile. The output of the thermopile is calibrated to best match a linear function which intersects the thermopile output function at a temperature in the center of a temperature range of interest. A total output signal of the detector is the sum of the thermopile signal and the thermocouple signal, and is indicative of the temperature of a target emitting radiation sensed by the thermopile. The series connection of the thermopile and the thermocouple allow the thermopile hot junction temperature to be referenced to the cold junction temperature of the thermocouple. Thus, the reference temperature may be remote from the thermopile sensor. A filtering lens may be used to prevent short wavelength radiation from reaching the thermopile sensor, improving the linearity of the thermopile response. To improve the response to low emissivity targets, long wavelength radiation may be filtered out at a loss of linearity. Two detectors may be connected differentially to provide a differential output indicative of the temperature difference between two targets. Additionally, a temperature dependent variable resistor may be coupled to the thermopile, providing a variable resistance that combines with the thermopile output response to produce a linearized thermopile output response. Then, the total output signal of the detector for a particular target temperature is independent of fluctuations in local temperature.

55 citations


Patent
24 Jul 1991
TL;DR: In this paper, an FET protection circuit (10; 100) senses the temperature of a FET and, via a control circuit (24), increases FET conduction in response to sensed FET temperature exceeding a high temperature threshold (160° C) close to the maximum rated junction temperature (175° C.) of the FET.
Abstract: FET protection circuit (10; 100) senses the temperature of a FET (11) and, via a control circuit (24), increases FET conduction in response to sensed FET temperature exceeding a high temperature threshold (160° C.) close to the maximum rated junction temperature (175° C.) of the FET. This allows the FET to survive excessive drain-to-source voltages which occur during load dump conditions even when load dump is sensed by a zener diode (26) which initially turns on the FET. During load dump after a zener diode (26) turns on the FET, in response to sensing excessive FET temperature the FET is turned in harder so as to reduce the drain-to-source voltage (V DS ) and minimize power dissipation during load dump thereby protecting the FET. Normal overcurrent and maximum temperture turn off circuitry (44, 33, 60-63) is effectively overridden by high temperature threshold turn-on circuitry (50). Preferably, a majority of the control circuit (24) is provided on an integrated circuit, but an external resistor (31) allows effective adjustment of two temperature thresholds (150° C., 160° C.) above which control signals provided to the FET will be modified.

49 citations


Patent
12 Feb 1991
TL;DR: In this article, an insulating sealing material is continuously agitated as pretreatment before the casting work of the insulation sealing material at high temperature, keeping the high temperature even during casting work, and increasing the settling velocity of the heat conducting medium.
Abstract: PURPOSE:To make it possible to isolate power laminates and a control element thermally in a single step and to provide a broad range for operating temperature by continuously agitating an insulating sealing material at high temperature, keeping the high temperature even during casting work, and increasing the settling velocity of the heat conducting medium. CONSTITUTION:An insulating sealing material 15 is continuously agitated as pretreatment before the casting work of the insulation sealing material 15 at high temperature. The high temperature is kept even during the casting work. Viscosity is decreased. Thus, the sedimentation velocity of a heat conducting medium 16 is increased. As a result, a high-heat conducting part 17 for sealing a power elements 13 and 14 and a low-heat conducting part 18 for sealing a control element 12 can be thermally isolated effectively in a single step. In this way a thermal gradient can be provided in the same package. The heat generated from the power elements 13 and 14 is hard to transmit to the control element 12. As the semiconductor device, the operating temperature range can be set within the allowable junction temperature range on the side of the power elements. Thus the semiconductor device can be used in said temperature range. In this way, the operation temperature range can be set in the broad temperature range.

49 citations


Patent
05 Nov 1991
TL;DR: In this paper, a control system for regulating the temperature of a heat detector disposed on a heat exchanger is presented, which includes a temperature detector (42), non-liquid cooling means (50,52) for cooling the detector when its temperature is above the desired temperature range, and nonliquid heating means (48,53) for heating the detector if its temperature below the temperatures range.
Abstract: A control system for regulating the temperature of a heat detector disposed on a heat exchanger. The control system includes a temperature detector (42) for determining the temperature of the hot spot sensor (32), non-liquid cooling means (50,52) for cooling the detector when its temperature is above the desired temperature range, and non-liquid heating means (48,53) for heating the detector when its temperature is below the temperatures range. The control system includes control means (82) coupling the temperature sensing means to the non-liquid heating and cooling means. By keeping the heat detector at a generally constant temperature, the accuracy of the hot spot sensor on the heat exchanger is improved.

47 citations


Journal ArticleDOI
TL;DR: In this article, a Gummel-Poon (GP) bipolar junction transistor (BJT) model that includes self-heating is presented, and a current-mirror circuit is used to show its significance.
Abstract: A Gummel-Poon (GP) BJT (bipolar junction transistor) model that includes self-heating is presented, and a current-mirror circuit is used to show its significance Self-heating thermal effects are modeled by a simple electrical analog circuit, which also provides BJT junction temperature as part of the CAD solution Both discrete-BJT and IC mirror circuits are tested The self-heating model correctly simulates the temperature stability of the IC mirror circuit where the BJTs are in close thermal proximity For the discrete-BJT circuit, a standard GP model produces errors up to 84% versus 61% for the self-heating model >

35 citations


Proceedings ArticleDOI
R. Sullhan1, M. Fredholm1, T. Monaghan1, A. Agarwal1, B. Kozarek 
12 Feb 1991
TL;DR: In this paper, a finite element computer program was used to build the thermal model of a ceramic pin grid array and multichip module and the effects of the air flow, the thermal conductivity of the substrate material, the substrate thickness, the die attach material, and die attach thickness have on internal and external resistances of pin grid arrays.
Abstract: The thermal analysis of a ceramic pin grid array and multichip module was performed. A finite element computer program was used to build the thermal model. The effects that the air flow, the thermal conductivity of the substrate material, the substrate thickness, the thermal conductivity of the die attach material, and the die attach thickness have on internal and external resistances of pin grid arrays are addressed, covering the factors that control the internal and external resistances of the package. In the case of multichip modules the effects of these parameters on the maximum junction temperature rise and maximum case temperature rise have been studied. Experimental results for a ceramic pin grid array are presented. A set of charts can be used for quickly designing the package, and for choosing assembly materials and the environment for the most optimum thermal management. >

21 citations


Journal ArticleDOI
TL;DR: In this paper, a physical understanding of the specific mode of operation of high-power millimeter-wave pulsed IMPATT diodes is derived from a self-consistent numerical model.
Abstract: A physical understanding of the specific mode of operation of high-power millimeter-wave pulsed IMPATT diodes is derived from a self-consistent numerical model. It is shown theoretically that there exists a uniformly avalanching p-i-n-like mode in high-current-density, pulsed silicon double-drift IMPATT diodes, as has been previously suggested. An optimum symmetrical flat doping-profile double-drift structure for 100-GHz operation is presented. It could deliver more than 40 W of available peak power with a 10% conversion efficiency accounting for circuit losses, at a safe junction temperature rise. The theoretical results allow an optimum design of the 94-GHz IMPATT structure for peak output power in excess of 50 W under low duty cycle. >

19 citations


Patent
01 Aug 1991
TL;DR: In this article, a PN junction diode group is supplied with a constant current in the forward direction, whereby the potential difference between the terminals thereof changes according to the surface temperature of the semiconductor chip.
Abstract: A semiconductor integrated circuit includes a semiconductor chip having a predetermined circuit device and a PN junction diode group formed on the surface thereof. The PN junction diode group is supplied with a constant current in the forward direction, whereby the potential difference between the terminals thereof changes according to the surface temperature of the semiconductor chip. A potential difference generating circuit generates a fixed potential difference corresponding to a predetermined limit temperature of the chip surface, whereby the potential difference between the terminals of the PN junction diode group is compared with the fixed potential difference. As a result, when the determination in made that the temperature of the semiconductor chip surface reaches the limit temperature, the operation of the circuit device is temporarily or completely halted.

19 citations


Proceedings ArticleDOI
C.Z. Lu, M.Z. Wang, X. Gui, G.B. Gao, B.J. Yi 
12 Feb 1991
TL;DR: In this paper, an electrical technique is described which can perform a fast measurement of the peak junction temperature of power transistors, which can provide convenience for device manufacturers and users in evaluating device thermal behavior and conducting reliability screening.
Abstract: An electrical technique is described which can perform a fast measurement of the peak junction temperature of power transistors. The fundamental principles of this technique are summarized as three modifications to the standard electrical technique for measuring the junction temperature. Personal-computer-controlled equipment has been developed based on these principles. In comparison with the infrared-measured peak junction temperature, the measuring error of the equipment is within 8%, whereas the error of the standard electrical method may be up to 50% under the same conditions. The equipment reported here can provide convenience for device manufacturers and users in evaluating device thermal behavior and conducting reliability screening. >

15 citations


Patent
Denis M. Flynn1, Peter M. Ippolito1
16 May 1991
TL;DR: In this article, an on-chip thermal shutdown circuit senses the average junction temperature of an integrated circuit device and generates a signal when the junction temperature exceeds a preset limit, which can then be used to control other circuitry such that the electrical shutdown of the integrated circuit devices is enabled under conditions of excessive device temperature.
Abstract: An on-chip thermal shutdown circuit senses the average junction temperature of an integrated circuit device. The on-chip circuit generates a signal when the junction temperature exceeds a preset limit. This signal may then be used to control other circuitry such that the electrical shutdown of the integrated circuit device is enabled under conditions of excessive device temperature. In this manner, catastrophic device damage can be avoided and the host system can be notified of the existence of a fault condition.

Journal ArticleDOI
TL;DR: In this article, an experimental investigation was conducted to determine the thermal conductivity, the overall thermal conductance, and the thermal contact conductance between layers of stacked aluminum alloy 3004, 5042, and 5182 sheet.
Abstract: An experimental investigation was conducted to determine the thermal conductivity, the overall thermal conductance, and the thermal contact conductance between layers of stacked aluminum alloy 3004, 5042, and 5182 sheet. Tests were conducted for aluminum sample thicknesses of 0.0305-0.3074 cm (0.012-0.121 in.), mean junction temperatures of 79.5 and 165.5°C (175 and 330°F), and contact pressures of 0.689-10.34 MPa (100-1500 psi). The overall thermal conductance increased with increasing contact pressure and increasing temperature. It decreased as the number of aluminum layers was increased. The experimental data were used to derive thermal contact conductance between layers of stacked aluminum sheet. From these derived values, a correlation for the thermal contact conductance was developed. The resulting expressions are presented as a function of dimensionless parameters for the layer material, apparent contact pressure, and mean junction temperature.

Journal ArticleDOI
TL;DR: In this paper, the effects of the optical power level on the degradation rate are examined, and it is shown that the maximum cw 300K power output for these devices (∼30 mW/facet) is limited by catastrophic facet degradation.
Abstract: Data are presented on the continuous (cw) 77–200 K operational characteristics of cw 300‐K AlxGa1−xAs‐GaAs quantum‐well heterostructure diode lasers grown on Si substrates. Operation is demonstrated for over 500 h with a junction temperature as high as ∼200 K for a diode previously operated cw 300 K for over 10 h with its junction side mounted away from the heat sink. The data indicate that longer cw 300‐K lifetimes than previously demonstrated (17 h) may be possible. The effects of the optical power level on the degradation rate are examined, and it is shown that the maximum cw 300‐K power output for these devices (∼30 mW/facet) is limited by catastrophic facet degradation. The effects of naturally occurring microcracks on device stability are also considered, and the effect of stress on the output polarization is measured and discussed.

01 Jan 1991
TL;DR: In this article, a Gummel-Poon (GP) BJT model with self-heating is presented and a current-mirror circuit is used to show its significance.
Abstract: A Gummel-Poon (GP) BJT model that includes self-heating is presented and a current-mirror circuit is used to show its significance. Self-heating thermal effects are modeled by a simple electrical analog circuit, which also produces BJT junction temperature as part of the CAD solution. Both discrete- BJT and IC mirror circuits are tested. The self-heating model correctly simulates the temperature stability of the IC mirror circuit where the BJT's are in close thermal proximity. For the discrete-BJT circuit, a standard GP model produces errors up to 84% versus 6.1% for the self-heating model when compared with experimental results.

Journal ArticleDOI
TL;DR: AlGaAs/GaAs power heterojunction bipolar transistors on Si substrates exhibiting uniform junction temperature distribution are reported in this paper, where the temperature spread across the entire device area is about 1 ǫ°C.
Abstract: AlGaAs/GaAs power heterojunction bipolar transistors on Si substrates exhibiting uniform junction temperature distribution are reported. Owing to a unique device design, the temperature spread across the entire device area is about 1 °C. The device exhibits a common emitter current gain of 20, a maximum collector current of 0.6 A, and a collector base junction breakdown voltage of 25 V.

Journal ArticleDOI
TL;DR: In this paper, a Gummel-Poon model that accounts for self heating in the bipolar-junction (BJT) transistor is presented, which uses a simple but flexible RC analog circuit for thermal effects.
Abstract: A Gummel-Poon model that accounts for self heating in the bipolar-junction (BJT) transistor is presented. The model uses a simple but flexible RC analog circuit for thermal effects. Junction temperature as a voltage is a byproduct of the modeling approach. In contrast to the standard model, this model does not require changes in BJT parameters in order to track circuit changes that affect BJT dissipated power. Although not presented here, transient behavior due to self heating and thermal capacitance has been tested, and it is also correctly predicted by this model. >

Journal ArticleDOI
TL;DR: In this paper, a gate-controlled diodes were fabricated to study the breakdown behavior and surface effects of metal oxide semiconductor field effect transistor (MOSFET), and I-V characteristics were measured as a function of gate voltage and temperature.
Abstract: InSb gate-controlled diodes were fabricated to study breakdown behavior and surface effects. I-V characteristics were measured as a function of gate voltage and temperature. The results indicated that a field-induced junction was formed as the negative bias exceeded -4 V. The field induced junction was found to have a breakdown voltage smaller than that of the metallurgical junction. Saturation of the breakdown current in the field-induced junction was also observed, which could be explained by the conducting channel effect similar to that in the metal oxide semiconductor field effect transistor (MOSFET). The reverse current was also measured as a function of temperature to study the leakage mechanism. The strong exponential temperature dependence suggested that the reverse current was dominated by the G-R mechanism.

Patent
07 Oct 1991
TL;DR: In this paper, the authors propose to feed a maximum effective current from a servo amplifier and to make full use of the capacity of a semiconductor by limiting current to be fed to the servo motor so that the estimated junction temperature of the semiconductor will not be lower than a predetermined value.
Abstract: PURPOSE:To feed a maximum effective current from a servo amplifier and to make full use of the capacity of a semiconductor by limiting current to be fed to the servo amplifier so that the estimated junction temperature of the semiconductor will not be lower than a predetermined value. CONSTITUTION:A current detector 6 directly detects the load current (i) of a servo motor 4 which is then fed back, as a current feedback signal If, to an observer 7 and a speed control section 1. Junction temperature of a semiconductor 3 is then estimated through the observer 7 based on the load current (i) of the servo motor 4 and the duration thereof. Current to be fed from the servo motor 4 is then limited so that the junction temperature does not exceed a predetermined value at any time thus protecting servo amplifier while feeding a maximum effective current thereto.

Journal ArticleDOI
TL;DR: In this paper, the authors address the issue of thermally induced stress on the microelectronic product at all levels of packaging, with major emphasis on component and substrate levels, and present several ways and examples of reducing or eliminating this stress, which is a major cause of device failures.
Abstract: The complexity of microelectronic circuits, their scale of integration and clock speed requirements have been increasing steadily. All these changes have the effect of increasing the power density of the microcircuits. ICs with a power of several watts and an area of over a square centimetre are quite common. Thus, there is more heat generated per device at die, component and substrate‐attach levels of electronic packaging. In order to maintain reliability of finished products, the junction temperature of the constituent devices must be kept low. It has been demonstrated that thermal management can be one key to lowering the cost and increasing the performance life of microelectronic products. The cost‐effectiveness of lowering device temperature has been demonstrated to be dramatic compared with the cost of thermal management materials. Proper thermal management of advanced microelectronic devices has to be addressed at all levels. One should address the problem from the basic level of die‐attach, through component‐attach, and eventually substrate‐attach to thermal drains. Thermal management is almost invariably coupled with a thermally induced stress problem. The increase in temperature at the device level also means a larger fluctuation of temperature from the ambient. Each cycle of on‐off for the device represents one thermal cycle. Stress‐induced failure due to coefficient of thermal expansion (CTE) mismatch is much more acute for higher power devices. In this paper, the authors address the issue of thermally induced stress on the microelectronic product at all levels of packaging, with major emphasis on component and substrate levels. Various ways and examples of reducing or eliminating this stress, which is a major cause of device failures, will be demonstrated. One of the proven methods is through the use of low Tg epoxies with high thermal stability.

Patent
21 Nov 1991
TL;DR: In this paper, the junction temperature of a power device is estimated through a thermosensor and, if the estimated value exceeds the maximum rated temperature of the power device, a base signal supplied to the power devices is cut off.
Abstract: PURPOSE:To protect a power device from overheating securely and prevent an overcurrent from being applied to a servomotor by a method wherein the junction temperature of the power device is estimated through a thermosensor and, if the estimated value exceeds the maximum rated temperature of the power device, a base signal supplied to the power device is cut off. CONSTITUTION:In accordance with the temperature of a power device detected by a thermosensor 5 and a torque command value supplied to a servodriver, the junction temperature of the power device which is a thermal energy stored in the power device by the torque command value is estimated by a processing part (CPU) 4. If the junction temperature of the power device which is estimated by the CPU 4 exceeds the predetermined absolute maximum rated temperature of the power device, a cut-off signal Sc is outputted and a base signal for the power device in a current amplifying circuit 2 is cut off and, accordingly, a current supplied to a servomotor 3 is cut off.

Patent
14 Aug 1991
TL;DR: In this article, the correlation of the voltage drop and the junction temperature between the source and drain at centroid points in a thermostatic bath has been obtained with high reliability.
Abstract: PURPOSE:To enable a measurement with high reliability by obtaining each correlation of a junction temperature and voltage drop between a source/drain at a 1st measurement and of a breakdown strength for drain and voltage drop between the source/drain at a 2nd measurement, and obtaining the correlation of the junction temperature and breakdown strength for drain from both correlations stated above. CONSTITUTION:The temperature in a thermostatic bath is gradually raised and the voltage drops between the source/drain at centroid points are obtained respectively, then the correlations of these voltage drops and junction temperature are obtained from the above result. Next, only a MOSFET 1 is put into the thermostatic bath and the voltage is impressed from a high voltage source 7 while keeping the temperature of thermostatic bath to the base temperature required for generating a self-heating phenomenon to the FET 1, then the drain voltage is measured after awaiting the raise of junction temperature and the drain current is made to flow inversely by instantaneously changing a switch 11 over to a low voltage source 8 to measure the voltage drop between the source/drain, thence the correlation for both is obtained by repeating this procedure. The correlation of the junction temperature and breakdown strength for drain can be thus obtained. By this arrangement, the measurement for breakdown strength characteristic regarding the correlation for both can be performed with high reliability.

Patent
22 Aug 1991
TL;DR: In this paper, the Peltier effect is used to control the temperature inside a computer case to a virtual junction temperature adequate for a semiconductor by a method wherein an electronic cooler taking advantage of a Peltiers effect is built in an electronic equipment, and temperature inside the equipment case is controlled by the cooling power of the cooler concerned.
Abstract: PURPOSE:To enable even a computer of highly dense mounting to be forcibly cooled down so as to set a temperature inside a computer case to a virtual junction temperature adequate for a semiconductor by a method wherein an electronic cooler taking advantage of a Peltier effect is built in an electronic equipment, and the temperature inside the equipment case is controlled by the cooling power of the cooler concerned. CONSTITUTION:An electronic cooler 2 composed of a cooling conductor 2c and others starts to absorb heat when a direct current power supply 2g supplies a current to the cooler 2. The heat absorption concerned can be optionally changed by varying metals 2a and 2b of the cooler 2 in material, size, and number, and a current in intensity, and the cooler 2 has such a thermoelectric power that it can refrigerate if necessary. Therefore, the material, the size, and the number of the metal plates 2a and 2b and the intensity of a current are properly selected corresponding to the heat release value of a computer to cool down the inside of the computer case to an optimal temperature conforming to the virtual junction temperature of the semiconductor in a computer. By this setup, an electronic equipment can be cooled down to a temperature lower than the outside air temperature, so that even a computer of highly dense mounting can be easily cooled by an electronic cooler of this design.

Patent
20 Jun 1991
TL;DR: In this article, the reference junction of a thermocouple is thermally coupled to a temperature sensitive piezoelectric oscillating element, which detects the temperature of the terminals at a reference junction, determines the frequency of an oscillator, and is connected to the computer to which a digital electrical signal corresponding to this temperature is supplied.
Abstract: Methods and circuit arrangements are known for measuring the temperature of a measuring point by means of a thermocouple having at least two thermolimbs united thermally at a point, whose connections are at a reference junction temperature differing from the measuring point, the thermo-electromotive force applied between the terminals being converted into digital electrical signals and supplied to a computer in which the supplied thermo-electromotive force of the thermocouple is corrected taking account of the reference junction temperature, and thereafter supplied to a display and/or a measured value output. In order to provide a method and a circuit arrangement which deliver with the lowest possible outlay on equipment an accurate value for the temperature to be measured using the thermocouple, the reference junction of the thermocouple is thermally coupled to a temperature-sensitive piezoelectric oscillating element, which detects the temperature of the terminals at the reference junction of the thermocouple, determines the frequency of an oscillator, and is connected to the computer to which a digital electrical signal corresponding to this temperature is supplied.

Patent
25 Sep 1991
TL;DR: In this paper, a temperature detector 34 detects the ambient temperature of an inverter and calculates the maximum allowable ON state loss of a GTO, under this temperature state, based on thus detected ambient temperature and the limit junction temperature of the gate ON thyristor(GTO) in the inverter.
Abstract: PURPOSE:To maximize the rated capacity in response to the ambient temperature by detecting the ambient temperature, calculating the maximum allowable ON state loss, and modifying the power reference based on thus calculated ON state loss. CONSTITUTION:A temperature detector 34 detects the ambient temperature of an inverter. Assuming the inverter is set in a quick conversion mode, a maximum allowable ON state loss calculating means comprising an operating circuit 23 calculates the maximum allowable ON state loss of a GTO, under this temperature state, based on thus detected ambient temperature and the limit junction temperature of the gate ON thyristor(GTO) in the inverter. A power reference modifying means comprising the operating circuit 23 modifies the effective/reactive power reference for controlling the ON/OFF timing of each GTO to an effective/reactive power reference corresponding to the maximum allowable ON state loss.

Proceedings Article
01 Jan 1991
TL;DR: In this article, the difference between virtual junction temperature atthe end and at the beginning of current pulse was calculated for all semiconductor devices whose thermal circuit can be modeled electrically by serial RC-pair connection whose forward characteristic can be approximated by threshold voltage and slope resistance.
Abstract: Diagrams for constant pulse current with rectangular and sinusoidal wave forms were calculated. They are designed to calculate the difference between virtual junction temperature atthe end and at the beginning of current pulse. The described method is valid for all semiconductor devices whose thermal circuit can be modeled electrically by serial RC-pair connection whose forward characteristic can be approximated by threshold voltage and slope resistance. The use of diagrams is illustrated.

Patent
06 Mar 1991
TL;DR: In this paper, the phase adjustment of a clock signal is adjusted after the temperature of a cooled part in a processor or cooling water becomes stable after the power source is turned on.
Abstract: PURPOSE:To improve adjustment accuracy by adjusting the phase of a clock distributing circuit after the temperature of a cooled part in a processor or the temperature of cooling water becomes stable after the power source is turned on. CONSTITUTION:The temperature value of the cooling water when the junction temperature of semiconductors of clock distributing circuits 9 - 11 is set previously in a cooling water temperature detecting means 12 in a cooling controller 2 and after a processor 1 is powered on, the temperature of the cooling water is monitored to output a cooling water temperature detection signal to a service processor 4 when the preset value is reached. The service processor 4 outputs a phase adjustment command to the clock distributing circuits 9 - 11 after detecting the cooling water temperature detection signal. Consequently, while the junction temperature of the semiconductors of the clock distributing circuits 9 - 11 becomes stable, the phase of a clock signal is adjusted to improve the adjustment accuracy of the phase.

Journal ArticleDOI
TL;DR: In this article, the enhanced high temperature gate metallizations consisting of sputtered TiWSi or TiWN were investigated in order to attain high temperature stability at temperatures in excess of 250°C.
Abstract: The enhanced high temperature gate metallizations consisting of sputtered TiWSi or TiWN were investigated in order to attain high temperature stability at temperatures in excess of 250°C. The TiWN/Au system resulted in a sheet resistance of only 11.5 mΩ/□ while TiWSi/Au resulted in 75.0 mΩ/□. The HEMTs and FETs processed with additional stable ohmic contacts of epitaxial Ge/Pd structures exhibited a stable transconductance of 160 -180 mS/mm at temperatures of 300°C. Thermal analysis indicated the peak junction temperature increase with an input power of 200mW to be less than 18°C at substrate temperature of 60°C.