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Showing papers on "Pulse-frequency modulation published in 2019"


Journal ArticleDOI
TL;DR: The nonisolated switched capacitor converter (SCC)-based multiport converter (SC-MPC) for standalone PV systems is proposed, and the results demonstrated the output voltage could be regulated independently on the battery voltage or input port of PV panels.
Abstract: Photovoltaic (PV) systems containing a rechargeable battery as an energy buffer require multiple dc–dc converters for PV panel control and battery regulation, and hence, they are prone to be complex and costly. To simplify the system by reducing the number of converters, this paper proposes the nonisolated switched capacitor converter (SCC)-based multiport converter (SC-MPC) for standalone PV systems. The proposed SC-MPC can be derived by integrating a bidirectional pulsewidth modulation (PWM) converter, series-resonant converter (SRC), and an SCC with sharing switches. PWM and pulse frequency modulation (PFM) controls are employed for the PWM converter and SRC, respectively, to regulate either a battery voltage, output voltage, or input power from a PV panel, depending on power balance among the input, battery, and load. The 150-W prototype was built for an experimental verification, and the results demonstrated the output voltage could be regulated independently on the battery voltage or input port of PV panels.

75 citations


Journal ArticleDOI
TL;DR: The proposed method is to attenuate the low frequency ripples delivered from the power factor correction (PFC) to LEDs; therefore, the capacitance is reduced for energy storage of offline LED drivers.
Abstract: High-brightness light-emitting diode (LED) is next generation of green lighting. However, the bulky electrolytic capacitor is required to compensate the difference of pulsating power, thereby restricting the lifetime. Meanwhile, the existing drivers based on pulse frequency modulation (PFM) is bound to arouse heavy electromagnetic interference. In this paper, the series resonant converter based LED drive is proposed to overcome the shortcomings of electrolytic capacitor and PFM control. The proposed method is to attenuate the low frequency ripples delivered from the power factor correction (PFC) to LEDs; therefore, the capacitance is reduced for energy storage of offline LED drivers. On account of the adoption of the switching controlled capacitor (SCC), the constant frequency control is achieved by the regulations of the equivalent capacitance. Half-bridge switches are shared by the bridgeless PFC and the resonant unit, therefore, single-stage LED drive is realized with high efficiency. In addition, SCC is simultaneously shared for the upper and lower half-bridge to reduce the cost and improve the power density. Operating principle, design considerations, and performance comparisons are examined in detail. Finally, all the superior performances of proposed LED driver are verified by simulation and experimental prototypes with two-channel LEDs, and rated output power of 80 W.

29 citations


Journal ArticleDOI
TL;DR: An input voltage modulated regulation with a low drop-out regulator at the input of the feedforward path is used to maintain the charge pump output voltage with varying load current between 1 mA and 10 mA.
Abstract: This brief presents a high-voltage generation charge pump integrated circuit (IC) with a novel regulation scheme for neural stimulation applications. Instead of using a widely used pulse frequency modulation approach with a variable clock frequency for regulation, an input voltage modulated regulation with a low drop-out regulator at the input of the feedforward path is used to maintain the charge pump output voltage with varying load current between $10~{\mu }\text{A}$ to 1 mA. The proposed charge pump IC, implemented with 0.18- $\mu \text{m}$ standard low-voltage CMOS process, reliably generates 12.8-V output voltage from a 2.8-V input and achieves more than 80% power efficiency at 1 mA load condition. The proposed IC occupies 0.6 mm $^{2}$ of core die area.

25 citations


Journal ArticleDOI
Chong Wang1, Shen Xu1, Shen Weidong1, Shengli Lu1, Weifeng Sun1 
TL;DR: In this article, a single-switched quasi-resonant flyback converter that features low switching loss and low switching noise at high switching frequency is investigated in order to realize near fully soft switching, a resonant inductor of primary side and an resonant capacitor of secondary side are utilized to recycle the transformer leakage energy and realize zero-current switching at turn off and valley switching (VS) at turn on of the primary switch.
Abstract: The demand of miniaturization of power systems has accelerated the research on high-switching-frequency power converters. A single-switched quasi-resonant flyback converter that features low switching loss and low switching noise at high switching frequency is investigated in this paper. In order to realize near fully soft switching, a resonant inductor of primary side and a resonant capacitor of secondary side are utilized to recycle the transformer leakage energy and realize zero-current switching (ZCS) at turn off and valley switching (VS) at turn on of the primary switch, and ZCS at turn off of diode. The VS is utilized based on the resonance between the resonant inductor and the equivalent switch drain capacitor. In the closed-loop control, a pulse frequency modulation mode with time fluctuation of switching period is implemented to realize VS at turn on of switch and an on – off control mode is utilized to improve the overall efficiency. Low cost, low losses, and low switching noise are all realized in the proposed prototype. The proposed concept has been validated on a 1 MHz 12 V/3 A prototype with 80 V dc input. The peak efficiency is 90.3% in the on – off mode by using GaN device without synchronous rectification.

17 citations


Journal ArticleDOI
TL;DR: This work has proposed a numerical derivation method to derive the accurate transfer gain for LLC converters with PSM + PFM control and the losses on the switches are optimised by using lower switching frequency and greater phase angle.
Abstract: The phase-shift modulation (PSM) brings wider voltage-gain range compared with pulse-frequency modulation (PFM) control to the LLC resonant converter in particular occasions such as battery charging converters. Current researches have less discussion about the converter current transfer gain especially at low voltage-gain range. The switching frequency is much increased and high circulating current occurs under low voltage range, which brings large error in the fundamental harmonic approximation analysis. This work has proposed a numerical derivation method to derive the accurate transfer gain for LLC converters with PSM + PFM control. The accurate model and equations for resonant variables are built by the static state-plane analysis. With the help of the iteration algorithm, numerical solutions are got for the resonant variables. The output current gain and the loss estimations are acquired and discussed at each operating point. The results also indicate that there are multiple solutions for the control variables, switching frequency and phase-shift angle, at the same output point. The loss optimisation method is proposed and the losses on the switches are optimised by using lower switching frequency and greater phase angle. The simulation approach and the experiment prototype test have both proved the theoretical calculations and the optimisation results.

13 citations


Journal ArticleDOI
TL;DR: A novel asymmetric pulse frequency modulation (APFM) with constant on-time is proposed for SRC operating in DCM, where the MMFD of transformer core varies linearly with the operating frequency and output voltage among the whole output voltage range.
Abstract: The series resonant converter (SRC), controlled by the traditional pulse frequency modulation (PFM) with constant on-time, can operate in discontinuous conduction mode (DCM) and is applicable for high-voltage high-power applications with the requirement of a wide output voltage range. However, in the traditional PFM with constant on-time, the resonant capacitor voltage will be higher than the input voltage during the zero current stage, leading to a higher maximum magnetic flux density (MMFD) case. To avoid this, a novel asymmetric pulse frequency modulation (APFM) with constant on-time is proposed for SRC operating in DCM, where the MMFD of transformer core varies linearly with the operating frequency and output voltage among the whole output voltage range. The high-power transformer can be designed according to highest operating frequency and the transformer turns ratio can be designed to be small. Furthermore, the proposed APFM leads to smaller peak current for all switches and fully zero-current-switching can be achieved. The output power and voltage can be still regulated, meeting the high-voltage high-power applications. For the proposed APFM, there are four different driver combinations with exact the same effects and advantages. The theoretical analysis has been validated by the established simulation model and experimental platform.

11 citations


Journal ArticleDOI
12 Oct 2019-Energies
TL;DR: In this paper, a bidirectional CLLC resonant converter (CLLC-BRC) based on GaN transistors is analyzed and designed, with the topology of the converter showing competitiveness in bidirectionally energy transmission.
Abstract: A bidirectional CLLC resonant converter (CLLC-BRC) based on GaN transistors is analyzed and designed in this paper. Similar resonant topologies are listed and commented on, with the CLLC topology showing competitiveness in bidirectional energy transmission. The analysis of the aforementioned converter has been provided, including the reveal of resonant frequencies of the CLLC topology and an improved zero-voltage switching (ZVS) condition with operation principles of the reverse mode and relevant parasitic parameters taken into account. The design methodology of the aforementioned converter based on pulse frequency modulation (PFM) is further discussed in detail. A prototype with a rated power of 400 W and a maximal operating frequency that is larger than 0.5 MHz was built to verify the proposed design methodology. The highest conversion efficiency of the prototype was 97.02% in the forward mode, and it was 95.96% in the reverse mode.

10 citations


Journal ArticleDOI
27 May 2019-Sensors
TL;DR: This paper presents a low power Gaussian Frequency-Shift Keying transceiver (TRX) with high efficiency power management unit and integrated Single-Pole Double-Throw switch for Bluetooth low energy application.
Abstract: This paper presents a low power Gaussian Frequency-Shift Keying (GFSK) transceiver (TRX) with high efficiency power management unit and integrated Single-Pole Double-Throw switch for Bluetooth low energy application. Receiver (RX) is implemented with the RF front-end with an inductor-less low-noise transconductance amplifier and 25% duty-cycle current-driven passive mixers, and low-IF baseband analog with a complex Band Pass Filter(BPF). A transmitter (TX) employs an analog phase-locked loop (PLL) with one-point GFSK modulation and class-D digital Power Amplifier (PA) to reduce current consumption. In the analog PLL, low power Voltage Controlled Oscillator (VCO) is designed and the automatic bandwidth calibration is proposed to optimize bandwidth, settling time, and phase noise by adjusting the charge pump current, VCO gain, and resistor and capacitor values of the loop filter. The Analog Digital Converter (ADC) adopts straightforward architecture to reduce current consumption. The DC-DC buck converter operates by automatically selecting an optimum mode among triple modes, Pulse Width Modulation (PWM), Pulse Frequency Modulation (PFM), and retention, depending on load current. The TRX is implemented using 1P6M 55-nm Complementary Metal–Oxide–Semiconductor (CMOS) technology and the die area is 1.79 mm2. TRX consumes 5 mW on RX and 6 mW on the TX when PA is 0-dBm. Measured sensitivity of RX is −95 dBm at 2.44 GHz. Efficiency of the DC-DC buck converter is over 89% when the load current is higher than 2.5 mA in the PWM mode. Quiescent current consumption is 400 nA from a supply voltage of 3 V in the retention mode.

10 citations


Journal ArticleDOI
TL;DR: By controlling the switches in the converter, the forward buck mode operation can be realised under PFM control, as well as the backward boost mode operationCan be realized under unilateral DPS control; therefore, the bidirectional power flow and zero-voltage-switching of all switches can be realized and the efficiency of the converter is improved.
Abstract: Bidirectional LLC resonant converter has been popular in applications such as electric vehicle, energy storage system and uninterruptible power supply for its good soft-switching characteristics. A novel control strategy combined pulse frequency modulation (PFM) with unilateral dual-phase-shift (DPS) control is proposed in this work. By controlling the switches in the converter, the forward buck mode operation can be realised under PFM control, as well as the backward boost mode operation can be realised under unilateral DPS control; therefore, the bidirectional power flow and zero-voltage-switching of all switches can be realised; thus, the efficiency of the converter is improved. The detailed operation principle, control strategies, voltage gain expression, soft-switching characteristics and design of parameters are analysed. The feasibility of PFM-DPS control is finally verified by PSIM simulation and prototype experimental results.

10 citations


Journal ArticleDOI
TL;DR: This brief describes the architecture and implementation of a novel voltage-controlled oscillator-based analog-to-digital converter (VCO-ADC) built with a pulse frequency modulation architecture where an analog feedback loop ensures both oscillation and linearity of the voltage- to-frequency conversion.
Abstract: This brief describes the architecture and implementation of a novel voltage-controlled oscillator-based analog-to-digital converter (VCO-ADC). Instead of a ring oscillator, the VCO is built with a pulse frequency modulation architecture where an analog feedback loop ensures both oscillation and linearity of the voltage-to-frequency conversion. A multibit first-order noise-shaped output is achieved by sampling a digital delay line that acts as a part of the oscillator and as a multibit quantizer. A prototype has been implemented in a 40-nm CMOS process. Although most of the circuit elements are taken from a standard digital library, a transconductor is required as the input stage. To ensure proper linearity, a bulk-driven transconductor has been designed. The ADC measurements reach 53 dB of SNDR at 1 GHz sampling frequency in a 20-MHz bandwidth with a pseudo-differential architecture. Powered at 1.1 V, the power consumption is 3.5 mW. The active area is 0.08 mm2. The resulting figure-of-merit equals 242 fJ/step.

8 citations


Journal ArticleDOI
TL;DR: In this paper, the impact of dead-time on the transistor resonant inverter operating modes depending on the ratio of the transistor switching frequency and the resonant frequency of the series-resonance circuit in the diagonal of a transistor bridge was explored.
Abstract: This study explores the impact of dead-time on the transistor resonant inverter operating modes depending on the ratio of the transistor switching frequency and the resonant frequency of the series-resonance circuit in the diagonal of the transistor bridge. On the basis of theoretical data and experimental results, a dead-time limitation relation has been offered - besides for a minimum value but for a maximum value. This provides extension of the operating mode range in zero voltage switching (ZVS).

Proceedings ArticleDOI
Tian Gao1, Ze Cheng1, Qi Wang1, Yue Li1, KeJing Zeng1, Yan Yang1 
19 Jun 2019
TL;DR: In this article, the authors established the mathematical relationship between resonant tank gain and dead-time of LLC resonant converter, and made theoretical analysis and experimental verification, and showed that without increasing the gain of the converter, increasing the dead time appropriately can reduce the switching frequency range of converter, thus reducing the design difficulty and the switching loss of converter.
Abstract: LLC resonant converter typically works in Pulse Frequency Modulation (PFM) mode. The output voltage can be adjusted by adjusting the switching frequency of the converter. In order to meet wide voltage variation and various load conditions, the switching frequency of LLC converter must be changed in a wide range, which brings great difficulties to the design of high frequency transformer and the selection of power devices. Based on the analysis of the relationship between dead-time and operating characteristics of LLC resonant converter, this paper establishes the mathematical relationship between resonant tank gain and dead-time of LLC resonant converter, and makes theoretical analysis and experimental verification. The results show that without increasing the gain of the converter, increasing the dead-time appropriately can reduce the switching frequency range of the converter, thus reducing the design difficulty and the switching loss of the converter.

Patent
14 Mar 2019
TL;DR: In this article, a switch mode power supply (voltage converter) is adapted as a current-mode control buck regulator for different loading conditions, and an adaptive duty estimation circuitry provides controllable energy to charge the power inductor.
Abstract: A switch mode power supply (voltage converter) is adapted as a current-mode control buck regulator for different loading conditions. The voltage converter operates in a continuous conduction mode (CCM) during heavy load conditions using pulse width modulation (PWM). When a zero-current detector determines no inductor current during light load conditions (discontinuous conduction mode (DCM) region), the controller initiates adaptive duty control using pulse frequency modulation (PFM). Adaptive duty estimation circuitry provides controllable energy to charge the power inductor to maintain voltage accuracy and maximize efficiency when in the PFM mode. Using clock synchronization and a single control-loop, smooth transition between PFM, PWM, and bypass modes is automatically performed. Clock synchronization from a master oscillator provides a base for frequency division in different operation modes which gives controllable evenly distributed switching harmonics. An inductor zero-current detector triggers an adaptive estimated duty cycle that is synchronized with the master oscillator.

Proceedings ArticleDOI
01 Sep 2019
TL;DR: In this paper, a direct frequency control based MPPT algorithm is proposed by analyzing the relationship between switching frequency and voltage of PV array, and parameter design constraints of LLC resonant converter to achieve MPPT is also provided.
Abstract: LLC resonant converter has advantages in efficiency when applied to photovoltaic(PV) system. However, renowned maximum power point tracking(MPPT) algorithms are mostly based on pulse width modulation(PWM) while LLC resonant converter is a pulse frequency modulation(PFM) converter. Using a PWM MPPT method in LLC converter might cause the loss of soft switching characteristic. Therefore, an MPPT algorithm based on PFM is needed. In this paper, a direct frequency control based MPPT algorithm is proposed by analyzing the relationship between switching frequency and voltage of PV array. The parameter design constraints of LLC resonant converter to achieve MPPT is also provided. Experimental results are given to verify the validity of the analysis.

Journal ArticleDOI
06 Oct 2019-Energies
TL;DR: In this paper, the authors proposed a bidirectional dc-dc converter for residential micro-grid applications, which can operate over an input voltage range that overlaps the output voltage range.
Abstract: This paper proposes a bidirectional dc–dc converter for residential micro-grid applications. The proposed converter can operate over an input voltage range that overlaps the output voltage range. This converter uses two snubber capacitors to reduce the switch turn-off losses, a dc-blocking capacitor to reduce the input/output filter size, and a 1:1 transformer to reduce core loss. The windings of the transformer are connected in parallel and in reverse-coupled configuration to suppress magnetic flux swing in the core. Zero-voltage turn-on of the switch is achieved by operating the converter in discontinuous conduction mode. The experimental converter was designed to operate at a switching frequency of 40–210 kHz, an input voltage of 48 V, an output voltage of 36–60 V, and an output power of 50–500 W. The power conversion efficiency for boost conversion to 60 V was ≥98.3% in the entire power range. The efficiency for buck conversion to 36 V was ≥98.4% in the entire power range. The output voltage ripple at full load was <3.59 Vp.p for boost conversion (60 V) and 1.35 Vp.p for buck conversion (36 V) with the reduced input/output filter. The experimental results indicate that the proposed converter is well-suited to smart-grid energy storage systems that require high efficiency, small size, and overlapping input and output voltage ranges.

Proceedings ArticleDOI
12 Jun 2019
TL;DR: The TR LLC can avoid the loop current and achieve zero voltage switching (ZVS) in the all output voltage range and improve the efficiency significantly, which includes gain characteristic and ZVS conditions.
Abstract: This paper proposes an LLC resonant converter with two added resonant cavities in the primary side of the converter and an added rectifier bridge in the secondary side (TR LLC). This converter can work in the three operating modes so that it can get a wide output voltage range. In addition, the proposed circuit can obtain any output voltage in the wide range only through the pulse frequency modulation (PFM). And then, the proposed circuit can avoid the disadvantages of phase shift modulation (PSM) method which has a narrow range of ZVS and a relatively large loop current. So, the TR LLC can avoid the loop current and achieve zero voltage switching (ZVS) in the all output voltage range and improve the efficiency significantly. This paper introduces the structure and working modes of the proposed circuit and analyzes its characteristics, which includes gain characteristic and ZVS conditions. Two 1000W prototypes of the proposed circuit and the conventional full-bridge LLC converter are established to verify the analysis and compare the efficiency.

Proceedings ArticleDOI
12 Jun 2019
TL;DR: In this article, an effective pulse frequency modulation (PFM) control strategy compatible with the charge control is designed for Single Inductor Multiple Outputs (SIMO) DC-DC to deal with its unbalanced loads.
Abstract: An effective pulse frequency modulation (PFM) control strategy compatible with the charge control is designed for Single Inductor Multiple Outputs (SIMO) DC-DC to deal with its unbalanced loads. Different from the traditional charge control strategy in PFM, it can function without buffer time that degrades the circuit efficiency. Simulation results show that the proposed PFM control strategy can steadily regulate the load-unbalance outputs, even in no load condition. Meanwhile, the PWM/PFM mode conversion can also be achieved.

Journal ArticleDOI
TL;DR: Simulation result shows that the converter provides the well-regulated line and load regulations with power efficiency of 78–82% in the load range of 10–250 mA and 0.35 μm CMOS process.

Proceedings ArticleDOI
01 Jun 2019
TL;DR: This paper proposes a new single-phase single-stage inverter for photovoltaic grid-tied systems, which consist of two switches, three capacitors, two inductors, and one diode, capable of outputting reactive power.
Abstract: Common-mode leakage current and double-line-frequency power oscillation are two major challenges of non-isolated single-phase grid-tied inverters. To overcome these two challenges, this paper proposes a new single-phase single-stage inverter for photovoltaic grid-tied systems, which consist of two switches, three capacitors, two inductors, and one diode. The proposed topology allows the negative pole of the photovoltaic panel to be directly connected to the neutral line of the utility grid so that the common-mode leakage current is eliminated completely. Then a mixed modulation strategy combining pulse width modulation and pulse frequency modulation is proposed to suppress the double-line-frequency power oscillation. Two of the capacitors are utilized to handle the power difference between the AC and DC sides, and the other is utilized to implement zero voltage switching. The proposed inverter is also capable of outputting reactive power. The validity of the proposed inverter is verified by simulation.

Journal ArticleDOI
TL;DR: A CMOS pulse frequency modulation (PFM) buck converter employing a digitally programmable voltage level-shifting technique capable of adjusting peak inductor current and output ripple voltage for different load currents is described.
Abstract: This paper describes a CMOS pulse frequency modulation (PFM) buck converter employing a digitally programmable voltage level-shifting technique capable of adjusting peak inductor current and output ripple voltage for different load currents. The conventional PFM buck converters employ either an adaptive delay time control circuit or a fixed delay time control circuit to control output ripple voltage and power efficiency with the switching frequency. However, they suffer from a large peak inductor current, resulting in reduced power efficiency. The digitally programmable voltage level-shifting circuit, based on a common source amplifier, is capable of sensing inductor current through the voltage drop caused by on-resistance of the power switch, and can control peak inductor current. The precision needed to control the magnitude of the peak inductor current can be obtained with the number of bits in the digitally programmable voltage level-shifting circuit that are dependent on the input common mode range of the comparator. Employment of one comparator with pre-control logic and post-control logic circuits allows the proposed circuit to improve power efficiency by removing additional circuits, compared with the conventional PFM buck converters. The proposed converter was implemented with a 180 nm CMOS process. The effective chip size of the core block occupies 900μm × 590μm. The proposed PFM mode buck converter with a precision of four bits to control peak inductor current is capable of accommodating an input voltage range of 2.7–3.3 V, and can produce output voltage of 1.2 V. The operational switching frequency measured is on the order of several to several hundred kHz, the load current range is under 150 mA, and the measured output ripple voltage varied, depending on the digital programming status. The measured power efficiency ranged between 70 and 84%.

Patent
01 Aug 2019
TL;DR: In this article, a power conversion circuit including an inductor and configured to convert an input voltage to an output voltage in accordance with at least one switching signal is described, and the circuit further includes an oscillator circuit configured to generate, for PFM operation, a sequence of pulses with a pulse repetition frequency that depends on the error signal and the current sense signal.
Abstract: In accordance with an embodiment, a circuit includes a power conversion circuit including an inductor and configured to convert an input voltage to an output voltage in accordance with at least one switching signal. The circuit further includes a first current sense circuit configured to generate a current sense signal that represents an inductor current, a voltage sense circuit configured to generate a voltage sense signal that represents the output voltage, and a switching controller including an error amplifier configured to generate an error signal representing the difference between a reference voltage and the voltage sense signal. The switching controller further includes an oscillator circuit configured to generate, for pulse frequency modulation (PFM) operation of the power conversion circuit, the switching signal as a sequence of pulses with a pulse repetition frequency that depends on the error signal and the current sense signal.

Proceedings ArticleDOI
01 Aug 2019
TL;DR: In this paper, the authors proposed a synchronous rectification (SR) control strategy for bidirectional full-bridge LLC resonant converter, which can operate either in boost or buck mode through controlling the switches in the converter.
Abstract: Synchronous rectification (SR) control strategy for bidirectional full-bridge LLC resonant converter is proposed in this paper. The converter can operate either in boost or buck mode through controlling the switches in the converter. The boost mode operation of SR control is analysed in detail. All the input-side switches can realize zero-voltage-switching (ZVS), while the output side switches can achieve zero-current-switching (ZCS). On this basis, the circulating energy issue in boost mode operation under synchronous pulse frequency modulation (SPFM) control method can be solved by SR control thus the converter efficiency is improved. The principle of boost mode operation, voltage gain and soft-switching characteristics are analysed in detail. The feasibility of the proposed control strategy is verified by simulation and experimental results.

Proceedings ArticleDOI
14 Apr 2019
TL;DR: This work proposes an auto-capacitor-balancing pulse frequency modulation (ACC-PFM) controller, combining peak and valley current mode control for continuous high step-up power conversion along with full-range VOUT regulation and embedded capacitor balancing.
Abstract: A 3-level boost converter substantiates integration and miniaturization by enabling higher voltage operation with lower voltage technology process, i.e. 2.5V devices are implemented to generate a maximum of 5V OUT , and concurrently providing inductor size reduction. However, flying capacitor balancing across a wide load and conversion range remains a challenge. This work proposes an auto-capacitor-balancing pulse frequency modulation (ACC-PFM) controller, combining peak and valley current mode control for continuous high step-up power conversion along with full-range V OUT regulation and embedded capacitor balancing. Moreover, a proposed delay-equalized level shifter generates duty ratios with only sub-ns deviations, resolving asymmetrical rising and falling delays that induce capacitor imbalance. It ensures the full-range operation for more than 90MHz inductor current frequency. This prototype is implemented in a 65nm CMOS process with 0.28mm2active area. Measurement results show that the converter achieves $\gt7\mathrm{X}$ step-up conversion and 96.8% peak efficiency, operating from 0.3-${3.0V}_{IN}$ to 2.4-5.0V OUT with 83mA peak output current.

Proceedings ArticleDOI
27 May 2019
TL;DR: In this article, an asymmetric half-bridge double-ended LLC converter for DC server power supply is proposed, which consists of a boost converter for pre-regulating stage and an LLC conversion for stand-by stage.
Abstract: This paper proposed an boost pre-regulating converter with an asymmetric half-bridge double-ended LLC converter for DC server power supply. Proposed converter consists of boost converter for pre-regulating stage and LLC converter for stand-by stage. Due to the integration of the switches, the switch for stand-by stage can be eliminated. Two output voltages, main output voltage and stand-by output voltage, are regulated by using both pulse width modulation and pulse frequency modulation controls. The switches in the proposed structure achieve zero-voltage-switching (ZVS) in the nominal state. As a result, the proposed structure that contains boost pre-regulating converter and LLC stand-by converter has higher efficiency than the conventional structure which has flyback stand-by converter. The feasibility of the proposed structure is confirmed with 260-380V input and 400V/500W main output, 12V/25.2W stand-by output prototype.

Journal ArticleDOI
TL;DR: In this article, a pulse width and frequency modulation (PWFM) control strategy is presented, which combines the one-comparator counter-based PWM control with PFM control to increase pseudo-1-bit resolution under constant-frequency operation.
Abstract: In this paper, a pulse width and frequency modulation (PWFM) control strategy is presented, which combines the one-comparator counter-based pulse width modulation (PWM) control with pulse frequency modulation (PFM) control to increase pseudo-1-bit resolution under constant-frequency operation. Accordingly, system stability will be enhanced significantly. As compared with the traditional counter-based PWM control, there is no difference in off-chip circuit complexity except a slight change in on-chip hardware. Finally, a prototype circuit is used to verify the proposed control concept by some experimental results with no limit cycle oscillation.

Journal ArticleDOI
TL;DR: An efficient power converter with improved power quality performances for low power LED lighting systems is developed using a single-stage single ended primary inductance converter-based light emitting diode (LED) driver useful to operate for wide supply voltage variations.
Abstract: This paper deals with the design, simulation, and implementation of a single-stage single ended primary inductance converter (SEPIC) power factor correction (PFC) converter-based light emitting diode (LED) driver useful to operate for wide supply voltage variations. The proposed non-isolated SEPIC converter has been chosen to operate in discontinuous conduction mode (DCM) using pulse frequency modulation (PFM) control scheme to control output current through an LED lamp string. The primary focus of this work is to develop an efficient power converter with improved power quality performances for low power LED lighting systems. The modeling, simulation, and implementation of the proposed driver have been carried out for a 28 W LED string load. To confirm the design of the proposed driver, various power quality performance parameters are analyzed which are found well within the norms of international standard IEC 61000-3-2 of class C equipment throughout the universal AC mains.

Journal ArticleDOI
04 Jun 2019-Energies
TL;DR: In this article, a dual-output LLC resonant converter using pulse frequency modulation (PFM) and APWM can achieve tight output voltage regulation, high power density, and high cost-effectiveness.
Abstract: A dual-output LLC resonant converter using pulse frequency modulation (PFM) and asymmetrical pulse width modulation (APWM) can achieve tight output voltage regulation, high power density, and high cost-effectiveness. However, an improper resonant tank design cannot achieve tight cross regulation of the dual-output channels at the worst-case load conditions. In addition, proper magnetizing inductance is required to achieve zero voltage switching (ZVS) of the power MOSFETs in the LLC resonant converter. In this paper, voltage gain of modulation methods and steady state operations are analyzed to implement the hybrid control method. In addition, the operation of the hybrid control algorithm is analyzed to achieve tight cross regulation performance. From this analysis, the design methodology of the resonant tank and the magnetizing inductance are proposed to compensate the output error of both outputs and to achieve ZVS over the entire load range. The cross regulation performance is verified with simulation and experimental results using a 190 W prototype converter.

Book ChapterDOI
01 Jan 2019
TL;DR: In this paper, the authors presented an efficient reconfigurable, multiple voltage gain switched-capacitor DC-DC buck converter as part of a power management unit for wearable IoTs.
Abstract: This chapter introduces an efficient reconfigurable, multiple voltage gain switched-capacitor DC–DC buck converter as part of a power management unit for wearable IoTs. The switched-capacitor converter has an input voltage of 0.6–1.2 V generated from an energy harvesting source. The switched-capacitor converter utilizes pulse frequency modulation to generate multiple regulated output voltage levels, namely 1, 0.8 and 0.6 V based on two reconfigurable bits over a wide range of load currents from 10 \(\upmu \)A to 800 \(\upmu \)A. The switched-capacitor converter is designed and fabricated in 65 nm low-power CMOS technology and occupies an area of 0.493 mm\(^2\). The design utilizes a stack of MIM and MOS capacitances to optimize the circuit area and efficiency. The measured peak efficiency is 80\(\%\) at a load current of 800 \(\upmu \)A and regulated load voltage of 1 V.

Patent
25 Oct 2019
TL;DR: In this article, a quasi-resonance control circuit and device of a primary side feedback AC-DC switching power supply is presented, which employs a method which comprises the steps: receiving a sampling signal through a constant-voltage and constant-current loop control unit and a resonance trough detection unit, and then outputting a first trigger signal and a second trigger signal to trigger the first trigger unit; triggering the second trigger unit in combination with an output signal of a current limiting unit; transmitting the signal to a pulse frequency modulation unit for pulse frequency adjustment, and finally output
Abstract: The invention belongs to the technical field of switching power supplies, and provides a quasi-resonance control circuit and device of a primary side feedback AC-DC switching power supply. The circuitand device employs a method which comprises the steps: receiving a sampling signal through a constant-voltage and constant-current loop control unit and a resonance trough detection unit; controllinga loop and detecting a resonance trough, and then outputting a first trigger signal and a second trigger signal to trigger the first trigger unit; triggering the second trigger unit in combination with an output signal of a current limiting unit; transmitting the signal to a pulse frequency modulation unit for pulse frequency adjustment, and finally outputting a corresponding control signal afterthe signal passes through a driving unit so as to control the switch-on or switch-off of a switch module; and enabling a counting unit to perform counting according to the sequential triggering sequence of the first triggering signal and the second triggering signal, and transmitting the signals to a conversion unit for digital-to-analog conversion so as to adjust the output signal of the currentlimiting unit, so that the loop is maintained to be opened at the first trough or the second trough, and the highest efficiency and the lowest anti-electromagnetic interference performance are realized.

Patent
16 May 2019
TL;DR: In this article, a controller for a power supply may operate as a quasi-resonant controller while operating in a discontinuous current mode and to operate as one of a pulse width or pulse frequency modulation controller while operation in a continuous current mode.
Abstract: In one embodiment, a controller for a power supply may be configured to operate as a quasi-resonant controller while operating in a discontinuous current mode and to operate as one of a pulse width or pulse frequency modulation controller while operating in a continuous current mode The controller may have an embodiment that varies a frequency of the switching drive signal around a center frequency while operating in the continuous current mode, and varies a value of a current sense signal but not vary the frequency of the switching drive signal around a center frequency while operating in the discontinuous current mode