Showing papers on "Switched capacitor published in 1979"
TL;DR: In this article, two closely related, low-sensitivity, active switched capacitor fitter topologies are presented, which are immune to the various parasitic capacitances normally present in switched capacitor networks.
Abstract: Two closely related, low-sensitivity, active switched capacitor fitter topologies are presented. Each of these circuits comprises two operational amplifiers and at most nine capacitors. The topologies have been carefully constructed so that they are immune to the various parasitic capacitances normally present in switched capacitor networks. One filter topology is capable of realizing any stable biquadratic z-domain transfer function, while the second one is only slightly less than fully general. Most commonly used transfer functions can be realized with either topology and will require only seven capacitors. The choice between the two topologies will generally be made on the basis of total capacitance required, dynamic range behavior, and sensitivity. A complete set of synthesis equations is given for both circuits which cover both the general and all the important special cases of the biquadratic transfer function. Finally, several examples are given which illustrate the synthesis procedures and the versatility of the filter topologies.
278 citations
01 Jan 1979
TL;DR: In this paper, the basic operation of switched-capacitor filters is reviewed, followed by a discussion of the properties of the various circuit building blocks in MOS technology, and a summary of several filter organizations which appear to be well suited to switch-capACitor implementation is presented.
Abstract: In the past several years, much progress has been made in bringing the economies of integrated-circuit technology to bear on the realization of voiceband frequency selective filters. This paper will review one approach to this problem, the use of switched-capacitor techniques. The paper emphasizes the practical aspects of switched-capacitor filter design under the constraints imposed by MOS integrated-circuit technology. The basic operation of switched-capacitor filters is reviewed, followed by a discussion of the properties of the various circuit building blocks in MOS technology. Finally, a summary of several filter organizations which appear to be well suited to switched-capacitor implementation is presented.
238 citations
TL;DR: A general formulation procedure and an exact analysis in the frequency domain for switched capacitor circuits with arbitrary inputs including cisoidal, sample-and-hold, and noise, are presented.
Abstract: In this paper a general formulation procedure and an exact analysis in the frequency domain for switched capacitor circuits with arbitrary inputs including cisoidal, sample-and-hold, and noise, are presented. No topological and duty cycle constraints have been imposed on the circuits. Transfer functions are derived explicitly in terms of circuit matrices. Various special cases of practical interest are discussed in detail. Due to the simple form of the solutions much insight has been gained in understanding the working of switched capacitor circuits. The results are numerically attractive and can be readily programmed for computer-aided design of large size circuits. A simple two-capacitor circuit has been used throughout the text for illustration under various conditions.
112 citations
TL;DR: In this article, it is shown that SC networks are time-variant sampled-data networks, which can be viewed as tandem connected four-ports in the z-domain.
Abstract: Switched-capacitor (SC) networks comprise capacitors interconnected by an array of periodically operated switches. Such networks are particularly attractive in light of the high circuit density possible with MOS integrated circuit technology and hybrid integrated circuits using thin-film and silicon technology. The paper describes the analysis of SC networks by using nodal charge equations. It is shown that SC networks are time-variant sampled-data networks, which can be viewed as tandem connected four-ports in the z -domain. One pair of ports is viewed as a signal path corresponding to the even time slots, the other pair of ports as a path corresponding to the odd time slots of the periodically operated switches. In a subsequent publication the authors will show how four-port equivalent circuits in the z-domain of six basic building blocks can be used for the description of any SC network. This method allows the direct use of traditional network analysis tools like the transmission matrix for deriving transfer functions. The method ultimately leads to a two-port analysis of SC networks in which conventional two-port theory can be applied.
104 citations
TL;DR: In this paper, the exact analysis of networks containing capacitors, independent and dependent voltage sources, and switches is presented for both transient response and frequency response, and solutions for both continuous and piecewiseconstant arbitrary inputs are handled, and the switching pattern can be periodic (with any number of subintervals per period) or nonperiodic.
Abstract: An efficient method is presented for the exact analysis of networks containing capacitors, independent and dependent voltage sources, and switches. Both continuous and piecewise-constant arbitrary inputs are handled, and solutions are presented for both transient response and frequency response. The switching pattern can be periodic (with any number of subintervals per period) or nonperiodic. The formulation proposed can be efficiently implemented on the computer and provides for user convenience; only one network topology and the switching schedule must be specified (as opposed to specifying as many topologies as there are switch position combinations). The method is especially well suited for the analysis of the recently introduced switched capacitor filters and charge redistribution circuits.
93 citations
TL;DR: Biquadratic circuits are introduced which enable the exact design of switched-capacitor filters using the bilinear z-transform, and meet their specifications up to and including one-half the sampling frequency.
Abstract: Biquadratic circuits are introduced which enable the exact design of switched-capacitor filters using the bilinear z-transform. The resulting filters are completely insensitive to stray capacitances, and meet their specifications up to and including one-half the sampling frequency.
84 citations
TL;DR: The filter is designed so that binary changes in the sampling frequency provide new sets of center frequencies which smoothly continue the logarithmic progression, and the accuracy and reproducibility inherent in the switched capacitor approach are retained.
Abstract: Techniques are presented for the design of a second-order switched capacitor filter which has its frequency response parameters programmed by the application of digital control signals. Two different types of weighted capacitor arrays are used to achieve programmability in the center frequency, peak gain, and selectivity. Experimental results are given for an integrated NMOS version with eight logarithmically-spaced center frequencies programmed by a 3 bit digital word, and 64 Q and gain values programmed by two 6 bit words. The filter is designed so that binary changes in the sampling frequency provide new sets of center frequencies which smoothly continue the logarithmic progression. Since the response depends on monolithic MOS capacitor ratios, the accuracy and reproducibility inherent in the switched capacitor approach are retained.
76 citations
TL;DR: The direct form switched-capacitor offers some useful advantages in comparison to the switched-Capacitor integrator approach, including the rejection of MOS amplifier noise and power supply noise below one-half the sampling rate, less silicon area especially when implementing high Q poles, and potential for multiplexing two or more filters.
Abstract: A new technique enabling the integration of audio frequency filters using standard MOS technology is described. This approach uses ratioed MOS capacitors, MOS amplifiers and switches to realize precision multiplication, summation, and delay functions. With these elements an analog sampled-data direct-form recursive filter, having the general biquadratic transfer function, was integrated in MNOS technology. This filter had a Q=19/spl plusmn/1 without external trimming and it could be electrically programmed into low-pass, bandpass, and high-pass responses. This biquadratic section can be used as a building block for higher order filters. The direct form switched-capacitor offers some useful advantages in comparison to the switched-capacitor integrator approach. These are the rejection of MOS amplifier noise and power supply noise below one-half the sampling rate, less silicon area especially when implementing high Q poles, and potential for multiplexing two or more filters.
75 citations
TL;DR: In this paper, the authors extended the four-port representation of SC networks by considering six basic building blocks for the design of any general active or passive SC-filter design, and the measured response is shown to coincide with the response predicted by the theory.
Abstract: In a previous publication by the authors it was shown how switched-capacitor (SC) networks can be analyzed by using nodal charge equations. The result was a description of SC networks as time-variant sampled-data networks which led to a four-port equivalent circuit representation in the z-domain. In this paper, the four-port representation is expanded by considering six basic building blocks for the design of any general active or passive SC network. With the four-port equivalent circuit representation, traditional two-port analysis tools, such as the transmission matrix and two-port transfer functions, can be used conveniently. An SC-filter design example is given and the measured response is shown to coincide with the response predicted by the theory.
70 citations
TL;DR: In this article, an extensive library of z-domain building block equivalent circuits is derived to facilitate the analysis and synthesis of switched capacitor (sc) networks, typically comprised of a single capacitor and from one to four switches.
Abstract: An extensive library of z-domain building block equivalent circuits is derived to facilitate the analysis and synthesis of switched capacitor (sc) networks. These sc building blocks, typically comprised of a single capacitor and from one to four switches, serve as basic circuit elements for sc networks in much the same spirit that resistors and capacitors serve analog networks. This building block library facilitates the derivation of canonic z-domain equivalent circuits for complex sc networks and the application of well-established mathematical network analysis and synthesis toots. What has been sought are easily applied techniques for achieving the same insights for sc networks that we have long enjoyed with analog networks.
68 citations
01 Dec 1979
TL;DR: A fully integrated DTMF receiver has been fabricated on a single CMOS chip requiring only three external passive components and combines precision filters, zero crossing detectors and amplitude detectors with digital logic.
Abstract: A fully integrated DTMF receiver has been fabricated on a single CMOS chip requiring only three external passive components. The circuit combines precision filters, zero crossing detectors and amplitude detectors with digital logic. Switched capacitor techniques are used to implement high-pass, bandpass, and bandstop filters. The receiver architecture and circuit implementation are described.
TL;DR: In this article, three switched-capacitor circuits are described which perform all filtering functions in a PCM voice CODEC, which use novel integrators and/or state-variable sections, which desensitize the overall response against stray capacitance effects.
Abstract: Three switched-capacitor circuits are described which perform all filtering functions in a PCM voice CODEC. They use novel integrators and/or state-variable sections, which desensitize the overall response against stray-capacitance effects. All filters are fully integrated on a CMOS test chip. The basic design considerations and the measured performance are discussed.
01 Dec 1979
TL;DR: In this paper, the implementation of a completely monolithic channel filter containing all frequency selective functions associated with a PCM line interface is described, and the circuit utilizes switched capacitor techniques.
Abstract: The implementation of a completely monolithic channel filter containing all frequency selective functions associated with a PCM line interface is described. The circuit utilizes switched capacitor techniques. Design of the overall architecture, the individual filter sections, and the operational amplifiers in NMOS technology is described. Experimental results are presented.
01 Mar 1979
Proceedings Article•
01 Sep 1979
TL;DR: In this article, a monolithic GaAs MESFET sample and hold switch has been designed, primarily as a research vehicle for GaAs linear integrated circuit technology, and a novel FET-ring circuit configuration has been used in order to overcome the problems associated with switch drive in more conventional circuits.
Abstract: A monolithic GaAs MESFET sample and hold switch has been designed, primarily as a research vehicle for GaAs linear integrated circuit technology. A novel FET-ring circuit configuration has been used in order to overcome the problems associated with switch drive in more conventional circuits.
TL;DR: In this article, the authors demonstrate the feasibility of replacing the static operational amplifiers in switched-capacitor m.o.s. circuits by a simple group of switches that acts as a dynamic amplifier.
Abstract: This letter will demonstrate the feasibility of replacing the static operational amplifiers in switched-capacitor m.o.s. circuits by a simple group of switches that acts as a dynamic amplifier. The method is applicable to m.o.s. and c.m.o.s. active-filter circuits such as the ladder filter and biquad, and promises to save static power and chip area by eliminating static o.a.s, as well as reducing 1/f noise.
TL;DR: A novel technique based on a special algorithm in which the capacitor array is used as a precision voltage divider is developed and a capacitor array tester consisting of both hardware and software has been built which executes this algorithm.
Abstract: The recent development of integrated circuit capacitor arrays and the growth of their applications have resulted in a need to perform precision testing as an aid to future design improvements. For reasons discussed in this paper, laboratory instruments such as capacitance bridges are not well-suited to this need. In order to test capacitor arrays accurately, a novel technique has been developed. It is based on a special algorithm in which the capacitor array is used as a precision voltage divider. A capacitor array tester consisting of both hardware and software has been built which executes this algorithm. This system has been used to perform measurements upon a large number (thousands) of NMOS and CMOS capacitor arrays. The standard deviation of this tester's measurement error is approximately 0.0009 percent of full scale (0.0088 LSB referenced to 10 bits). In contrast with manual testing with a capacitance bridge (requiring 10 min per array), the tester requires less than 5 s to fully test an array, mark the circuit and move to the next die position.
Patent•
05 Dec 1979TL;DR: In this paper, a generalized switched-capacitor biquadratic active filter comprises a pair of operational amplifiers (10, 11), each of which has an unswitched feedback capacitor (D, B) connected between its output port (3, 3') and its inverting input port (1, 1').
Abstract: Because of the very large variety of useful filter configurations, it is highly desirable to have a generalized circuit topology from which all specific filters can be derived. A generalized switched-capacitor biquadratic active filter comprises a pair of operational amplifiers (10, 11), each of which has an unswitched feedback capacitor (D, B) connected between its output port (3, 3') and its inverting input port (1, 1'). A third through-switched capacitor (C) provides feedback between the output port (3') of the second amplifier (11) and the inverting input port (1) of the first amplifier (10). A diagonally-switched capacitor (A) couples the output port (3) of the first amplifier (10) to the inverting input port (1') of the second amplifier (11). The noninverting input ports (2, 2') of the two amplifiers are connected to signal ground. The filter input terminal (5) is connected to the inverting input ports (1, 1') of each amplifier by an input circuit including a parallel array of an unswitched capacitor, a diagonally-switched capacitor, and a through-switched capacitor (L, H, G and K, J, I). Damping is provided by either a through-switched capacitor (F) connected in parallel with feedback capacitor (B), or by a unswitched capacitor (E) connected in parallel with through switched feedback capacitor (C).
TL;DR: An equivalent circuit approach to the computer-aided analysis of switched capacitor circuits is described, where the exact transfer functions of the circuits under continuous inputs are computed via the simulation of an equivalent circuit in the z domain.
Abstract: An equivalent circuit approach to the computer-aided analysis of switched capacitor circuits is described. The exact transfer functions of the circuits under continuous inputs are computed via the simulation of an equivalent circuit in the z domain. Several switched capacitor filter circuits are discussed and their simulated results are compared with measured data.
TL;DR: Switched-capacitor (s.c.) networks are of great interest owing to their compatibility with m.o.i. technology and it is shown how s.c. networks can be derived directly from continuous active RC networks.
Abstract: Switched-capacitor (s.c.) networks are of great interest owing to their compatibility with m.o.s.i.c. technology. It is shown how s.c. networks can be derived directly from continuous active RC networks. The corresponding network functions in z are obtained from those in s by using a simple `p-transformation?. It is shown that s.c. networks can also be designed directly. The resulting networks are often more versatile than those derived from another circuit type or technology. Numerous examples of both approaches to s.c. network and filter design are given and experimental results presented. Excellent agreement between theory and practice has been obtained.
TL;DR: In this article, a bilinear s-to-z transformation is used to find the switched-capacitor equivalents of a lossless floating inductor or a floating ideal f.n.r.
Abstract: A design technique is given for finding switched-capacitor equivalents of a lossless floating inductor or a floating ideal f.d.n.r. It is based on the bilinear s-to-z transformation. The resulting circuit needs only one operational amplifier with grounded input and output ports and five capacitors.
TL;DR: Using voltage inverter switches, exact analog sampled-data equivalents of Rs, Ls and Cs, as well as unit elements, can be designed with MOS capacitors and switches, which allows low power switched capacitor filters without operational amplifiers and with a frequency capability approaching the megahertz range.
Abstract: Using voltage inverter switches, exact analog sampled-data equivalents of Rs, Ls and Cs, as well as unit elements, can be designed with MOS capacitors and switches. Due to the underlying bilinear transformation, no limitation other than the Nyquist limit is imposed on the ratio of corner to sampling frequency. For an nth order filter, the number of voltage inverter switches is (n+1)/4 to (n+1)/2. A 3.4 kHz third-order Chebyshev low-pass CMOS circuit is described in detail. It uses only one voltage inverter switch implemented by a switched op amp integrator. The sampling frequency is 24 kHz, the dynamic range exceeds 70 dB and the chip area is 1.2 mm/SUP 2/. A CMOS voltage inverter switch, which has zero DC power and occupies only 0.09 mm/SUP 2/ is presented, whose dynamic range exceeds 85 dB. This allows low power switched capacitor filters without operational amplifiers and with a frequency capability approaching the megahertz range.
TL;DR: The concept of switched capacitors, originally introduced to implement integrated active filters can be applied to the realization of pseudo-RC oscillators as well if the power consumption has to be minimized.
Abstract: A CMOS sinusoidal integrated oscillator based on a switched-capacitor third-order phase-shift network is described. Frequency is proportional to that of a clock, but may be controlled by a voltage. Accuracy is a few percent for a power consumption below 0.1 /spl mu/W in the audio range.
01 Oct 1979
TL;DR: In this paper, the authors review the operating principles of both filter technologies and present some recent developments in a number of signal process applications, including the use of switched capacitor filter technology.
Abstract: Since the earliest developments of charge transfer devices for signal processing functions, there has been a rapid evolution of the technology towards the capability of implementing complex signal processing functions on a single silicon substrate. Recently, switched capacitor filter technology has proven to be a complementary monolithic filter technology which is compatible with CCD's in fabrication. We review the operating principles of both filter technologies and present some recent developments in a number of signal process applications.
TL;DR: In this paper, three methods for eliminating the effects of parasitic capacitances associated with floating capacitors in switched-capacitor filters are described, and three methods are described for eliminating their effects.
Abstract: Three methods are described for eliminating the effects of parasitic capacitances associated with floating capacitors in switched-capacitor filters.
01 Jan 1979
TL;DR: A fully-integrated NMOS electrically-programmable switched capacitor filter will be described, where digital words independently set the filter gain and Q between 1 and 65 in steps of 1.
Abstract: A fully-integrated NMOS electrically-programmable switched capacitor filter will be described. Digital words independently set the filter gain and Q between 1 and 65 in steps of 1, and the center frequency can be set to 1 of 8 values which span one frequency octave.
TL;DR: In this article, a simple high-pass filter consisting of two capacitors and a switch is analyzed in detail, and used as a vehicle to show the type of considerations involved in switched-capacitor circuits.
Abstract: A simple high-pass filter consisting of two capacitors and a switch is analyzed in detail, and is used as a vehicle to show the type of considerations involved in switched-capacitor circuits. Theoretical results are compared to experimental. The validity of approximating switched capacitors by resistors is examined for the above circuit.
TL;DR: The objective here is to describe a technique for realising transconductance elements using switched-capacitors and unity-gain buffers and the application of these elements to the realisation of a gyrator.
Abstract: The use of switched capacitors to realise conductances in m.o.s. integrated circuits is well established. The objective here is to describe a technique for realising transconductance elements using switched-capacitors and unity-gain buffers. The application of these elements to the realisation of a gyrator is presented and experimental results are discussed.
Patent•
19 Nov 1979TL;DR: In this paper, the effects of parasitic capacitances associated with the switches are discussed and the topologies that are immune to these effects are disclosed. But they do not consider the effect of the switches themselves.
Abstract: Switched capacitor topologies currently in use are susceptible to the deleterious effects of the parasitic capacitances associated with the switches. Topologies that are immune to these effects are disclosed. A first such embodiment comprises a first switch (22, 32), a capacitor (23, 33), and a second switch (24, 34) connected in series between one input terminal (1) and one output terminal (3) of the network. Third and fourth switches (26, 35 and 27, 36) are connected between the junctions (98, 42 and 99, 43) of the capacitor and the first and second switches, respectively, and the common junction (97, 41) of the second input and second output terminals (2, 4). A second embodiment is also disclosed.
TL;DR: A novel dynamic c.m.o.s. amplifier for switched-capacitor integrators is described that does not consume any static power and requires a very small chip area.
Abstract: A novel dynamic c.m.o.s. amplifier for switched-capacitor integrators is described. The amplifier does not consume any static power and requires a very small chip area.