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[서평]「Computer Organization and Design, The Hardware/Software Interface」

The fifth generation (5G) wireless network technology is to be standardized by 2020, where main goals are to improve capacity, reliability, and energy efficiency, while reducing latency and massively increasing connection density. An integral part of 5G is the capability to transmit touch perception type real-time communication empowered by applicable robotics and haptics equipment at the network edge. In this regard, we need drastic changes in network architecture including core and radio access network (RAN) for achieving end-to-end latency on the order of 1 ms. In this paper, we present a detailed survey on the emerging technologies to achieve low latency communications considering three different solution domains: 1) RAN; 2) core network; and 3) caching. We also present a general overview of major 5G cellular network elements such as software defined network, network function virtualization, caching, and mobile edge computing capable of meeting latency and other 5G requirements.

A Survey on Low Latency Towards 5G: RAN, Core Network and Caching Solutions

We present a single-chip fully compliant Bluetooth radio fabricated in a digital 130-nm CMOS process. The transceiver is architectured from the ground up to be compatible with digital deep-submicron CMOS processes and be readily integrated with a digital baseband and application processor. The conventional RF frequency synthesizer architecture, based on the voltage-controlled oscillator and the phase/frequency detector and charge-pump combination, has been replaced with a digitally controlled oscillator and a time-to-digital converter, respectively. The transmitter architecture takes advantage of the wideband frequency modulation capability of the all-digital phase-locked loop with built-in automatic compensation to ensure modulation accuracy. The receiver employs a discrete-time architecture in which the RF signal is directly sampled and processed using analog and digital signal processing techniques. The complete chip also integrates power management functions and a digital baseband processor. Application of the presented ideas has resulted in significant area and power savings while producing structures that are amenable to migration to more advanced deep-submicron processes, as they become available. The entire IC occupies 10 mm/sup 2/ and consumes 28 mA during transmit and 41 mA during receive at 1.5-V supply.

https://users.ece.utexas.edu/~adnan/comm-08/bluetooth-jssc-04.pdf

All-digital TX frequency synthesizer and discrete-time receiver for Bluetooth radio in 130-nm CMOS

The concept of concurrent multiband low-noise-amplifiers (LNAs) is introduced. A systematic way to design concurrent multiband integrated LNAs in general is developed. Applications of concurrent multiband LNAs in concurrent multiband receivers together with receiver architecture are discussed. Experimental results of a dual-band LNA implemented in a 0.35-/spl mu/m CMOS technology as a demonstration of the concept and theory is presented.

/pdf/concurrent-multiband-low-noise-amplifiers-theory-design-and-1iy48rdapl.pdf

Concurrent multiband low-noise amplifiers-theory, design, and applications

As of today, the fifth generation (5G) mobile communication system has been rolled out in many countries and the number of 5G subscribers already reaches a very large scale. It is time for academia and industry to shift their attention towards the next generation. At this crossroad, an overview of the current state of the art and a vision of future communications are definitely of interest. This article thus aims to provide a comprehensive survey to draw a picture of the sixth generation (6G) system in terms of drivers, use cases, usage scenarios, requirements, key performance indicators (KPIs), architecture, and enabling technologies. First, we attempt to answer the question of "Is there any need for 6G?" by shedding light on its key driving factors, in which we predict the explosive growth of mobile traffic until 2030, and envision potential use cases and usage scenarios. Second, the technical requirements of 6G are discussed and compared with those of 5G with respect to a set of KPIs in a quantitative manner. Third, the state-of-the-art 6G research efforts and activities from representative institutions and countries are summarized, and a tentative roadmap of definition, specification, standardization, and regulation is projected. Then, we identify a dozen of potential technologies and introduce their principles, advantages, challenges, and open research issues. Finally, the conclusions are drawn to paint a picture of "What 6G may look like?". This survey is intended to serve as an enlightening guideline to spur interests and further investigations for subsequent research and development of 6G communications systems.

The Road Towards 6G: A Comprehensive Survey

In this paper, a simulation study of the effect of antenna locations on antenna matching, bandwidth potential and radiation efficiency performance operating in 3GPP Long Term Evolution (LTE) Band 3 (1710-1880 MHz), Band 20 UL (832-862 MHz) and 2.4 GHz WLAN band (2.4-2.5 GHz), in free space and with phantom, is presented. An inverted F antenna (IFA) is utilized in this study and mounted on a small cellular wrist device. The results indicate that for each band, with efficient excitation of its fundamental mode, an antenna whose electrical field maxima located at short edge of the chassis always has higher bandwidth potential and its radiation efficiency will have less reduction when introducing phantom. Moreover, changes in matching characteristic of different antenna positions vary from each band, indicating the optimal antenna placement to obtain robust matching feature. Therefore, by comparing the variations on antenna behaviors, it provides useful insights into how to select the optimal antenna locations on the device with reduced a user effect for a specific operation band.

/pdf/effect-of-small-wearable-device-antenna-location-on-its-5g56ah8xto.pdf

Effect of small wearable device antenna location on its impedance, bandwidth potential and radiation efficiency

This paper presents a fully integrated, four-stack power amplifier for millimeter-wave wireless applications, designed and fabricated using 45nm CMOS SOI technology. The operation frequency is from 20GHz to 30GHz, with a maximum gain of 13.7 dB. Maximum RF output power, power-added eficiency and output 1dB compression point are 20.5 dBm, 29% and 18dBm, respectively, achieved at 24GHz. EVM of 12.5% was measured at average channel power of 14.5 dBm using 100MHz 16-QAM 3GPP/NR OFDM signal at 26GHz.

/pdf/ka-band-4-stack-45nm-cmos-soi-power-amplifier-supporting-4kc88pyh5d.pdf

Ka-Band 4-Stack 45nm CMOS SOI Power Amplifier Supporting 3GPP New Radio FR2 band n258

In this paper, a wideband wristband antenna for wearable device, characterized by low profile and unidirectional radiation property, is proposed. First, the Theory of Characteristic Mode (TCM) is employed to expound the operation principle of the generation of unidirectional radiation. Then, an appropriate feeding structure is chosen to excite the desired modes. As a result, the corresponding modes are excited and the unidirectional radiation is obtained. Moreover, the desired cellular operation bands (from 1710 MHz to 2155 MHz) are achieved. The total efficiency accompanied with flatness feature are at the levels of -1.5 dB and -6.5 dB in free space and with phantom respectively.

/pdf/a-low-profile-wideband-unidirectional-antenna-for-wearable-1frwu01wzo.pdf

A low profile wideband unidirectional antenna for wearable device

This paper presents simulation results of a dual-polarized 2×2 element sub-array antenna element at 15 GHz center frequency. The basic idea is to use two waveguides stacked on in a right-angle configuration to excite the orthogonal polarizations by using radiating slots. Above the slots, 4 parasitic patches are set to a form of 2×2 element sub-array. Antenna presents −10 dB impedance bandwidth from 14.3 to 15.6 GHz with better than 68 dB isolation between the excitation ports. At the aforementioned bandwidth, the total efficiency is better than −0.7 dB (> 85%). Antenna shows very good polarization properties and difference between ϕ, θ components is greater than 45 dB. Also the radiation patterns and surface current distributions at 15 GHz center frequency are presented and compared.

/pdf/dual-polarized-2-2-element-sub-array-at-15-ghz-with-high-3q9jpy56hc.pdf

Dual-polarized 2×2 element sub-array at 15 GHz with high port isolation

In this paper, we present two different broadband derivative superposition (DS) circuits for linearizing mm Wave integrated circuits and small power amplifiers implemented using 22nm CMOS SOI technology. By combining two parallel devices with different biasing different nonlinear characteristics can be provided. Measured results showed more than 30 dB IM3 improvement for conventional DS circuit values by utilizing back-gate voltage on an auxiliary amplifier. Above 3 dB gain expansion was measured by a complementary DS circuit, which uses parallel NMOS and PMOS devices. This offers a simple analog predistortion circuit for an integrated small power amplifier, for example.

Aarno Parssinen

Papers

Effect of small wearable device antenna location on its impedance, bandwidth potential and radiation efficiency

Ka-Band 4-Stack 45nm CMOS SOI Power Amplifier Supporting 3GPP New Radio FR2 band n258

A low profile wideband unidirectional antenna for wearable device

Dual-polarized 2×2 element sub-array at 15 GHz with high port isolation

Broadband Analog Predistortion Circuits Utilizing Derivative Superposition