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[서평]「Computer Organization and Design, The Hardware/Software Interface」

The fifth generation (5G) wireless network technology is to be standardized by 2020, where main goals are to improve capacity, reliability, and energy efficiency, while reducing latency and massively increasing connection density. An integral part of 5G is the capability to transmit touch perception type real-time communication empowered by applicable robotics and haptics equipment at the network edge. In this regard, we need drastic changes in network architecture including core and radio access network (RAN) for achieving end-to-end latency on the order of 1 ms. In this paper, we present a detailed survey on the emerging technologies to achieve low latency communications considering three different solution domains: 1) RAN; 2) core network; and 3) caching. We also present a general overview of major 5G cellular network elements such as software defined network, network function virtualization, caching, and mobile edge computing capable of meeting latency and other 5G requirements.

A Survey on Low Latency Towards 5G: RAN, Core Network and Caching Solutions

We present a single-chip fully compliant Bluetooth radio fabricated in a digital 130-nm CMOS process. The transceiver is architectured from the ground up to be compatible with digital deep-submicron CMOS processes and be readily integrated with a digital baseband and application processor. The conventional RF frequency synthesizer architecture, based on the voltage-controlled oscillator and the phase/frequency detector and charge-pump combination, has been replaced with a digitally controlled oscillator and a time-to-digital converter, respectively. The transmitter architecture takes advantage of the wideband frequency modulation capability of the all-digital phase-locked loop with built-in automatic compensation to ensure modulation accuracy. The receiver employs a discrete-time architecture in which the RF signal is directly sampled and processed using analog and digital signal processing techniques. The complete chip also integrates power management functions and a digital baseband processor. Application of the presented ideas has resulted in significant area and power savings while producing structures that are amenable to migration to more advanced deep-submicron processes, as they become available. The entire IC occupies 10 mm/sup 2/ and consumes 28 mA during transmit and 41 mA during receive at 1.5-V supply.

https://users.ece.utexas.edu/~adnan/comm-08/bluetooth-jssc-04.pdf

All-digital TX frequency synthesizer and discrete-time receiver for Bluetooth radio in 130-nm CMOS

The concept of concurrent multiband low-noise-amplifiers (LNAs) is introduced. A systematic way to design concurrent multiband integrated LNAs in general is developed. Applications of concurrent multiband LNAs in concurrent multiband receivers together with receiver architecture are discussed. Experimental results of a dual-band LNA implemented in a 0.35-/spl mu/m CMOS technology as a demonstration of the concept and theory is presented.

/pdf/concurrent-multiband-low-noise-amplifiers-theory-design-and-1iy48rdapl.pdf

Concurrent multiband low-noise amplifiers-theory, design, and applications

As of today, the fifth generation (5G) mobile communication system has been rolled out in many countries and the number of 5G subscribers already reaches a very large scale. It is time for academia and industry to shift their attention towards the next generation. At this crossroad, an overview of the current state of the art and a vision of future communications are definitely of interest. This article thus aims to provide a comprehensive survey to draw a picture of the sixth generation (6G) system in terms of drivers, use cases, usage scenarios, requirements, key performance indicators (KPIs), architecture, and enabling technologies. First, we attempt to answer the question of "Is there any need for 6G?" by shedding light on its key driving factors, in which we predict the explosive growth of mobile traffic until 2030, and envision potential use cases and usage scenarios. Second, the technical requirements of 6G are discussed and compared with those of 5G with respect to a set of KPIs in a quantitative manner. Third, the state-of-the-art 6G research efforts and activities from representative institutions and countries are summarized, and a tentative roadmap of definition, specification, standardization, and regulation is projected. Then, we identify a dozen of potential technologies and introduce their principles, advantages, challenges, and open research issues. Finally, the conclusions are drawn to paint a picture of "What 6G may look like?". This survey is intended to serve as an enlightening guideline to spur interests and further investigations for subsequent research and development of 6G communications systems.

The Road Towards 6G: A Comprehensive Survey

A processor (108) configured to associate (302) RFID data (124) obtained from a scene (202) with captured image data for the scene (202). The association can be displayed (304) to a user to enable a user to select (306), using the image data, which RFID data to interact (308) with.

Data processing apparatus and associated user interfaces and methods

Multi-standard connectivity has become de-facto for smart phones and laptops but is emerging also to other more specialized gadgets like e-book readers. Such devices need to be designed for the best performance even when multiple standards are operating simultaneously. In the future, RF band allocations will make the scene even more complex especially in LTE evolution towards band aggregation. Once RF transceiver architectures have evolved to be compliant with modern CMOS processes new challenges will rise to guarantee smooth user experience in high-speed applications independently of protocol or frequency band. This means stricter requirements in mutual interference and miniaturization from antenna to ASIC's. However, interplay between protocols may also open new opportunities to consider transceiver architecture options suitable for multi-standard radios.

Multimode-multiband transceivers for next generation of wireless communications

This paper presents a wideband blocker filtering technique for an RF front-end. A wideband LNA and a transferred impedance filter are implemented as part of a receiver to demonstrate the feasibility of the system. The transferred impedance filter includes an adjustable polyphase filter to compensate for the phase shift in the system in order to maintain correct operating frequency. The transferred impedance filter with passive mixers and the wideband LNA are analyzed by means of frequency transformation to demonstrate the different design trade-offs. The front-end achieves a gain of 43 and 41 dB and a noise figure of 3.2 and 5.7 dB with an IIP3 of -13 and -5 dBm with the transferred-impedance filter turned off and on, respectively. An added selectivity of 6 dB is achieved by using the solutions described in this paper.

Wideband 2 to 6 GHz RF Front-End With Blocker Filtering

The number of different radio systems is currently increasing in portable devices like mobile phones due to the wider range of applications that require an optimized wireless communications channel to different services or other devices. To make this cost and power efficient, the transmitter must be adaptable to several different radio systems while keeping the complexity and cost reasonable. This article presents fundamental circuit techniques to enable low cost, low power, and low complexity transmitter architecture by combining digital-to-analog conversion, up-conversion, unwanted sideband rejection, power control, and part of the digital image rejection filtering into a single mixed-signal circuit block. The direct-digital RF-modulator architecture is the basis for a software-defined radio transmitter. It was demonstrated against WCDMA system requirements, but the versatility and the performance of this architecture enables support for other radio systems, such as GPRS and WLAN.

Direct-digital RF-modulator: a multi-function architecture for a system-independent radio transmitter

A controller for a directional antenna, the controller configured to receive input signalling representative of a user's gaze direction. The controller is configured to generate output signalling for controlling the directionality of the directional antenna in accordance with the input signalling.

Aarno Parssinen

Papers

Data processing apparatus and associated user interfaces and methods

Multimode-multiband transceivers for next generation of wireless communications

Wideband 2 to 6 GHz RF Front-End With Blocker Filtering

Direct-digital RF-modulator: a multi-function architecture for a system-independent radio transmitter

Controller for a Directional Antenna and Associated Apparatus and Methods