Showing papers by "Jong-Ho Lee published in 2008"

Bias-stress-induced stretched-exponential time dependence of threshold voltage shift in InGaZnO thin film transistors

Abstract: The experimental and modeling study of bias-stress-induced threshold voltage instabilities in amorphous indium-gallium-zinc oxide thin film transistors is reported. Positive stress results in a positive shift in the threshold voltage, while the transfer curve hardly moves when negative stress is induced. The time evolution of threshold voltage is described by the stretched-exponential equation, and the shift is attributed to the electron injection from the channel into interface/dielectric traps. The stress amplitudes and stress temperatures are considered as important factors in threshold voltage instabilities, and the stretched-exponential equation is well fitted in various bias temperature stress conditions.

Phase transformation behaviors of SiO2 doped Ge2Sb2Te5 films for application in phase change random access memory

Abstract: The improvement in the phase change characteristics of Ge2Sb2Te5 (GST) films for phase change random access memory applications was investigated by doping the GST films with SiO2 using cosputtering at room temperature. As the sputtering power of SiO2 increased from 0to150W, the activation energy for crystallization increased from 2.1±0.2to3.1±0.15eV. SiO2 inhibited the crystallization of the amorphous GST films, which improved the long term stability of the metastable amorphous phase. The melting point decreased with increasing concentration of SiO2, which reduced the power consumption as well as the reset current.

Separation method of hole trapping and interface trap generation and their roles in NBTI reaction-diffusion model

Abstract: In this study, we propose a systematic method to separate the hole trapping from measured V1 shift, thus giving the ideal interface trap generation behavior without measurement disturbance. Three stages of interface trap generation have been illustrated with the analytical H-H2 NBTI reaction-diffusion model, and the hole trapping has also been verified with its voltage-enhanced and temperature-insensitive properties. Finally, the PMOS device lifetime extrapolation without considering the hole trapping might lead to significant lifetime overestimation.

Modeling of $V_{\rm th}$ Shift in nand Flash-Memory Cell Device Considering Crosstalk and Short-Channel Effects

Abstract: A threshold-voltage (Vth) shift of sub-100-nm NAND flash-memory cell transistors was modeled systematically, and the modeling was verified by comparing with the data from measurement and 3-D device simulation. The Vth shift of the NAND flash-memory cell was investigated by changing parameters such as gate length, width, drain voltage, dielectric material between cells, space between cells, lightly doped-drain depth, and adjacent-cell bias. The proposed model covers two dominant device physics: capacitance coupling effect between adjacent cells and short-channel effect. Our model showed an accurate prediction of the Vth shift of NAND flash-memory array and a good agreement with the data from simulation and measurement.

AG490, a Jak2-specific inhibitor, induces osteoclast survival by activating the Akt and ERK signaling pathways.

Abstract: Osteoclasts are multinucleated cells with the unique ability to resorb bone. Elevated activity of these cells under pathologic conditions leads to the progression of bone erosion that occurs in osteoporosis, periodontal disease, and rheumatoid arthritis. Thus, the regulation of osteoclast apoptosis is important for bone homeostasis. In this study, we examined the effects of the Janus tyrosine kinase 2 specific inhibitor AG490 on osteoclast apoptosis. We found that AG490 greatly inhibited osteoclast apoptosis. AG490 stimulated the phosphorylation of Akt and ERK. Adenovirus-mediated expression of dominant negative (DN)-Akt and DN-Ras in osteoclasts inhibited the survival of osteoclasts despite the presence of AG490. Cytochrome c release during osteoclast apoptosis was inhibited by AG490 treatment, but this effect was inhibited in the presence of LY294002 or U0126. AG490 suppressed the proapoptotic proteins Bad and Bim, which was inhibited in osteoclasts infected with DN-Akt and DN-Ras adenovirus. In addition, constitutively active MEK and myristoylated-Akt adenovirus suppressed the cleavage of pro-caspase-9 and -3 and inhibited osteoclast apoptosis induced by etoposide. Taken together, our results suggest that AG490 inhibited cytochrome c release into the cytosol at least partly by inhibiting the pro-apoptotic proteins Bad and Bim, which in turn suppressed caspase-9 and -3 activation, thereby inhibiting osteoclast apoptosis.

A high concentration of MMP-2/gelatinase A and MMP-9/gelatinase B reduce NK cell-mediated cytotoxicity against an oral squamous cell carcinoma cell line.

Abstract: BACKGROUND: Recent studies have shown that matrix metalloproteinases (MMPs) from tumors influence the host immune system to reduce antitumor activity. The aim of this study was to examine the influence of MMP-2 and MMP-9 on the natural killer (NK) cell. MATERIALS AND METHODS: NK cells were pretreated with either MMP-2 or MMP-9 in the experimental group but not in the control group. NK cell cytotoxicity against oral squamous cell carcinoma cells (OSCC) were examined using the [Cr51] release assay and the expression levels of surface receptors on NK cells were measured by flow cytometry. RESULTS: NK cell cytotoxicity was significantly reduced in the experimental group compared to the control group. Significant increases in KIR expression and decreases in NKG2D expression on the NK cells were observed in the experimental group. CONCLUSION: This study suggests an additional role of MMP-2 and MMP-9 in an immune escape mechanism of OSCC.

Two-Bit/Cell NFGM Devices for High-Density NOR Flash Memory

Abstract: The structure of 2-bit/cell flash memory device was characterized for sub-50 nm non-volatile memory (NVM) technology. The memory cell has spacer-type storage nodes on both sidewalls in a recessed channel region, and is erased (or programmed) by using band-to-band tunneling hot-hole injection (or channel hot-electron injection). It was shown that counter channel doping near the bottom of the recessed channel is very important and can improve the V th margin for 2-bit/cell operation by ~2.5 times. By controlling doping profiles of the channel doping and the counter channel doping in the recessed channel region, we could obtain the V th margin more than ~1.5V. For a bit-programmed cell, reasonable bit-erasing characteristics were shown with the bias and stress pulse time condition for 2-bit/cell operation. The length effect of the spacer-type storage node is also characterized. Device which has the charge storage length of 40 nm shown better △V th and V th margin for 2-bit/cell than those of the device with the length of 84 nm at a fixed recess depth of 100 nm. It was shown that peak of trapped charge density was observed near ~10 nm below the source/drain junction.

Dependency of threshold switching on density of localized states of Ge2Sb2Te5 thin films for phase change random access memory

Abstract: The threshold switching of Ge2Sb2Te5 (GST) films for phase change random access memory applications was investigated by measuring the variation in the threshold voltage (VT) with the crystallinity of the GST films and photon energy absorption spectra. As the GST film was amorphized, VT increased to approximately 1 V and its electrical resistance increased. The optical band gap and Urbach edge of the GST increased from 0.66 to 0.97 eV and from 12 to 65 meV, respectively, upon its amorphization. It was experimentally confirmed that the threshold switching is associated with the density of localized states of the GST.

Design of Bulk Fin-Type Field-Effect Transistor Considering Gate Work-Function

Abstract: We proposed a new body-tied triple-gate fin-type field-effect transistor (bulk FinFET) which has different gate work-functions on the top- and side-channel regions. The effect of gate work-function on the characteristics of the bulk FinFETs was studied by using three-dimensional device simulator. By increasing the top-gate work-function (ΦTG) at a fixed side-gate work-function (ΦSG) of the bulk FinFET, threshold voltage (Vth) increases and off-state leakage current (Ioff) reduces significantly without increasing doping concentration of the fin body. The bulk FinFETs with the low body doping and the threshold voltage controlled by midgap-gate work-function shown very small dependence on the corner shape, but shown very poor short channel effect (SCE). It was also shown that devices with the Vth controlled by body doping shows significant corner effect and the effect becomes small as the fin width decreases. By applying our approach, we could reduce the off-current by more than 10 times without increasing fin body doping concentration.

Design Consideration of Bulk FinFETs with Locally-Separated-Channel Structures for Sub-50 nm DRAM Cell Transistors

Abstract: We proposed a new p?/n? gate locallyseparated- channel (LSC) bulk FinFET which has vertically formed oxide region in the center of fin body, and device characteristics were optimized and compared with that of normal channel (NC) FinFET. Key device characteristics were investigated by changing length of n ? poly-Si gate (L s ), the material filling the trench, and the width and length of the trench at a given gate length (L g ). Using 3-dimensional simulations, we confirmed that short-channel effects were properly suppressed although the fin width was the same as that of NC device. The LSC device having the trench non-overlapped with the source/drain diffusion region showed excellent I off suitable for sub-50 nm DRAM cell transistors. Design of the LSC devices were performed to get reasonable L s /L g and channel fin width (W cfin ) at given L g s of 30 ㎚, 40 ㎚, and 50 ㎚.

Universality of interface trap generation and its impact on I D degradation in strained/unstrained PMOS transistors under NBTI stress

Abstract: Despite extensive use of strained technology, it is still unclear whether NBTI-induced NIT generation in strained transistors is substantially different from that of unstrained ones. Here, we present a comprehensive theory for NIT generation in strained/unstrained transistors and show its universality over a wide range of strain. We further propose that an appropriately designed/optimized transistor might reduce/eliminate NBTI being a concern for CMOS scaling.

Homoepitaxial Growth of Vanadium-Doped Semi-insulating 4H-SiC Using Bis-trimethylsilylmethane and Bis-cyclopentadienylvanadium Precursors

Abstract: The authors attempted to grow a semi-insulating 4H-SiC epitaxial layer by in situ vanadium doping. The homoepitaxial growth of the vanadium-doped 4H-SiC layer was performed by metallorganic chemical vapor deposition using the organosilicon precursor bis-trimethylsilylmethane (BTMSM, C 7 H 20 Si 2 ) and the metallorganic precursor bis-cyclopentadienylvanadium (Verrocene, C 10 H 10 V). The vanadium doping effect on the crystallinity of the epi layer was very destructive. Vanadium-doped epi layers grown under normal conditions had various crystal defects such as micropipes and polytype inclusions, but this crystallinity degradation was overcome by elevating the growth temperature. For measurement of the resistivity of the highly resistive vanadium-doped 4H-SiC epi layers, the authors used the on-resistance technique. Based on the measurements of the on-resistance of the Schottky barrier diode fabricated using the vanadium-doped epi layers, it was revealed that the residual donor concentration of the epi layers was decreased with increasing partial pressure of verrocene. The resistivity of the in situ vanadium-doped 4H-SiC epi layer was about 10 7 -10 12 Ω cm.

High performance one-transistor dram cell device and manufacturing method thereof

Abstract: Provided are a high-performance one-transistor floating-body DRAM cell device and a manufacturing method thereof. The one-transistor floating-body DRAM cell device includes: a semiconductor substrate; a gate stack which is formed on the semiconductor substrate; a control electrode which is formed on the semiconductor substrate and surrounded by the gate stack; a floating body which is formed on the control electrode that is surrounded by the gate stack; source/drain which are formed at left and right sides of the floating body; an insulating layer which insulates the source/drain from the semiconductor substrate and the control electrode; a gate insulating layer which is formed on the floating body and the source/drain; and a gate electrode which is formed on the gate insulating layer. In the cell device having a double-gate structure, charges can be stored in a non-volatile manner by the control electrodes, so that it is possible to improve a degree of integration of devices, a uniformity of characteristic, and a sensing margin.

High-Pressure Deuterium Annealing Effect on Nanoscale Strained CMOS Devices

Abstract: High-pressure deuterium annealing was applied to nanoscale strained CMOS devices, and its effect was characterized in terms of charge pumping method, hot-carrier-induced stress, negative bias temperature instability stress, and 1/f noise for the first time. For the NMOS, the characteristics of both control and tensile-stressed NMOS devices were improved by annealing; in particular, tensile-stressed NMOS devices had more improved characteristics than the characteristics of control devices. However, for the PMOS, compressive-stressed PMOS devices particularly had more degraded characteristics compared with the characteristics of control PMOS devices.

Effect of Oxygen Postdeposition Annealing on Bias Temperature Instability of Hafnium Silicate MOSFET

Abstract: Bias temperature instability (BTI) characteristics depending on postdeposition anneal (PDA) conditions were studied using dc (slow process) and pulse (fast process) measurements. In terms of the positive BTI characteristics of nMOSFET, the threshold voltage Vth shift in samples with oxygen PDA was reduced due to the passivation of oxygen vacancy defects. However, the negative BTI (NBTI) characteristics of pMOSFET with pulse measurement showed degradation of the Vth shift in samples with excess oxygen PDA. This phenomenon could be more clearly observed during fast detrapping using rectangular pulse measurements. The origin of NBTI degradation was correlated with the oxygen interstitial defects in the HfSiO layer that were generated during the oxygen annealing process.

Water-deprivation-induced expression of neuronal nitric oxide synthase in the hypothalamic paraventricular nucleus of rat.

Abstract: This study was conducted to define the molecular mechanism by which dehydration induces expression of neuronal nitric oxide synthase (nNOS) in the hypothalamic paraventricular nucleus (PVN). Rats were deprived from water for 48 hr and then sacrificed immediately or 1 hr after ad libitum access to water. Another group of rats had free access to food and water and was included as euhydrate control group. The PVN sections fixed with 4% paraformaldehyde were processed for nNOS immunohistochemistry and NADPH-diaphorase (NADPH-d)/pCREB or NADPH-d/c-Fos double staining. nNOS-ir neurons significantly increased with water deprivation and decreased with rehydration, both in the posterior magnocellular (pM)- and the medial parvocellular (mP)-PVN. Most NADPH-d histostained neurons in the PVN appeared to exhibit pCREB-ir as well. Water deprivation markedly increased, and rehydration decreased, NADPH-d/pCREB neurons both in the pM- and in the mP-PVN. Gel shift assay demonstrated that dehydration may promote CREB binding to nNOS promoter in the PVN neurons. Significant amounts of NADPH-d-stained neurons in the PVN of water-deprived rats (67–68% in both the mP and the pM) exhibited c-Fos-ir. NADPH-d/c-Fos neurons in the pM-PVN were increased by water deprivation but not changed by rehydration. NADPH-d/c-Fos double-stained neurons in the mP-PVN did not significantly change depending on different water conditions. These results suggest that pCREB may play a role in dehydration-induced nNOS gene expression in the PVN neurons, and c-Fos might not be implicated in the regulatory pathway. © 2007 Wiley-Liss, Inc.

Flash memory cell string

Abstract: The present invention relates to a flash memory cell string. The flash memory cell string includes a plurality of cell devices and switching devices connected to ends of the cell devices. Each of the cell devices includes a semiconductor substrate, and a transmissive insulating layer, a charge storage node, a control insulating layer and a control electrode sequentially formed on the semiconductor substrate. In the flash memory cell string, a buried insulating layer is provided on the semiconductor substrate between the cell device and an adjacent cell device, thus enabling an inversion layer, which performs the functions of source/drain, to be easily formed. According to the present invention, the reduction characteristics and performance of the cell devices of NAND flash memory are improved, and the inversion layer of a channel is induced through fringing electric fields from the control electrode and the charge storage node if necessary.

Properties of Pb0.71K0.145Sm0.145Nb2O6 analysed within piezoelectric, dielectric, impedance, electric modulus and conductivity

Abstract: . Orthorhombic tungsten bronze Pb 1-x K 2x-3y Sm y Nb 2 O 6 (where x = 0.29 and y = 0.145) ceramic has been synthesized by the conventional sintering technique. Preliminary X-ray diffractogram analysis of crystal structure showed that a single phase compound has been formed with orthorhombic system. Frequency and temperature dependences of impedance, modulus, conductivity and dielectric permittivity have been performed in the frequency and temperature range 45 Hz-5 MHz and 35-595 °C respectively. Impedance spectroscopy study showed the presence of both bulk and grain boundary effects in the materials. The complex impedance spectra above 440 °C have been fitted by the superposition of two Cole-Cole types of relaxations. The ac conductivity spectrum obeyed the Jonscher's power law. Modulus analysis indicated the possibility of hopping mechanism for electrical process in the system.

Design of NAND Flash Memory Device by the Fringing Field from a Control Gate

Abstract: We propose a cell structure with non-overlap source/drain (S/D) (or without S/D) for a NAND ash memory, which utilizes the fringing eld from control gates. In this work, a guideline for the cell device design is suggested through extensive device simulations. We considered a cell string with conventional SONOS cell transistors that have a nitride storage node on a planar channel structure. The read operation of an erased cell in the proposed cell string was successful, which is an important issue for a device using a fringing eld. We think that our proposed structure is a promising candidate to improve scalability for sub-40 nm NAND ash memory because the proposed devices show better characteristics with scaling down.

A Gate-Induced Drain-Leakage Current Model for Fully Depleted Double-Gate MOSFETs

Abstract: A gate-induced drain-leakage current model which can avoid the invalidation of 1-D models for fully depleted double-gate MOSFETs was developed based on tunneling theory and the analytical solution of a 2-D Poisson equation. For a given device geometry and a doping concentration, assuming that the drain region was fully depleted, the 2-D Poisson equation is solved using a separation-of-variable technique with appropriate boundary conditions. The results were compared with the data from a 2-D device simulation and showed good agreement.

Energy Loss Mechanism in Organic and Inorganic Light-Emitting Diodes

Abstract: We report that there exists a similar energy loss mechanism in fluorescent/phosphorescent organic light-emitting diodes (F/P OLEDs) and inorganic semiconductor optoelectronic devices [1310-nm InGaAsP-InP superluminescent diodes (SLDs)]. The loss of energy in inorganic SLDs based on thickness-altered asymmetric multiple quantum-well (QW) structures occurs depending sensitively on the sequence of QWs, an analogous behavior also observed in F/P OLEDs depending on the sequence of phosphorescent dopants for different colors. It is shown that such an energy (power) loss is evitable by placing long-wavelength QWs near the p-side in inorganic SLDs and similarly long-wavelength phosphors near the hole-transporting layer in F/P OLEDs.

Study on L-V-C (Live-Virtual-Constructive) Interoperation for the National Defense M&S (Modeling & Simulation)

Abstract: The evolution of the information technologies like computer and the Internet has been largely affecting military technology area. It has been changing warfare aspect a lot, and greatly improving high-tech fighting power as well. This study proposes a way to construct and operate the synthetic theater of war in order to improve the national military combat training, based on the emerging concept of it. This paper first studies the component technologies of the L-V-C(live virtual constructive)-based synthetic theater of war simulation system that enables the military training to be as similar as in the real combat field, and defines the various variables that can make effective use of the IEEE standard HLA/RTI By doing that, this paper proposes an interoperable scheme that is suited to L-V, V-C, and L-C interoperation.

Threshold-Voltage Modeling of Bulk Fin Field Transistors by Considering Surface Potential Lowering

Abstract: Threshold voltage (Vth) modeling of the double/triple-gate bulk fin field-effect transistors (FinFETs) was performed by considering the potential lowering at the surface of fin body at VGS=Vth condition. With decreasing gate length and/or fin width, the surface band-bending (2ψB) at VGS=Vth in fully depleted bulk FinFETs decreases since actual surface potential decreases at the Vth condition. Based on the 2ψB correction, charge-sharing length (xh) and corner factor (αc) were newly extracted. The Vth behaviors of bulk FinFETs were modeled based on the surface potential lowering, three-dimensional (3-D) charge-sharing, narrow-width effect, and corner factor. The Vth model predicted well the Vth behavior with fin body width, body doping concentration, gate length, gate height, and corner shape of the fin body. Our compact models predicted accurately Vth of the devices with the gate length up to 20 nm and the fin body width up to 5 nm.

Compact Current Modeling of Fully Depleted Symmetric Double-Gate Metal–Oxide–Semiconductor Field Effect Transistors with Doped Short-Channel

Abstract: The current behaviors of fully depleted (FD) symmetric double-gate (DG) metal–oxide–semiconductor field effect transistors (MOSFETs) with doped short-channel were parametrically modeled with the simple closed-form in all operational regions. In the diffusion current model, a physical parameter DG as a function of gate bias (VGS), drain bias (VDS), silicon body width (WB), channel length (L), and channel doping concentration (Nb) was introduced to consider the VGS dependence. Also, the subthreshold slope (SS) of DG MOSFETs with doped channel was modeled accurately with DG. DD which is dependent on VDS was introduced to consider the drain-induced barrier lowering (DIBL) in the diffusion current model. After the strong inversion, the drift current of doped DG MOSFETs was modeled by considering inversion-layer capacitance based on charge-sheet approximation. The channel length modulation by VDS was considered for accuracy in the current modeling of DG MOSFETs with doped short-channel. Our simple compact models predicted accurately DC characteristics of the devices with the channel length to 20 nm and shown good agreement with two-dimensional (2D) simulation.

Two-Bit/Cell Characteristics of Silicon–Oxide–Nitride–Oxide–Silicon Flash Memory Devices with Recessed Channel Structure

Abstract: We proposed a device structure for novel 2-bit/cell silicon–oxide–nitride–oxide–silicon (SONOS) flash memory and characterized the device for sub-50 nm non-volatile memory (NVM) technology. The proposed memory cell has a nitride layer formed on the surface of the recessed channel region for a charge storage node. The threshold voltage window of ~3 V was achieved by hot carrier injection under a VGS of 5 V and a VDS of 3.5 V for programming. It was shown that counter channel doping near the bottom of the recessed channel is very important and can improve the Vth margin for 2-bit/cell operation by ~4 times. By controlling doping profiles of the p-type channel doping and the n-type counter channel doping in the recessed channel region, we could obtain the Vth margin more than ~2 V. Moreover, for a bit-programmed cell, reasonable bit-erasing characteristics were also shown.

Investigation on growth behavior of CNTs synthesized by atmospheric pressure plasma enhanced chemical vapor deposition system on Fe catalyzed substrate.

Abstract: We have studied growth behavior of carbon nanotubes (CNTs) on iron (Fe) catalyzed substrate using newly developed atmospheric pressure plasma enhanced chemical vapor deposition (AP-PECVD) system. To investigate the improved growth performance with simple equipment and process on large scale, a new AP-PECVD system containing different concept on downstream gas was designed and manufactured. As a catalyst, either sputtered or evaporated Fe thin film on SiO2/Si substrate was used and acetylene gas was used as a carbon source. We observed growth behavior of CNTs such as height, rate and density were strongly affected by plasma power. The maximum height of 427 microm and 267 microm was synthesized under RF plasma power of 30 W for 30 min and 40 W for 3 min, respectively. The growth rate dramatically increased to 6.27 times as plasma power increased from 30 to 40 W which opens the possibility the mass production of CNTs. By SEM and TEM observation, it was verified the grown CNTs was consists of mixture of single-wall and multi-wall CNTs. The graphitization ratio was measured to be 0.93, indicating that the graphitized CNTs forest was formed and relatively high purity of CNTs was synthesized, being useful for nano-composite materials to reinforce the strength. From our experiments, we can observe that the height and growth rate of CNTs is strong function of plasma power.

Decrease in Work Function of Transparent Conducting ZnO Thin Films by Phosphorus Ion Implantation

Abstract: To confirm the possibility of engineering the work function of ZnO thin films, we have implanted phosphorus ions into ZnO thin films deposited by radio-frequency magnetron sputtering. The fabricated films show n-type characteristics. It is shown that the electrical and optical properties of those thin films vary depending sensitively on the ion dose and rapid thermal annealing time. Compared to as-deposited ZnO films, the work-function of phosphorus ion-implanted ZnO thin films is observed to be lower and decreases with increasing ion doses. It is likely that the zinc or oxygen vacancies are firstly filled with the implanted phosphorus ions. With further increased ions, free electrons are generated as Zn2+ sites are replaced by those ions or interstitial phosphorus ions increase at the lattice sites, the fermi level by which approaches the conduction band and thus the work function decreases. Those films exhibit the optical transmittance higher than 85% within the visible wavelength range (up to 800 nm).

Extractive method of threshold voltage distribution in floating gate NAND flash memory by using the charge pumping technique

Abstract: In this paper the authors proposed a new method to estimate ?Vth from floating gate NAND flash memory, using charge pumping method to a cell string. Although any cells in a string are selected, this method could be roughly applied to extract ?Vth. After P/E cycling, the charge pumping method also estimated ?Vth with moderate pulse amplitude (in this work, at 4.5 V or 5 V). By using our proposed method, not only it is simply possible to estimate ?Vth of NAND flash memory, but also measurement time can be reduced so much.