S
Simon Deleonibus
Researcher at European Automobile Manufacturers Association
Publications - 129
Citations - 1772
Simon Deleonibus is an academic researcher from European Automobile Manufacturers Association. The author has contributed to research in topics: MOSFET & Silicon on insulator. The author has an hindex of 25, co-authored 129 publications receiving 1742 citations. Previous affiliations of Simon Deleonibus include French Alternative Energies and Atomic Energy Commission.
Papers
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Journal ArticleDOI
A simple and controlled single electron transistor based on doping modulation in silicon nanowires
TL;DR: In this paper, a simple and highly reproducible single electron transistor (SET) has been fabricated using gated silicon nanowires, which is a metaloxide-semiconductor field effect transistor made on silicon-on-insulator thin films.
Proceedings ArticleDOI
Novel 3D integration process for highly scalable Nano-Beam stacked-channels GAA (NBG) FinFETs with HfO2/TiN gate stack
Thomas Ernst,Cecilia Dupre,C. Isheden,E. Bernard,Romain Ritzenthaler,V. Maffini-Alvaro,Jean-Charles Barbe,F. de Crecy,Alain Toffoli,C. Vizioz,S. Borel,Francois Andrieu,Vincent Delaye,D. Lafond,G. Rabille,J.M. Hartmann,Maurice Rivoire,B. Guillaumot,A. Suhm,P. Rivallin,O. Faynot,Gerard Ghibaudo,Simon Deleonibus +22 more
TL;DR: In this paper, a 3D-GAA extension of a Finfet process is proposed to achieve a 5 times higher current density per layout surface compared to planar transistors with the same gate stack (HfO 2/TiN/Poly-Si).
Proceedings ArticleDOI
Novel Si-based nanowire devices: Will they serve ultimate MOSFETs scaling or ultimate hybrid integration?
Thomas Ernst,Laurent Duraffourg,Cecilia Dupre,E. Bernard,P. Andreucci,Stéphane Bécu,Eric Ollier,Arnaud Hubert,C. Halte,Julien Buckley,Olivier P. Thomas,Guillaume Delapierre,Simon Deleonibus,B. De Salvo,Philippe Robert,O. Faynot +15 more
TL;DR: Both CMOS scaling and NEMS sensor devices scaling converge to the same type of sub 100 nm objects as discussed by the authors, which opens new fields of application for IC chips integrating both complex signal treatment and very highly sensitive sensing functionalities.
Proceedings ArticleDOI
Strained FDSOI CMOS technology scalability down to 2.5nm film thickness and 18nm gate length with a TiN/HfO 2 gate stack
V. Barral,Thierry Poiroux,Francois Andrieu,C. Buj-Dufournet,O. Faynot,Thomas Ernst,L. Brevard,C. Fenouillet-Beranger,D. Lafond,J.M. Hartmann,V. Vidal,F. Allain,Nicolas Daval,Ian Cayrefourcq,L. Tosti,Daniela Munteanu,J.L. Autran,Simon Deleonibus +17 more
TL;DR: In this paper, the authors explored the scalability of both unstrained and strained FDSOI CMOSFETs down to 2.5 nm film thickness and 18 nm gate length with HfO2/TiN gate stack.
Journal ArticleDOI
Static and Dynamic TCAD Analysis of IMOS Performance: From the Single Device to the Circuit
TL;DR: In this paper, the impact of geometrical parameters on the performance of impact ionization MOSFET (IMOS) was investigated, such as the gate length, the intrinsic length, and the Si film thickness.