S
Srinivas Devadas
Researcher at Massachusetts Institute of Technology
Publications - 498
Citations - 35003
Srinivas Devadas is an academic researcher from Massachusetts Institute of Technology. The author has contributed to research in topics: Sequential logic & Combinational logic. The author has an hindex of 88, co-authored 480 publications receiving 31897 citations. Previous affiliations of Srinivas Devadas include University of California, Berkeley & Cornell University.
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Proceedings ArticleDOI
Access-controlled resource discovery for pervasive networks
TL;DR: This paper designs and implements an architecture for access-controlled resource discovery by integrating access control with the Intentional Naming System (INS), a resource discovery and service location system that fits well within a proxy-based security framework designed for dynamic networks.
Secondary Structure Prediction of All-Helical Proteins Using Hidden Markov Support Vector Machines
Blaise Gassend,Charles W. O'Donnell,William Thies,Andrew C. Lee,M. van Dijk,Srinivas Devadas +5 more
TL;DR: The goal is to develop a state-of-the-art predictor with an intuitive and biophysically-motivated energy model through the use of Hidden Markov Support Vector Machines (HM-SVMs), a recent innovation in the field of machine learning.
Journal ArticleDOI
Efficient traversal of beta-sheet protein folding pathways using ensemble models.
TL;DR: The program tFolder is introduced as an efficient method for modelling the folding process of large β-sheet proteins using sequence data alone and the accuracy of t folder is demonstrated to be comparable with state-of-the-art methods designed specifically for the contact prediction problem alone.
Proceedings ArticleDOI
Power modeling and other new features in the Graphite simulator
George Kurian,Sabrina M. Neuman,George Bezerra,Anthony Giovinazzo,Srinivas Devadas,Jason E. Miller +5 more
TL;DR: Improvements to the Graphite simulator designed to help explore current and emerging research topics are described, ideally suited to explore both power and performance in future multicore and manycore processors, especially those incorporating dynamic runtime monitoring and adaptation.
Proceedings ArticleDOI
Exploiting metastability and thermal noise to build a re-configurable hardware random number generator
TL;DR: This metastability based physical random number generator provides a compact and low-power solution which can be fabricated using standard IC manufacturing processes and is robust against environmental changes since it can be re-calibrated to new environmental conditions such as temperature and power supply voltage.