Srinivas Devadas

TL;DR: The authors give a procedure to extract the complete set of possible flow tables from a gate-level description of an asynchronous circuit under the bounded wire delay model and construct a product flow table to check for machine equivalence.

TL;DR: This roundtable is based on the topic of hardware security and trust, which was the focus of the IEEE International Symposium on Hardware-Oriented Security and Trust (HOST 2011) held with the 2011 Design Automation Conference.

TL;DR: In this paper, a chip and a method for correcting variation in output of a PUF circuit is provided, wherein the method comprises: creating a set of challenge-response pairs by passing challenges c 1,..., c n through a PU-F circuit to obtain responses r 1,..., r n ; producing redundancy information from the responses; on subsequent use of the challengeresponse pairs, providing the redundancy information to an ECC module and correcting in the ECC response received from the PU-FC circuit to produce r' 1,,, r' n.

TL;DR: This work presents ThreadBeats, a simple application-level annotation framework that directly and accurately conveys thread progress information to hardware, and designs DVFS controllers that exploit Thread beats information for two purposes: improving performance by equalizing thread progress and minimizing runtime under a power budget constraint.

TL;DR: In this paper, the authors presented a fuzzy extractor whose security can be reduced to the hardness of Learning Parity with Noise (LPN) and can efficiently correct a constant fraction of errors in a biometric source with a noise-avoiding trapdoor.