S
Srinivas Devadas
Researcher at Massachusetts Institute of Technology
Publications - 498
Citations - 35003
Srinivas Devadas is an academic researcher from Massachusetts Institute of Technology. The author has contributed to research in topics: Sequential logic & Combinational logic. The author has an hindex of 88, co-authored 480 publications receiving 31897 citations. Previous affiliations of Srinivas Devadas include University of California, Berkeley & Cornell University.
Papers
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Path ORAM: An Extremely Simple Oblivious RAM Protocol
Emil Stefanov,Marten van Dijk,Elaine Shi,Christopher W. Fletcher,Ling Ren,Xiangyao Yu,Srinivas Devadas +6 more
TL;DR: It is formally proved that Path ORAM requires log^2 N / log X bandwidth overhead for block size B = X log N, and is asymptotically better than the best known ORAM scheme with small client storage.
Book ChapterDOI
Security Based on Physical Unclonability and Disorder
TL;DR: This chapter provides a classification for past and ongoing work in physical disorder based security alongside with security analyses and implementation examples and outlines some open problems and future research opportunities.
Patent
Volatile device keys and applications thereof
Srinivas Devadas,Thomas J. Ziola +1 more
TL;DR: In this paper, a key is determined from a volatile response using circuitry on the device and the response depend on process variation in fabrication of the device, and the error control data that depends on the first volatile response can be computed and stored externally to the device.
Proceedings ArticleDOI
FPGA PUF using programmable delay lines
TL;DR: A high resolution programmable delay logic (PDL) implemented by lookup table (LUT) internal structure is introduced, and fine tuning is performed to cancel out delay skews caused by asymmetries in routing and systematic variations.
Journal ArticleDOI
Storage assignment to decrease code size
TL;DR: This article proves that for the case of a single address register the decision problem is NP-complete, even for a single basic block, and generalizes the problem to multiple address registers.