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Showing papers in "IEEE Transactions on Power Electronics in 2001"


Journal ArticleDOI
TL;DR: In this paper, a buck-type DC/DC converter is used to maximize the photovoltaic array output power, irrespective of the temperature and irradiation conditions and of the load electrical characteristics.
Abstract: Maximum power point tracking (MPPT) is used in photovoltaic (PV) systems to maximize the photovoltaic array output power, irrespective of the temperature and irradiation conditions and of the load electrical characteristics. A new MPPT system has been developed, consisting of a buck-type DC/DC converter, which is controlled by a microcontroller-based unit. The main difference between the method used in the proposed MPPT system and other techniques used in the past is that the PV array output power is used to directly control the DC/DC converter, thus reducing the complexity of the system. The resulting system has high-efficiency, lower-cost and can be easily modified to handle more energy sources (e.g., wind-generators). The experimental results show that the use of the proposed MPPT control increases the PV output power by as much as 15% compared to the case where the DC/DC converter duty cycle is set such that the PV array produces the maximum power at 1 kW/m/sup 2/ and 25/spl deg/C.

1,309 citations


Journal ArticleDOI
TL;DR: In this article, the authors proposed integrated coupling inductors between the channels to improve the steady-state and dynamic performances of voltage regulator modules (VRMs) with easier manufacturing, but the structure of the integrated magnetic requires precise adjustment and is not mechanical stable.
Abstract: The multichannel interleaving buck converter with small inductance has proved to be suitable for voltage regulator modules (VRMs) with low voltages, high currents, and fast transients. Integrated magnetic components are used to reduce the size of the converter and improve efficiency. However, the structure of the integrated magnetic requires precise adjustment and is not mechanical stable. This paper proposes integrated coupling inductors between the channels to solve these problems. With the proper design, coupling inductors can improve both the steady-state and dynamic performances of VRMs with easier manufacturing.

578 citations


Journal ArticleDOI
TL;DR: If simplified by the proposed method, all the remaining procedures necessary for the three-level SVPWM are done like conventional two-level inverter and the execution time is greatly reduced and the DC-link neutral-point potential control algorithms are implemented more easily.
Abstract: In this paper, a new simplified space-vector pulse width modulation (SVPWM) method for a three-level inverter is proposed. This method is based on the simplification of the space-vector diagram of a three-level inverter into that of a two-level inverter. If simplified by the proposed method, all the remaining procedures necessary for the three-level SVPWM are done like conventional two-level inverter and the execution time is greatly reduced. The DC-link neutral-point potential control algorithms are implemented more easily. The proposed method can be applied to the multi-level inverters above three-level. The validity of the new SVPWM method is verified by experiment with a 1000 kVA three-level insulated gate bipolar transistor (IGBT) inverter.

525 citations


Journal ArticleDOI
TL;DR: In this article, a duty ratio constraint that defines the diode conduction interval is identified to be the key to accurate prediction of high-frequency behavior of hard-switching pulse-width modulated (PWM) converters.
Abstract: Various aspects of averaged modeling of hard-switching pulse-width modulated (PWM) converters operating in the discontinuous conduction mode (DCM) are studied. A more streamlined modeling procedure is proposed which serves as a general framework for comparing different models. A duty ratio constraint that defines the diode conduction interval is identified to be the key to accurate prediction of high-frequency behavior. A new duty-ratio constraint is proposed that leads to full-order averaged models of DCM converters. Numerical analyses and experimental measurements confirm that the new models correctly predict the small-signal responses up to one third of the switching frequency and are more accurate than all previous models. Moreover, new analytical results are included to show the origin of the high-frequency pole in DCM operation and to explain why the full-order model is capable of accurately predicting it. Averaged circuit counterparts of the new models are developed in the form of averaged switch models to facilitate circuit simulation.

525 citations


Journal ArticleDOI
TL;DR: In this paper, the authors proposed a generation control circuit (GCC), which enables maximum power to be obtained from all of the PV modules even if some of the modules are prevented from receiving light.
Abstract: Photovoltaic modules must generally be connected in series in order to produce the voltage required to efficiently drive an inverter. However, if even a very small part of photovoltaic module (PV module) is prevented from receiving light, the generation power of the PV module is decreased disproportionately. This greater than expected decrease occurs because PV modules which do not receive adequate light cannot operate on the normal operating point, but rather operate as loads. As a result, the total power from the PV modules is decreased if even only a small part of the PV modules are shaded. In the present paper, a novel circuit, referred to as the generation control circuit (GCC), which enables maximum power to be obtained from all of the PV modules even if some of the modules are prevented from receiving light. The proposed circuit enables the individual PV modules to operate effectively at the maximum power point tracking, irrespective of the series connected PV module system. In addition, the total generated power is shown experimentally to increase for the experimental set-up used in the present study.

472 citations


Journal ArticleDOI
TL;DR: In this article, a topological review of the single-stage power factor corrected (PFC) rectifiers is presented, and several new PFC converters were derived from some existing topologies using the translation rule.
Abstract: A topological review of the single stage power factor corrected (PFC) rectifiers is presented in this paper. Most reported single-stage PFC rectifiers cascade a boost-type converter with a forward or a flyback DC-DC converter so that input current shaping, isolation, and fast output voltage regulation are performed in one single stage. The cost and performance of single-stage PFC converters depend greatly on how its input current shaper (ICS) and the DC-DC converter are integrated together. For the cascade connected single-stage PFC rectifiers, the energy storage capacitor is found in either series or parallel path of energy flow. The second group appears to represent the main stream. Therefore, the focus of this paper is on the second group. It is found that many of these topologies can be implemented by combining a two-terminal or three-terminal boost ICS cell with DC-DC converter along with an energy storage capacitor in between. A general rule is observed that translates a three-terminal ICS cell to a two-terminal ICS cell using an additional winding from the transformer and vice verse. According to the translation rule, many of the reported single-stage PFC topologies can be viewed as electrically equivalent to one another. Several new PFC converters were derived from some existing topologies using the translation rule.

353 citations


Journal ArticleDOI
TL;DR: The squared-field-derivative method for calculating eddy-current (proximity effect) losses in round-wire or litz-wire transformer and inductor windings is derived in this paper.
Abstract: The squared-field-derivative method for calculating eddy-current (proximity-effect) losses in round-wire or litz-wire transformer and inductor windings is derived. The method is capable of analyzing losses due to two-dimensional and three-dimensional field effects in multiple windings with arbitrary waveforms in each winding. It uses a simple set of numerical magnetostatic field calculations, which require orders of magnitude less computation time than numerical eddy-current solutions, to derive a frequency-independent matrix describing the transformer or inductor. This is combined with a second, independently calculated matrix, based on derivatives of winding currents, to compute total AC loss. Experiments confirm the accuracy of the method.

344 citations


Journal ArticleDOI
TL;DR: In this paper, a method for fast response control of the torque and flux of a grid connected wound rotor induction machine fed by back to back connected voltage source inverters on the rotor side is presented.
Abstract: A method is presented for fast response control of the torque and flux of a grid connected wound rotor induction machine fed by back to back connected voltage source inverters on the rotor side. It is based on the measurement of active and reactive power on the grid side where voltages and currents are alternating at fixed frequency. The active and reactive powers are made to track references using hysteresis controllers. The method eliminates the need for rotor position sensing and gives excellent dynamic performance, as shown by simulation and experimental results from a variable speed constant frequency induction generator system. It is also capable of starting on the fly. It is thus an attractive sensorless control method for drive as well as generator applications.

326 citations


Journal ArticleDOI
TL;DR: In this article, the relationship between wire size, normalized cost, and normalized loss is shown to have a general form that applies to a wide range of designs, and a practical design procedure is provided, applied to an example design, it leads to less than half the original loss at lower than the original cost, or, alternatively, under one fifth the original costs with the same loss as the original design.
Abstract: Design of litz-wire windings subject to cost constraints is analyzed. An approximation of normalized cost is combined with analysis of proximity effect losses to find combinations of strand number and diameter that optimally trade off cost and loss. The relationship between wire size, normalized cost, and normalized loss is shown to have a general form that applies to a wide range of designs. A practical design procedure is provided, Applied to an example design, it leads to less than half the original loss at lower than the original cost, or, alternatively, under one fifth the original cost with the same loss as the original design.

233 citations


Journal ArticleDOI
TL;DR: In this article, an exact formulation based on nonlinear maps was used to investigate both the fast-scale and slow-scale instabilities of a voltage-mode buck converter operating in the continuous conduction mode and its interaction with a filter.
Abstract: We use an exact formulation based on nonlinear maps to investigate both the fast-scale and slow-scale instabilities of a voltage-mode buck converter operating in the continuous conduction mode and its interaction with a filter. Comparing the results of the exact model with those of the averaged model shows the shortcomings of the latter in predicting fast-scale instabilities. We show the impact of parasitics on the onset of chaos using a high-frequency model. The experimentally validated theoretical results of this paper provide an improved understanding of the dynamics of the converter beyond the linear regime and this may lead to less conservative control design and newer applications.

225 citations


Journal ArticleDOI
TL;DR: In this paper, the authors present design considerations for a 12-V/1.5-V, 50-A voltage regulator module (VRM) for the next generation of microprocessors.
Abstract: The paper presents design considerations for a 12-V/1.5-V, 50-A voltage regulator module (VRM) for the next generation of microprocessors. The module has stringent power-density and transient-response specifications, which are hard to meet with traditional design techniques. The proposed design solutions increase the VRM efficiency, as well as achieve the desired transient response with a minimum amount of the output capacitance.

Journal ArticleDOI
TL;DR: The introduction of the "distribution ratio" in this technique, allows the development of a systematic approach for implementing either conventional or any modified vector strategies without changing the modulator scheme.
Abstract: The digital scalar pulse-width modulation (DSPWM) gathers the characteristics of simplicity of implementation found in the regular sampling with the flexibility of manipulation of the switching patterns in the space vector modulation (SVPWM). This paper establishes a correlation between the SVPWM and DSPWM techniques. It also shows how to make the DSPWM strategy equivalent to the SVPWM technique without losing its simplicity of implementation. By using such an equivalence concept a microprocessor-based scheme, which uses standard timer circuits and a simple software algorithm, is proposed to implement the DSPWM technique. The introduction of the "distribution ratio" in this technique, allows the development of a systematic approach for implementing either conventional or any modified vector strategies without changing the modulator scheme. This corresponds to generating any attractive nonsinusoidal modulating signals (NSMS) in the carrier-based modulation techniques. Furthermore, the simple digital blocks can be easily implemented as a specialized integrated circuit. Simulated and experimental results demonstrate the validity of the proposed methods.

Journal ArticleDOI
TL;DR: A novel ZVZCS TL converter is proposed, its operation principle and parameter design are analyzed, and the experimental results are also included.
Abstract: This paper proposes a family of modulation strategies for PWM three-level (TL) converters. The modulation strategies can be classified into two kinds according to the turn-off sequence of the two switches of the pair of switches. The concept of the leading switches and the lagging switches is introduced to realize soft-switching for PWM TL converters. The realization of soft-switching for both the leading switches and the lagging switches is proposed, based on which, soft-switching PWM TL converters can be classified into two kinds: zero-voltage-switching (ZVS) and zero-voltage and zero-current-switching (ZVZCS), for which the suitable modulation strategies are pointed out respectively from the family of modulation strategies. A novel ZVZCS TL converter is proposed, its operation principle and parameter design are analyzed, and the experimental results are also included.

Journal ArticleDOI
TL;DR: In this article, the authors proposed a soft-switching topology for DC-DC converters, which is well suited for applications in the range of a few hundred watts to a few kilowatts.
Abstract: A novel soft-switching topology for DC-DC converters is proposed. It is well suited for applications in the range of a few hundred watts to a few kilowatts. It is essentially a hybrid combination of an uncontrolled half-bridge section and a phase-shift controlled full-bridge section, realized with just four switches. The main features of the proposed topology are zero-voltage-switching down to no-load without serious conduction loss penalty, constant frequency operation and, near-ideal filter waveforms. The improved filter waveforms result in significant savings in the input and output filter requirement, resulting in high power-density. The new topology requires two transformers and two DC-bypass capacitors. The combined VA rating of the two transformers is more than that of the single transformer of conventional full-bridge converters, for variable-input applications. In Part I of the paper, the converter operation is analyzed for typical switch-mode power supply applications, where the input voltage varies widely but the output voltage is fixed and is well regulated. Experimental results obtained from a 100 W/200 kHz proof-of-concept prototype confirm the superior features of the proposed hybrid configuration.

Journal ArticleDOI
TL;DR: In this article, the electrical performance of silicon carbide (SiC) power diodes is evaluated and compared to that of commercially available silicon (Si) Diodes in the voltage range from 600 V through 5000 V.
Abstract: The electrical performance of silicon carbide (SiC) power diodes is evaluated and compared to that of commercially available silicon (Si) diodes in the voltage range from 600 V through 5000 V. The comparisons include the on-state characteristics, the reverse recovery characteristics, and power converter efficiency and electromagnetic interference (EMI). It is shown that a newly developed 1500-V SiC merged PiN Schottky (MPS) diode has significant performance advantages over Si diodes optimized for various voltages in the range of 600 V through 1500 V. It is also shown that a newly developed 5000 V SiC PiN diode has significant performance advantages over Si diodes optimized for various voltages in the range of 2000 V through 5000 V. In a test case power converter, replacing the best 600 V Si diodes available with the 1500 V SiC MPS diode results in an increase of power supply efficiency from 82% to 88% for switching at 186 kHz, and a reduction in EMI emissions.

Journal ArticleDOI
TL;DR: The paper explores the spontaneous coupled clamping-capacitor-current control loops and the resultant self-balancing property of the clamping and capacitor-voltages in the multilevel capacitor-clamping-inverter under sub-harmonic PWM modulation.
Abstract: The paper explores the spontaneous coupled clamping-capacitor-current control loops and the resultant self-balancing property of the clamping-capacitor-voltages in the multilevel capacitor-clamping-inverter. The case of the three-level capacitor-clamping-inverter under sub-harmonic PWM modulation is dealt with first. The case of the multilevel capacitor-clamping-inverter (M>3) under sub-harmonic PWM modulation is then analyzed. Test results on a half-bridge three-level capacitor-clamping-inverter prototype under sub-harmonic PWM modulation are demonstrated.

Journal ArticleDOI
TL;DR: In this article, a unified constant-frequency integration (UCI) APF control method based on one-cycle control is proposed to control the pulse width of an AC-DC converter so that its current draw is precisely opposite to the reactive and harmonic current draw of the nonlinear loads.
Abstract: An active power filter (APF) is a device that is connected in parallel to and cancels the reactive and harmonic currents from a group of nonlinear loads so that the resulting total current drawn from the AC mains is sinusoidal. This paper presents a unified constant-frequency integration (UCI) APF control method based on one-cycle control. This method employs an integrator with reset as its core component to control the pulse width of an AC-DC converter so that its current draw is precisely opposite to the reactive and harmonic current draw of the nonlinear loads. In contrast to previously proposed methods, there is no need to generate a current reference for the control of the converter current, thus no need for a multiplier and no need to sense the AC line voltage, the APF current, or the nonlinear load current. Only one AC current sensor is used to sense the AC main current and one DC voltage sensor is used to sense the DC capacitor voltage. The control method features constant switching frequency operation, minimum reactive and harmonic current generation, and simple analog circuitry. It provides a low cost and high performance solution for power quality control. Steady-state and dynamic study is presented in this paper. Design example is given using a two-level AC-DC boost topology. A prototype was developed to demonstrate the performance of the proposed APF. This control method is generalized to control a family of converters that are suitable for APF applications. All findings are supported by experiments and simulation.

Journal ArticleDOI
TL;DR: In this article, a new control strategy to improve the performance of the PWM boost type rectifier when operating under an unbalanced supply is presented, resulting in a smooth (constant) power flow from AC to DC side in spite of the unbalanced voltage condition.
Abstract: This paper presents a new control strategy to improve the performance of the PWM boost type rectifier when operating under an unbalanced supply. An analytical solution for harmonic elimination under unbalanced input voltages is obtained resulting in a smooth (constant) power flow from AC to DC side in spite of the unbalanced voltage condition. Based on the analysis of the open loop configuration, a closed loop control solution is proposed. Simulation results show excellent response and stable operation of the new rectifier control algorithm. A laboratory prototype has been designed to verify the discussions and analyses done in this paper. Theoretical and experimental results show excellent agreement. Elimination of the possibility of low order AC and DC side harmonics due to unbalance is expected to materially affect the cost of DC link capacitor and AC side filter. The proposed method is particularly useful in applications where the large second harmonic at the DC link may have a severe impact on system stability of multiply connected converters on a common link.

Journal ArticleDOI
TL;DR: In this article, a hybrid control approach for the series active power filter (APF) is proposed, where the reference signal of the compensation voltage needed by the series APF is obtained by detecting both source current and load voltage.
Abstract: The series active power filter (APF) is suitable for compensating a voltage type harmonics-producing load, whereas the control approach it adopts may directly influence its compensation characteristics. This paper first discusses the control approach of detecting source current in terms of the basic operation principle of a series APF, then developing a control approach of detecting load voltage. On the basis of these, a hybrid control approach is proposed. In this approach, the reference signal of the compensation voltage needed by the series APF is obtained by detecting both source current and load voltage. Thus, this approach has the advantages of the first and the second control approaches and, at the same time, it can overcome their respective drawbacks. For practical realization, the control methods of the PWM inverter in the series APF and for regulating its DC side voltage are discussed in detail. A prototype of the series APF is manufactured and corresponding experimental investigation is done. The results show that when the series APF, if adopting the hybrid control approach instead of the other two, compensates for the voltage type harmonics-producing load, its performance can be improved greatly.

Journal ArticleDOI
TL;DR: In this article, a systematic method for deriving basic converter configurations that achieve power factor correction (PFC) and voltage regulation was discussed, and a systematic circuit synthesis procedure was proposed for creating PFC voltage regulators with reduced redundant power processing.
Abstract: This paper discusses a systematic method for deriving basic converter configurations that achieve power factor correction (PFC) and voltage regulation. The discussion begins with a general three-port representation of power supplies that provide PFC and voltage regulation. Based on this representation and a power flow consideration, a systematic procedure is derived to generate all possible minimal configurations. Among these configurations, only a few have been known previously and used in practice. It is found that the efficiency of PFC voltage regulators can be improved by reducing the amount of redundant power to be processed by the constituent converters. A systematic circuit synthesis procedure is proposed for creating PFC voltage regulators with reduced redundant power processing. Experimental measurements verify the improved efficiency.

Journal ArticleDOI
TL;DR: In this article, the authors proposed a new scheme to attenuate the common mode noise and hence reduce shaft voltage in adjustable speed drive (ASD) driven motors, which is the most common modulation strategy adopted for motor control in ASDs.
Abstract: The most common modulation strategy adopted for motor control in adjustable speed drives (ASDs) is pulse width modulation (PWM). In general, the output is modulated at a carrier frequency ranging from 1.0 kHz to 20.0 kHz. Experiences with PWM drives have shown that there exist two important concerns: (1) common mode current; and (2) over-voltage at the motor when the distance between motor and the inverter is larger than the critical distance. The high carrier frequency along with fast rise and fall time of the insulated gate bipolar transistors (IGBTs) employed results in nontrivial common-mode or ground currents. The high dv/dt causes shaft voltage, which leads to bearing currents. This phenomenon has been identified as one of the reasons for premature bearing failure in PWM driven motors. A new scheme to attenuate the common mode noise and hence reduce shaft voltage is proposed. Experimental results showing the effectiveness of the proposed solution is also presented.

Journal ArticleDOI
TL;DR: The paper describes the design of a high-performance sensorless permanent magnet synchronous motor drive, capable of starting at full torque even from standstill and able to deliver full torque in 1:12 speed range.
Abstract: The paper describes the design of a high-performance sensorless permanent magnet synchronous motor (PMSM) drive, capable of starting at full torque even from standstill and able to deliver full torque in 1:12 speed range. Experimental setup, hardware circuitry and software implementation are described into details. Particular emphasis is given to the software control algorithms, that were specifically studied to enhance the overall system performance.

Journal ArticleDOI
TL;DR: In this paper, a new hybrid power filter is presented for three phase industrial power systems which include passive power factor correction equipment (PFC), which damps resonances occurring between line impedances and the PFC.
Abstract: A new hybrid power filter is presented for three phase industrial power systems which include passive power factor correction equipment (PFC). The hybrid filter damps resonances occurring between line impedances and the PFC. In addition, the hybrid filter topology can be used to compensate harmonic currents. The capacitors of the PFC, which generally cause resonant problems in harmonic distorted networks, can be used for passive filtering by connecting a transformer with a low magnetizing inductance in series hence creating a single harmonic trap. The primary side of the transformer is connected to a low VA-rated three-phase current controlled inverter which builds the active part of the hybrid topology. Simulation results and experimental results are presented verifying the damping and harmonic compensation performance of the proposed topology.

Journal ArticleDOI
TL;DR: In this paper, a model for low-AC-resistance planar or foil-wound inductors constructed using a quasidistributed gap comprising multiple small gaps that approximate a distributed gap is presented.
Abstract: Low-AC-resistance planar or foil-wound inductors constructed using a quasidistributed gap comprising multiple small gaps that approximate a distributed gap are analyzed. Finite-element simulations are used systematically to develop a model broadly applicable to the design of such quasidistributed gap inductors. It is shown that a good approximation of a distributed gap is realized if the ratio of gap pitch to spacing between gap and conductor is less than four, or if the gap pitch is comparable to a skin depth or smaller. Large gaps can reduce AC resistance, but for most practical designs gap length has little effect. A closed-form expression, which closely approximates the AC resistance factor for a wide range of designs, is developed. The methods are illustrated with an inductor for a high-ripple-current fast-response voltage regulator module (VRM) for microprocessor power delivery.

Journal ArticleDOI
TL;DR: In this paper, two H/sub/spl infin/infin/µ loop-shaping control schemes that use only a capacitor voltage sensor are presented. But their transient performance and robustness are not satisfactory, and a dual-loop structure, additionally employing output of a capacitor current estimator as feedback, provides improved performance over the single-loop scheme.
Abstract: This paper proposes the H/sub /spl infin// loop-shaping approach to the designs of sinusoidal output voltage tracking controllers for single-phase UPS inverters. Selection of weighting functions is introduced, which is quite different from the case of step tracking. By modeling the uncertainty in load as plant output multiplicative perturbation, two H/sub /spl infin// loop-shaping control schemes that use only a capacitor voltage sensor are presented. The first design adopts a single-loop control scheme which has the advantage of simple control structure and easy implementation. But its transient performance and robustness are not satisfactory. The second controller with a dual-loop structure, additionally employing output of a capacitor current estimator as feedback, provides improved performance over the single-loop scheme and has the feature of low distortion, good regulating performance and insensitivity to the variation in load. Simulation and hardware experimental results, with comparison to the PI-based multiple feedback loop design, are given to validate the robustness property and regulating performance of the proposed controllers.

Journal ArticleDOI
TL;DR: In this paper, the symmetrical half-bridge topology with the current doubler and synchronous rectifiers is shown to be a suitable approach for this application and the measured full-load efficiency of a 200 kHz experimental halfbridge converter was higher than 82% in the entire output and input voltage range.
Abstract: The topology selection, design, and performance evaluation of an on-board DC/DC converter, which delivers power from a 48 V input to a 1.2-1.65 V/70 A microprocessor load, are presented. It was shown that the symmetrical half-bridge topology with the current doubler and synchronous rectifiers is a suitable approach for this application. The measured full-load efficiency of a 200 kHz experimental half-bridge converter was higher than 82% in the entire output and input voltage range.

Journal ArticleDOI
TL;DR: The active clamp as discussed by the authors is a linear voltage regulator, with a voltage deadband to allow for voltage ripple, that is designed to operate in parallel with a switchmode voltage regulator.
Abstract: This paper discusses the design, fabrication, and testing of a CMOS active clamp circuit, The active clamp is a linear voltage regulator, with a voltage deadband to allow for voltage ripple, that is designed to operate in parallel with a switchmode voltage regulator. Its specific function is to sink or source large transient currents to microprocessor loads, thus allowing operation with very small output capacitance. Laboratory tests on a prototype IC exhibit stable behavior with negligible overshoot with only 47 microfarads of output capacitance with loads of about nine amperes. Output impedances of 2-3 m/spl Omega/ are achieved.

Journal ArticleDOI
TL;DR: In this article, the authors proposed a sampling algorithm for digital signal processing (DSP) controlled 2 kW power factor correction (PFC) converters, which can improve switching noise immunity greatly in average current-control power supplies.
Abstract: This paper proposes a novel sampling algorithm for digital signal processing (DSP) controlled 2 kW power factor correction (PFCs) converters, which can improve switching noise immunity greatly in average-current-control power supplies. Based on the newly developed DSP chip TMS320F240. a 2 kW PFC stage is implemented. The novel sampling algorithm shows great advantages when the converter operates at a frequency above 30 kHz.

Journal ArticleDOI
TL;DR: In this article, a new primary-side-assisted zero-voltage and zero-current switching full bridge DC-DC converter with transformer isolation is proposed, which uses only one auxiliary transformer and two diodes to obtain ZCS for the leading leg.
Abstract: A new primary-side-assisted zero-voltage and zero-current switching full bridge DC-DC converter with transformer isolation is proposed. The proposed DC-DC converter uses only one auxiliary transformer and two diodes to obtain ZCS for the leading leg. It has a simple and robust structure, and load current control capability even in short circuit conditions, The possibility of magnetic saturation due to asymmetricity of circuits or transient phenomena is greatly reduced, which is a very attractive feature in DC-DC converters with transformer isolation. The power rating of the auxiliary transformer is about 10% of that of the main transformer. Operation of a 12 kW prototype designed for welding application was verified by experiments.

Journal ArticleDOI
TL;DR: In this article, a current-driven synchronous rectifier is proposed to operate at high switching frequency with high efficiency, which can be easily applied to most switching topologies like an ideal diode.
Abstract: A novel current-driven synchronous rectifier is presented in this paper. With the help of a current sensing energy recovery circuit, the proposed current-driven synchronous rectifier can operate at high switching frequency with high efficiency. Compared with those voltage-driven synchronous rectification solutions, this current-driven synchronous rectifier has several outstanding characteristics. It can be easily applied to most switching topologies like an ideal diode. Constant gate drive voltage can be obtained regardless of line and load fluctuation. This makes it desirable in high input range application. Power converters designed with this synchronous rectifier are also capable of being connected in parallel without taking the risk of reverse power sinking. Their principle of operation is given in the paper. A series of experiments verify the analysis and demonstrate the merits.