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A Simulation Study of Analogue and Logic Circuits with CNTFETs

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This article is published in ECS Journal of Solid State Science and Technology.The article was published on 2016-01-01. It has received 40 citations till now.

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High-κ dielectrics for advanced carbon- nanotube transistors and logic gates

TL;DR: In this article, high-kappa (approximately 25) zirconium oxide thin-films (approximately 8 nm) are formed on top of individual single-walled carbon nanotubes by atomic-layer deposition and used as gate dielectrics for nanotube field effect transistors.
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A circuit-compatible model of ballistic carbon nanotube field-effect transistors

TL;DR: A novel method of circuit-compatible modeling of single-walled semiconducting CNFETs in their ultimate performance limit is presented, for the first time, both the I-V and the C-V characteristics of the device have been efficiently modeled for circuit simulations.
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A Semiempirical SPICE Model for n-Type Conventional CNTFETs

TL;DR: In this article, a semi-empirical model of carbon nanotube field effect transistor is presented, based on analytical approximations and parameters extracted from quantum mechanical simulations, having compared the results with those of the numerical model available and of experimental data.
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