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Journal ArticleDOI

Analytical model and characterization of small geometry MOSFET's

T. Yamaguchi, +1 more
- 01 Jun 1983 - 
- Vol. 30, Iss: 6, pp 559-566
TLDR
In this article, a comparison of the electrical characteristics of small geometry p-channel and n-channel MOSFET's with and without field implantation leads to the conclusion that the field implantations is the main cause of the narrow-channel-width effect on threshold voltage, threshold-voltage increase and drain current degradation.
Abstract
Electrical characteristics of small geometry p-channel and n-channel MOSFET's are characterized based on an analytical model that includes short-channel, narrow-channel, and carrier-velocity-saturation effects. Theoretical results on threshold voltage, threshold-voltage shift by a substrate bias voltage, and drain current are in good agreement with the experimental results over wide ranges of channel lengths from 1 to 9 µm and channel widths from 2 to 14 µm. A comparison of the electrical characteristics of MOSFET's with and without field implantation leads to the conclusion that the field implantation is the main cause of the narrow-channel-width effect on threshold-voltage increase and drain-current degradation. The carrier-velocity-saturation effect starts to appear at the 3-µm channel length for the n-channel device and at 1 µm for the p-channel device under 5-V operation. According to the theoretical analysis of a 1-µm-channel inverter circuit, a CMOS inverter has superior noise immunity with 1.4 to 2.0 times larger driving-current capability in a load MOS device and requires 9 percent less area than a 1-µm n-channel enhancement/depletion inverter.

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Citations
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Journal ArticleDOI

An analytical model of conductance and transconductance for enhanced-mode MOSFETs

TL;DR: In this paper, an analytical model of conductance and transconductance for enhanced-mode MOSFETs is presented based on an inversion charge dependent mobility, the model enables the calculation of the conductance/transonductance MOSFLET characteristics against several parameters such as bulk bias, oxide thickness, channel length, source-drain series resistance, surface states density, mobility reduction factor and/or potential fluctuation rate.
Journal ArticleDOI

Applicability of a Subset of Ada as an Algorithmic Hardware Description Language for Graph-Based Hardware Compilation

TL;DR: The feasibility of using a subset of Ada as a hardware description language within the syntax of Ada is discussed, which allows the compiled Ada program to act as a functional simulator.
Journal ArticleDOI

Analytical modelling of the MOS transistor

TL;DR: In this article, generic analytical expressions useful for the modeling of the MOSFET operation as a function of gate and drain biases are presented, both linear and non-ohmic regimes of operation are analyzed.
Journal ArticleDOI

New short-channel n-MOSFET current-voltage model in strong inversion and unified parameter extraction method

TL;DR: In this article, a semi-empirical strong inversion currentvoltage (I-V) model for submicrometer n-channel MOSFETs is proposed, which is suitable for circuit simulation and rapid process characterization.
Journal ArticleDOI

Profiling of stress induced interface states in short channel MOSFETs using a composite charge pumping technique

TL;DR: In this paper, a composite charge pumping technique was proposed to accurately give the energy distribution of interface state densities in short channel MOSFETs, which is based on the successive variation of the gate voltage pulse parameters (top and bottom levels, rise and fall times).
References
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Journal ArticleDOI

Electron mobility in inversion and accumulation layers on thermally oxidized silicon surfaces

TL;DR: In this paper, an extensive set of experimental results on the behavior of electron surface mobility in thermally oxidized silicon structures are presented, which allow the calculation of electron mobility under a wide variety of substrate, process, and electrical conditions.
Journal ArticleDOI

A simple theory to predict the threshold voltage of short-channel IGFET's

TL;DR: A simple expression for the threshold voltage of an IGFET is derived from a charge conservation principle which geometrically takes into account two-dimensional edge effects in this paper, which is valid for short and long-channel lengths.
Journal ArticleDOI

Nonplanar VLSI device analysis using the solution of Poisson's equation

TL;DR: Techniques are presented for calculating the drain current of small-geometry MOSFET's in the linear, subthreshold, and punch-through regions of device operation and the solution method demonstrates good convergence characteristics and minimizes computer storage requirements.
Journal ArticleDOI

MINIMOS - A Two-Dimensional MOS Transistor Analyzer

TL;DR: A user-oriented software tool-MINIMOS-for the two-dimensional numerical simulation of planar MOS transistors, which is able to calculate the doping profiles from the technological parameters specified by the user.
Journal ArticleDOI

A simple model of the threshold voltage of short and narrow channel MOSFETs

TL;DR: In this paper, simple but reasonably accurate equations are proposed which describe the behavior of threshold voltage for short and narrow-channel MOSFETs, for low drain-source voltages.
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