Proceedings ArticleDOI
Design and implementation of real time secured RS232 link for multiple FPGA communication
Suman Sau,Chandrajit Pal,Amlan Chakrabarti +2 more
- pp 391-396
TLDR
The design and implementation of a 32-bit RSA algorithms is demonstrated by developing suitable Hardware and Software design on Xilinx Spartan- 3E (XC3S500E-FG320) device and the implementation has been tested successfully for real time serial data communication between multiple FPGA devices using the RS232 serial interface.Abstract:
Field Programmable Gate Array (FPGA) devices are coming very strongly in the digital hardware systems due to the availability of ready to use resources, parallel logic operations and reconfigurable designs. The usage of FPGA systems in real time domain is also a very fruitful proposition as the FPGA devices are coming with processing cores for Real Time data processing. In a complex system scenario involving a large amount of processing tasks, there is a requirement of building the system using multiple FPGA devices. To make this possible we have to establish a real time data communication between the FPGA devices and to make it even better we have to apply data encryption techniques for making this communication secured.In this paper we demonstrate the design and implementation of a 32-bit RSA algorithms by developing suitable Hardware and Software design on Xilinx Spartan- 3E (XC3S500E-FG320) device, the implementation has been tested successfully for real time serial data communication between multiple FPGA devices using the RS232 serial interface. This development work is also useful for the embedded applications, which requires on board execution of security algorithms. The system is optimized in terms of execution speed and also has been verified using real time debugging tools.read more
Citations
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Journal ArticleDOI
Book review: Applied cryptography: Protocols, algorithms, and source code in C
TL;DR: This is Applied Cryptography Protocols Algorithms And Source Code In C Applied Cryptographic Protocols algorithms and Source Code in C By Schneier Bruce Author Nov 01 1995 the best ebook that you can get right now online.
Proceedings ArticleDOI
Real time communication between multiple FPGA systems in multitasking environment using RTOS
TL;DR: This research work proposes the design and implementation of a real-time FPGA based application, which demonstrates the creation ofreal-time process tasks in FGPA systems for successful real- time communication between multiple FPGAs.
Proceedings ArticleDOI
A novel AES-256 implementation on FPGA using co-processor based architecture
TL;DR: Hardware design for implementing cryptographic algorithm on various hardware platforms like application specific integrated circuit (ASIC), field programmable gate array (FPGA) and micro-controllers is needed in terms of larger key values, higher throughput and less resource utilization.
Journal ArticleDOI
Development of DMA controller for real time data processing in FPGA based embedded application
TL;DR: This paper proposes a technique to implement a DMA controller core on Spartan 3A FPGA hardware, which serves as an essential component for developing a real time data acquisition and processing system.
Journal ArticleDOI
High speed fault tolerant secure communication for muon chamber using FPGA based GBTx emulator
TL;DR: The Compressed Baryonic Matter (CBM) experiment is a part of the Facility for Antiproton and Ion Research (FAIR) in Darmstadt at the GSI and the implementation of read out chain of Muon Cliamber(MUCH) in India is tried to implement FPGA based emulator of GBTx in India.
References
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Journal ArticleDOI
A method for obtaining digital signatures and public-key cryptosystems
TL;DR: An encryption method is presented with the novel property that publicly revealing an encryption key does not thereby reveal the corresponding decryption key.
Book
Applied Cryptography: Protocols, Algorithms, and Source Code in C
Bruce Schneier,Phil Sutherland +1 more
TL;DR: This document describes the construction of protocols and their use in the real world, as well as some examples of protocols used in the virtual world.
Book ChapterDOI
A Scalable Architecture for Montgomery Multiplication
TL;DR: The general view of the new architecture is described, hardware organization for its parallel computation is analyzed, and design tradeoffs which are useful to identify the best hardware configuration are discussed.
Book ChapterDOI
High-Radix Design of a Scalable Modular Multiplier
TL;DR: This paper describes an algorithm and architecture based on an extension of a scalable radix-2 architecture proposed in a previous work that is proven to be correct and the hardware design is discussed in detail.