Digital sensitivity: predicting signal interaction using functional analysis
Desmond A. Kirkpatrick,Alberto Sangiovanni-Vincentelli +1 more
- pp 536-541
TLDR
It is found that it is possible to predict signal interaction by signal functionality alone, leading to a significant amount of robust switching isolation, independent of parasitics introduced by layout or semiconductor process.Abstract:
Maintaining signal integrity in digital systems is becoming increasingly difficult due to the rising number of analog effects seen in deep submicron design. One such effect, the signal crosstalk problem, is now a serious design concern. Signals which couple electrically may not affect system behavior because of timing or function in the digital domain. If we can isolate observable coupling effects then we can constrain layout synthesis to eliminate them. In this paper, we find that it is possible to predict signal interaction by signal functionality alone, leading to a significant amount of robust switching isolation, independent of parasitics introduced by layout or semiconductor process. We introduce techniques to predict signal interaction using functional sensitivity analysis. In general sequential networks we find that significant switching isolation can be extracted with efficient sensitivity analysis algorithms, thus giving promise to the goal of synthesizing layout free from crosstalk effects.read more
Citations
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Journal ArticleDOI
Harmony: static noise analysis of deep submicron digital integrated circuits
TL;DR: A metric for noise immunity is defined, and a static noise analysis methodology based on this noise-stability metric is introduced to demonstrate how noise can be analyzed systematically on a full-chip basis using simulation-based transistor-level analysis.
Patent
Method for verification of crosstalk noise in a CMOS design
TL;DR: In this article, a methodology is provided that is a practical approach to full-chip crosstalk noise verification, using either timing information or functional information, and a grouping based method is described for identification of potential victims and associated aggressors.
Proceedings ArticleDOI
Timing and crosstalk driven area routing
TL;DR: A timing and crosstalk driven router for the chip assembly task that is applied between global and detailed routing, and a graph-based optimizer that preroutes wires on the global routing grids incrementally in two stages - net order assignment and space relaxation.
Proceedings ArticleDOI
A novel VLSI layout fabric for deep sub-micron applications
Sunil P. Khatri,Amit Mehrotra,Robert K. Brayton,Alberto Sangiovanni-Vincentelli,Ralph H. J. M. Otten +4 more
TL;DR: A new VLSI layout methodology which addresses the main problems faced in deep sub-micron (DSM) integrated circuit design, and shows how the uniform parasitics of the fabric give rise to a reliable and predictable design.
Book
Cross-talk noise immune VLSI design using regular layout fabrics
TL;DR: This work validated deep sub-Micron effects in a Network of PLAS using VLSI Layout Fabrics, a novel approach to fabric cell based design that reduces the uncertainty in the design of fabrics.
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