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Parallelism in fast Fourier transform hardware

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TLDR
A diagrammatic representation of mixed radix and highest radix FFT algorithms is derived, and two broad classes of FFT hard-ware are explored, from the point of view of speed, parallelism, radix number, and type of memory.
Abstract
The fast Fourier transform algorithm is derived by means of successive fracturing of one-dimensional data strings into two-dimensional arrays. Using this formulation, a diagrammatic representation of mixed radix and highest radix FFT algorithms is derived. Using this representation, two broad classes of FFT hard-ware are explored, from the point of view of speed, parallelism, radix number, and type of memory.

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Citations
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Journal ArticleDOI

Pipeline and Parallel-Pipeline FFT Processors for VLSI Implementations

TL;DR: VLSI implementations have constraints which differ from those of discrete implementations, requiring another look at some of the typical FFT'algorithms in the light of these constraints.
Journal ArticleDOI

Fourier Transform Computers Using CORDIC Iterations

TL;DR: The CORDIC iteration is applied to several Fourier transform algorithms and a new, especially attractive FFT computer architecture is presented as an example of the utility of this technique.
Journal ArticleDOI

A pipelined FFT processor for word-sequential data

TL;DR: A modified fast Fourier transform algorithm is described together with a real-time pipelined implementation that requires less data memory and only 1/3 of the number of complex multipliers of a conventional design.
Journal ArticleDOI

Pipelined Radix- $2^{k}$ Feedforward FFT Architectures

TL;DR: The proposed radix-2k feedforward architectures not only offer an attractive solution for current applications, but also open up a new research line on feedforward structures.
Journal ArticleDOI

A 64-point Fourier transform chip for high-speed wireless LAN application using OFDM

TL;DR: A novel fixed-point 16-bit word-width 64-point FFT/IFFT processor developed primarily for the application in an OFDM-based IEEE 802.11a wireless LAN baseband processor that can be used for any application that requires fast operation as well as low power consumption.
References
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Journal ArticleDOI

An algorithm for the machine calculation of complex Fourier series

TL;DR: Good generalized these methods and gave elegant algorithms for which one class of applications is the calculation of Fourier series, applicable to certain problems in which one must multiply an N-vector by an N X N matrix which can be factored into m sparse matrices.
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An algorithm for computing the mixed radix fast Fourier transform

TL;DR: This paper presents an algorithm for computing the fast Fourier transform, based on a method proposed by Cooley and Tukey, and includes an efficient method for permuting the results in place.
Journal ArticleDOI

What is the fast Fourier transform

TL;DR: The discrete Fourier transform of a time series is defined, some of its properties are discussed, the associated fast method for computing this transform is derived, and some of the computational aspects of the method are presented.
Journal ArticleDOI

An Adaptation of the Fast Fourier Transform for Parallel Processing

TL;DR: A modified version of the Fast Fourier Transform is developed and described and it is suggested that this form is of general use in the development and classification of various modifications and extensions of the algorithm.
Journal ArticleDOI

Application of the fast Fourier transform to computation of Fourier integrals, Fourier series, and convolution integrals

TL;DR: In this article, the properties of the fast Fourier transform are related to commonly used integral transforms including the Fourier Transform and convolution integrals, and the relationship between the Fast Fourier Transformer and Fourier series is discussed.
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