Journal ArticleDOI
Sehwa: a software package for synthesis of pipelines from behavioral specifications
N. Park,Alice C. Parker +1 more
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Sehwa can find the minimum-cost design, the highest performance design, and other designs between these two in the design space and executes within minutes, for problems of practical size, on a VAX 11/750.Abstract:
A set of techniques for the synthesis of pipelined data paths is described, and Sehwa, a program that performs such synthesis, is presented. The task includes the generation of data paths from a data-flow graph along with a clocking scheme that overlaps execution of multiple tasks. Some design examples are given. Sehwa can find the minimum-cost design, the highest performance design, and other designs between these two in the design space. Sehwa is written in Franz Lisp and executes within minutes, for problems of practical size, on a VAX 11/750. >read more
Citations
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Journal ArticleDOI
Algorithm-level recomputing with shifted operands-a register transfer level concurrent error detection technique
Kaijie Wu,Ramesh Karri +1 more
TL;DR: Algorithm-level REcomputing with Shifted Operands (ARESO), which is a new register transfer (RT) level time redundancy-based concurrent error detection (CED) technique, and supports hardware versus performance versus error detection latency tradeoffs.
Journal ArticleDOI
SPAID: an architectural synthesis tool for DSP custom applications
TL;DR: SPAID, a design tool that maps digital signal processing algorithms into a multibus VLSI architecture is discussed, and produces better solutions compared with existing synthesis systems on an elliptic filter benchmark design example.
Book ChapterDOI
Exploring the algorithmic design space using high level synthesis
Miodrag Potkonjak,Jan M. Rabaey +1 more
TL;DR: It is shown how HYPER can improve the performance or cost of real life applications with orders of magnitude by guiding and conducting a proper algorithmic design selection process.
Journal ArticleDOI
A prescriptive formal model for data-path hardware
David Knapp,M. Winslett +1 more
TL;DR: The authors present a formal representation for register-level digital designs expressed in term of three models of a design, the data-flow structure, and timing models, and by bindings that express the interrelationships of the three models.
Journal ArticleDOI
Pipeline synthesis and optimization of FPGA-based video processing applications with CAL
TL;DR: A pipeline synthesis and optimization technique that increases data throughput of FPGA-based system using minimum pipeline resources and is applied on CAL dataflow language, and designed based on relations, matrices, and graphs.
References
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Book ChapterDOI
First version of a data flow procedure language
TL;DR: The language is being used as a model for study of fundamental semantic constructs for programming, as a target language for evaluating trans-latability of programs expressed at the user-language level, and as a guide for research in advanced computer architecture.
Journal ArticleDOI
Data Flow Program Graphs
TL;DR: Data flow languages form a subclass of the languages which are based primarily upon function application and graphical representations and their applications are the subject of this article.
Proceedings ArticleDOI
Improving the throughput of a pipeline by insertion of delays
TL;DR: A methodology is presented for modifying the collision characteristics with the insertion of delays so as to increase the utilization of segments and hence the throughput under appropriate scheduling.
Proceedings ArticleDOI
SEHWA: A Program for Synthesis of Pipelines
Nohbyung Park,Alice C. Parker +1 more
TL;DR: Sehwa is believed to be the first pipelined synthesis program published in the open literature and can find the minimum cost design, the highest performance design, and other designs between these two in the design space.
Proceedings ArticleDOI
The ADAM Advanced Design Automation System: Overview, Planner and Natural Language Interface
TL;DR: ADAM is described, an integrated Advanced Design AutoMation system, with focus on the knowledge-based synthesis subsystem, which includes a number of design activities and utilities, and a unified, multidimensional, hierarchical design representation.