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Proceedings ArticleDOI

Stochastic Behavior of a CMOS Inverter

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TLDR
A method for modelling the stochastic behavior of circuits and applying the method to a CMOS inverter is developed and extended to other circuits where stochastically sample paths and sample statistics are necessary to characterize the circuits.
Abstract
As feature sizes of integrated circuits continue to shrink and demand for low power operation continues to increase, power supply voltages may eventually be reduced to the level where noise becomes significant compared with signals. This would cause digital logic circuits to exhibit non-deterministic behavior. In this paper, we study the stochastic behavior of simple digital circuits operating at low power supply voltages. We develop a method for modelling the stochastic behavior of circuits and apply the method to a CMOS inverter. We use numerical simulations of stochastic differential equations to obtain time- domain transient analysis of the CMOS inverter and magnitude statistics from multiple sample paths. Further, we derive the output distribution at steady state from first principles. We characterize the switching error and the information transmission based on the output steady state distribution. This study provides a detailed understanding of how noise affects the operation of the CMOS inverter at low power supply voltages. The method we develop here can also be extended to other circuits where stochastic sample paths and sample statistics are necessary to characterize the circuits. Traditional frequency domain noise analysis is not adequate to provide this information.

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Citations
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A Low-Voltage High-Speed CMOS Inverter-Based Digital Differential Transmitter with Impedance Matching Control and Mismatch Calibration

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Advances on CMOS Shift Registers for Digital Data Storage

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References
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Book

Noise in solid state devices and circuits

TL;DR: In this paper, the authors propose a method to generate 1/f noise noise in particular Amplifier Circuits Mixers by using thermal noise shot and flicker noise, respectively.
Journal ArticleDOI

White noise in MOS transistors and resistors

TL;DR: In this article, the theoretical and experimental results for white noise in the low-power subthreshold region of operation of an MOS transistor are discussed and it is shown that the measurements are consistent with the theoretical predictions.
Journal ArticleDOI

Energy aware computing through probabilistic switching: a study of limits

TL;DR: The main result in this paper establishes the energy savings derived by using probabilistic AND as well as NOT gates constructed from an idealized switch that produces a Probabilistic bit (PBIT).
Journal ArticleDOI

The fundamental limit on binary switching energy for terascale integration (TSI)

TL;DR: The fundamental limit on signal energy transfer during a binary switching transition is E/sub s/(min)=(ln2)kT as mentioned in this paper, which is based on two entirely distinct physical models, one ideal MOSFET operating in a CMOS inverter circuit at the limit of its capacity for binary signal discrimination.
Proceedings ArticleDOI

A Probabilistic-Based Design Methodology for Nanoscale Computation

TL;DR: A probabilistic-based design methodology for designing nanoscale computer architectures based on Markov Random Fields (MRF), which can express arbitrary logic circuits and logic operation by maximizing the probability of state configurations in the logic network.
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Does Inverter AC make noise?

This study provides a detailed understanding of how noise affects the operation of the CMOS inverter at low power supply voltages.