Showing papers on "Capacitor published in 1989"

Optimal capacitor placement on radial distribution systems

Abstract: The problem of capacitor placement on a radial distribution system is formulated and a solution algorithm is proposed. The location, type, and size of capacitors, voltage constraints, and load variations are considered. The objective of capacitor placement is peak power and energy loss reduction, taking into account the cost of the capacitors. The problem is formulated as a mixed integer programming problem. The power flows in the system are explicitly represented, and the voltage constraints are incorporated. A solution method has been implemented that decomposes the problem into a master problem and a slave problem. The master problem is used to determine the location of the capacitors. The slave problem is used by the master problem to determine the type and size of the capacitors placed on the system. In solving the slave problem, and efficient phase I-phase II algorithm is used. >

Optimal sizing of capacitors placed on a radial distribution system

Abstract: A capacitor sizing problem for capacitors placed on a radial distribution system is formulated as a nonlinear programming problem, and a solution algorithm is developed. The object is to find the optimal size of the capacitors so that the power losses will be minimized for a given load profile while considering the cost of the capacitors. The formulation also incorporates the AC power flow model for the system and the voltage constraints. The solution algorithm developed for the capacitor sizing problem is based on a Phase I-Phase II feasible directions approach. Novel power flow equations and a solution method, called DistFlow, for radial distribution systems are introduced. The method is computationally efficient and numerically robust, especially for distribution systems with large r/x ratio branches. DistFlow is used repeatedly as a subroutine in the optimization algorithm for the capacitor sizing problem. The test results for the algorithm indicate that the method is computationally efficient and has good convergence characteristics. >

The resonant DC link converter-a new concept in static power conversion

Abstract: A novel approach to realizing efficient high-performance power converters is presented. The concept of a resonant DC link inverter has been proposed and realized with the addition of only one small inductor and capacitor to a conventional voltage source inverter circuit. The proposed technology is capable of switching almost an order of magnitude faster than state-of-the-art voltage source inverters at significantly improved efficiencies using the same family of devices. The topology is especially suitable for high-power applications using gate turn-off devices. A 4.5 kW inverter has been fabricated and tested extensively in the laboratory, and the superior characteristics of the resonant DC link topology have been verified. >

Switching converter with pseudo-resonant DC link

Abstract: A pseudo-resonant DC link for coupling direct current from a DC source to an inverter includes a plurality of switches which are controlled so as to minimize switching loss in the DC link and in the inverter. The DC link includes a capacitor and an inductor coupled through controllable switches in a manner that momentarily reduces to zero the input voltage to the inverter each time that a switch in the inverter is commutated. The controllable switches in the DC link function to allow the capacitor to resonate through the inductor and then be recharged at the end of a commutation interval. The controllable switches in the DC link are timed to that switching generally occurs under conditions of zero current.

Zero-switching-loss inverters for high-power applications

Abstract: The development of zero switching loss inverters has attracted much interest for industrial applications. Two topologies for realizing zero switching losses in high-power converters are proposed. The actively clamped resonant DC link inverter uses the concept of a lossless active clamp to restrict voltage stresses to only 1.3-1.5 supply voltage. For applications demanding substantially better spectral performance, the resonant pole inverter (RPI), also called the quasi-resonant current mode inverter, is proposed as a viable topology. Using only six devices rated at supply voltage, this circuit transfers the resonant components to the AC side of each phase and thus requires additional inductor and capacitor (LC) components. On the other hand, the RPI is capable of true pulsewidth modulation (PWM) operation at high frequency as opposed to discrete pulse modulation operation found in resonant DC link invertors. >

Circuit for measuring the capacity of a battery

Abstract: The discharge capacity of a secondary battery, e.g. a Ni-Cd battery, has a maximum value at room temperature and gradually decreases both with an increase and decrease of ambient temperature. The battery discharge capacity also varies inversely with the number of battery charge/discharge cycles of the battery. A circuit for measuring the remaining discharge capacity of the secondary battery comprises a capacitor (23) whose temperature and age-variation characteristics are very similar to those of the discharge capacity of the secondary battery. The current flowing through the battery and motor (13) is detected by a series resistor (17). A voltage follower (20) responds to the detected voltage and drives a resistor (24), so that capacitor (23) is discharged at a rate determined by the resistor (24) current. The capacitor voltage is compared with a predetermined value by a hysteresis comparator (29) which controls the ON/OFF state of a transistor (21) in accordance with the comparison. The comparator output pulses, i.e., the capacitor charge/discharge cycles, are counted by a counter (31). Since the capacitance variation of the capacitor corresponds to the variation in battery discharge capacity with ambient temperature and also with the time of use, the counter (31) indicates very accurately the remaining battery capacity

A 1 kW, 500 kHz front-end converter for a distributed power supply system

Abstract: The analysis, design, and performance are discussed of a prototype high power-density converter suitable for use in the front-end of a distributed power supply system. The system delivers 1 kW to a regulated 40 V distribution bus from the rectified utility line. Its switching frequency is 500 kHz, and it uses a phase-shifted pulse-width modulation technique to avoid primary-side switching losses. The converter's topology is a standard power MOSFET H-bridge that drives a transformer. The output of this transformer is rectified by a full bridge of Schottky diodes. The switches of this forward converter are operated in a fixed-frequency PWM mode. The dominant parasitic elements are the transformer's leakage inductor, the MOSFETs' output capacitors, and the rectifiers' junction capacitors. Of these three groups of parasitic elements, only the leakage inductors do not result in a direct switching loss. To avoid MOSFET switching losses, the converter is controlled with a special gate-drive pattern that permits full recovery of the MOSFETs' capacitive energy. At the same time this drive scheme gives zero-voltage switching for the MOSFETs. The converter's efficiency at full load approaches 90%. >

Multiple chemically modulated capacitance determination

Abstract: Apparatus and methods are provided for multiple detection of analytes employing semiconductor capacitance as the signal modulated by the analyte. A plurality of semiconductor capacitors are organized for detection (at individual sites) of changes in capacitance which are related to changes in a fluid medium, where the change can be related to the presence of an analyte. Circuitry is designed to substantially maximize sensitivity.

A self-calibration technique for monolithic high-resolution D/A converters

Abstract: A self-calibration technique based upon charge storage on the gate-source capacitance of CMOS transistors is presented. The technique can produce multiple copies of a reference current. Therefore, it is suitable for the calibration of high-resolution D/A (digital/analog) converters which are based upon equal current sources. As the storage capacitor is internal, no external components are required. A calibrated spare current source is used to allow continuous converter operation. This implies that no special calibration cycles are required. To show the capabilities of the calibration technique, it was implemented in a 16-b D/A converter. Measurement results show a total harmonic distortion of 0.0025% at a power consumption of 20 mW and a minimum supply voltage of 3 V. The design was fabricated in a 1.6- mu m double-metal CMOS process without special options. >

Pressure mapping system with capacitive measuring pad

Abstract: A pressure distribution measuring system includes a pad of insulating material disposed between two linear arrays of electrodes to form a matrix of capacitive nodes. A capacitance related output signal that is obtained from a node of interest is used as a feedback signal and applied to other capacitors that are connected in common with the node of interest. The feedback signal inhibits the flow of current through these commonly connected capacitors, and thereby isolates the measured signal from any changes in the capacitance of these other capacitors. The pad includes a cental array of linear electrodes sandwiched between two layers of dielectric foam material. Two outer, aligned linear electrode arrays, oriented perpendicular to the central array, are respectively disposed on the outside surfaces of the dielectric layers. In a preferred form, alternating electrodes in each outer array are located on opposite sides of a support substrate. This construction increases the amplitude of the measured signal, isolates the measured signal from the ambient environment, and reduces the susceptibility of the measuring process to errors caused by wrinkling of the pad as a person lies on it, or the like.

Capacitor laminate for use in capacitive printed circuit boards and methods of manufacture

Abstract: A capacitor laminate is described either as an intermediate product for use in a capacitive printed circuit board or as part of the assembled printed circuit board in order to provide a bypass capacitive function for large numbers of devices mounted or formed on the printed circuit board, the capacitor laminate being formed from sheets of conductive material and an intermediate sheet of dielectric material forming the laminated capacitor as a structurally rigid assembly and facilitating its inclusion within the PCB, components of the capacitor laminate having selected characteristics whereby each individual device is provided with capacitance by a proportional portion of the capacitor laminate and by borrowed capacitance from other portions of the capacitor laminate, the capacitive function of the capacitor laminate being dependent upon random firing or operation of the devices. Methods of manufacture for the capacitor laminate as well as the capacitive PCB are also described. The capacitor laminate of the present invention is preferably formed with preferred surface treatment or surface characteristics on the conductive foils employed therein.

Designing Cofired Multilayer Electrostrictive Actuators for Reliability

Abstract: Multilayer electrostrictive actuators are large capacitors with the added complexity of having to perform mechanically as well as electrically. High operating fields and severe operating conditions make it necessary to predict and limit stress levels generated in the device. A constitutive three-dimensional model for electrostrictors has been developed and implemented as a design tool for actuators. The effects of electrode geometry and transition-layer thickness on stress levels have been modeled and failure in high-stress regions has been correlated with the presence of flaws (pores and delaminations) in the devices. [Key words: capacitors, electrical properties, stress, multilayer, modeling.]

Angle controlled current regulated rectifiers for AC/AC converters

Abstract: Rectifier control schemes for use in AC-DC-AC voltage-sourced resonant link converters with controlled rectifiers are discussed. Resonant link converters require the use of discrete pulse modulation. Control of the AC-to-DC converter by means of averaging methods or duty-cycle control is not inherent with this type of modulation. However, it is shown that the voltage-sourced rectifier cannot be operated solely on the basis of instantaneous quantities. A bang-bang control scheme is developed which independently controls the angle and the magnitude of the AC line current vector. The magnitude of the current is controlled using a linear combination of the link voltage error and the current magnitude error. The current reference is derived by the use of load torque estimation. In addition, the current vector that satisfies the sliding-mode criteria and results in the lowest voltage ripple is chosen to further minimize the size of the link capacitor. >

Analysis and modeling of on-chip high-voltage generator circuits for use in EEPROM circuits

Abstract: Most of the presently available EEPROM circuits feature 5-V-only operation and therefore incorporate on-chip high-voltage generators. In spite of the importance of these latter circuits, a thorough analysis of the circuit has not been presented. In this paper the characteristics of the voltage multiplier circuit are thoroughly analyzed and modeled. The results obtained from this analysis are fully confirmed by experiments. The degradation characteristics of the circuit are discussed and its capability to compensate for nonvolatile memory degradation is shown. >

Power factor improvement

Abstract: A boost convertor power supply comprising an electronic switch controlling current through a boost inductance, rectifier means for charging capacitor means which accumulate the resulting boost charge from the boost inductance, and means for repeatedly switching the electronic switch. Pulse width modulation means vary the relative on/off period of each cycle of switching to cause the peak switch current to follow a variable amplitude wave of shape corresponding to the input voltage applied to the boost convertor and amplitude controlled by an error amplifier and multiplier thereby regulating the output voltage. A ramp signal generator provides for pulse width stability. Means correct for the difference between average current in the boost inductor and peak switch current to modify the pulse width modulation means to reduce distortion of the line current waveform.

Tantalum capacitor and method of making same

Abstract: A method of manufacturing a tantalum capacitor includes compacting tantalum powder about a tantalum anode rod in such manner than the tantalum powder in a region in registry with the tantalum rod is compacted to a density of from about 8 to 10 grams per cc or more, whereas the density of the remaining portions of the tantalum powder mass are compacted to a density of from about 4 to 7 grams per cc. The disclosure further relates to a improved capacitor formed in accordance with the method, as well as to an improved capacitor preform, the capacitor and preform being characterized in that a higher reliability mechanical and electrical connection is effected between the anode rod and the tantalum materials surrounding the rod.

Method for cardiac defibrillation

Abstract: A method for cardiac defibrillation is described, for use with an implanted defibrillator. A patient's R-waves are sensed to detect the R-R intervals. If an arrhythmia is detected, the charging of a capacitor is commenced. Determination are made whether the arrhythmia is still in progress and whether the capacitor is charged a predetermined amount. If the arrhythmia is not still in progress, the charging is discontinued. If the arrhythmia is still in progress and the capacitors are charged a predetermined amount, another R-R interval is detected and if the R-R interval is shorter than a selected amount, a shock is delivered to the heart.

A surrounding gate transistor (SGT) cell for 64/256 Mbit DRAMs

Abstract: A novel three-dimensional memory cell called the surrounding gate transistor (SGT) cell has been developed for 64/256-Mb DRAMs (dynamic RAMs). In the SGT cell structure, a transfer gate and a capacitor electrode surround a pillar silicon island. Contact of the bit line is made on top of the silicon pillar. All devices for a memory cell are located in one silicon pillar. Each silicon pillar is isolated by matrixlike trenches. Therefore, there is no intercell leakage current even in small cell-to-cell spacing. The SGT cell can achieve an extremely small cell size of 1.2 mu m/sup 2/ and a large capacitance of 30 fF using a relaxed design rule of 0.5 mu m. The cell has been fabricated and its functionality confirmed. >

Constant frequency zero-voltage-switching multi-resonant converter

Abstract: A zero-voltage multi-resonant converter that operates at constant frequency. In the zero-voltage multi-resonant converter, the resonant circuit is formed in a π-network with resonant capacitors connected in parallel with the switches. In practicing the present invention, certain rules are applied to derive a CF ZVS-MRC from a PWM converter. In particular, one resonant capacitor is placed in parallel with the active switch, which may be either uni-directional or bi-directional, the rectifying switch is replaced by another active switch, which may also be uni-directional or bi-directional, another resonant capacitor is placed in parallel with the other active switch, and an inductor is inserted in the loop containing the two switches. This loop can also contain voltage sources and filter or blocking capacitors.

PWM-CSI inverter for induction motor drives

Abstract: The authors discuss a number of issues involved in designing a current source inverter system for a large induction motor drive. Using two modulation techniques-selected harmonic elimination in the upper frequency range and trapezoidal modulation in the lower frequency range-control of voltage, current, and torque harmonics is achieved while limiting the GTO switching frequency to 180 Hz. Each modulation range is divided into a number of subranges to exploit the available switching capacity and to avoid harmonic resonances involving the capacitor and the motor inductance. In addition to the development of basic principles, the authors include simulation waveforms and test results from a laboratory experimental system. >

A 10-bit 5-Msample/s CMOS two-step flash ADC

Abstract: A 10-b, 5Msample/s, two-step flash A/D converter fabricated in a 1.6 mu m CMOS process is described. The architecture is based on a resistor string and capacitor arrays and was developed to overcome the disadvantages of the previous approaches, namely flash, pipelined, and classical two-step converters. With minimal capacitor matching requirements and comparator offset voltage cancellation, the converter is monotonic. To minimize charge-injection errors the converter is fully differential. A high-speed comparator architecture using three comparator stages was designed to provide a gain of more than 1000, and a comparison time of less than 10 ns. The total area of the converter excluding the bonding pads is 54 kmil/sup 2/. Power dissipation is 350 mW, of which 60 mW is dissipated in the resistor string. >

Operating principles of the ultracapacitor

Abstract: The charge-storage mechanism and the design of the ultracapacitor are described. Based on a ceramic with an extremely high specific surface area and a metallic substrate, the ultracapacitor provides extremely high energy densities and exhibits low ESR (equivalent series resistance). The combination of low ESR and extremely low inductance provides the ultracapacitor with a very high power density and fast risetime as well. As a double-layer capacitor, the ultracapacitor is not constrained by the same limitations as dielectric capacitors. Thus, although its discharge characteristics and equivalent circuit are similar to those of dielectric capacitors, the capacitance of the ultracapacitor increases with the ceramic loading on the substrate and its ESR is inversely proportional to the cross-sectional area of the device. The ultracapacitor is composed of an inline stack of electrodes, which leads to an extremely low inductance device, and it exhibits interesting frequency dependence. The ultracapacitor principle has been extended to nonaqueous electrolytes and to a wide temperature range. >

Switch-mode power supply with burst mode standby operation

Abstract: In a switch mode power supply, a first switching transistor is coupled to a primary winding of a transformer for generating pulses of a switching current. A secondary winding of the transformer is coupled via a switching diode to a capacitor of a control circuit for developing a control signal in the capacitor. The control signal is applied to a mains coupled chopper second transistor for generating and regulating supply voltages in accordance with pulse width modulation of the control signal. During standby operation, the first and second transistors operate in a burst mode that is repetitive at a frequency of the AC mains supply voltage such as 50 Hz. In the burst mode operation, during intervals in which pulses of the switching current occur, the pulse width and peak amplitude of the switching current pulses progressively increase in accordance with the waveform of the mains supply voltage to provide a soft start operation in the standby mode of operation within each burst group.

Method of making multilayer printed circuit board

Abstract: A method of making a multilayer printed circuit board providing sufficient internal distributed capacitance so as to eliminate the need for the by-pass capacitor conventionally provided in the vicinity of each integrated circuit mounted to the board. The method includes providing one or more fully-cured power-ground plane sandwich components which are laminated together with other partially cured component layers of the board. Each sandwich component comprises a conductive power plane layer and a conductive ground plane layer having a fully cured dielectric material therebetween. The thickness of the dielectric layer of each sandwich is chosen sufficiently thin to provide the desired distributed capacitance.

Solid electrolytic capacitor

Abstract: PROBLEM TO BE SOLVED: To increase capacitance and moreover reduce impedance at a high frequency region by a method, wherein this capacitor is composed of a conductive high polymer in which alkylsulfonate ions are doped in a high polymer having a heterocyclic monomer unit represented by a specific formula as a repetition unit. SOLUTION: A porous tantalum sintered body is anode-oxidized to form a dielectric film composed of a tantalum oxide on the surface. Next, after a tantalum sintered body formed with the dielectric film on the surface is dipped in a hydrogen peroxide solution and a vihiolic aqueous solution, it is taken out, and a high polymer film having a heterocyclic monomer unit as the repetition unit represented by a formula [R1, R2 are each independently an alkyl base or H, and X is S or NR3 (R3 is an alkyl base or H)] is formed on the dielectric film. Dodecylsulfonate ions and vitriolic ions are doped on the high polymer film to form a solid electrolytic layer composed of a conductive high polymer.

Thermoelectric energy conversion

Abstract: A thermopile 30 comprises a stacked assembly of bimetallic layers in which there is full conductor interface contact over the distance separating hot and cold surfaces 31, 32. The assembly may include dielectric layers forming a capacitor stack. A.C. current through the stack is matched in strength to the Seebeck-generated thermoelectric current circulating in each bimetallic layer. The resulting current snakes through the stack to cause Peltier cooling at one heat surface and heating at the other. A.C. operation at a kilocycle frequency enhances the energy conversion efficiency as does heat flow parallel with the junction interface.

Surface mount filter with integral transmission line connection

Abstract: A surface mount dielectric block filter (100 in Figure 4A) with an integral transmission line connection (403, 407) to external circuitry is disclosed. In order to connect an input/output capacitor (113, 115) metallized on the surface of the dielectric block to a substrate (601) upon which the dielectric block is directly mounted, a transmission line (401, 405) of appropriate characteristic impedance disposed on the surface of the dielectric block is connected between one plate of the metallized capacitor (113, 115) and an input/output terminal (403, 407). Two such dielectric block filters (100 in Figure 8) may be coupled together to form a radio transceiver duplexer.

Power line communication system

Abstract: A power line communication system which includes an electrical power line having one or more loads which feed objectionable electrical noise back into the power line. The electrical noise is attenuated across a broad frequency range to enable effective communication over the power line by a directional common mode trap located between the point where the communication signals are applied to the power line and the source of the electrical noise. The trap requires only a capacitor for each electrical phase and a 1:1 transformer having a magnetic core and single turn, straight through windings. The trap is connected to provide a low impedance path to ground for the electrical noise, while providing a high impedance to ground for the communication signals.

Method of manufacturing capacitor

Abstract: In the invention, the thin natural oxide film formed on a surface of a first polycrystalline silicon layer containing an impurity diffused at a high concentration is transformed into a silicon nitride film by rapid nitriding. When the resultant structure is placed in a low-pressure CVD furnace to deposit a silicon nitride film, no natural oxide film is grown on the polycrystalline silicon layer. Hence, when the invention is applied to manufacture of a capacitor for a memory cell, the inter-layer insulative film of the capacitor is not too thick. As a result, a reliable capacitor suitable for micropatterning of elements can be formed between the first and second polycrystalline silicon layers.

Concerning the design of capacitively driven induction coil guns

Abstract: The authors consider the design of capacitively driven, multisection, electromagnetic coil launchers, or coil guns, taking their transient behavior into account. A lumped-parameter computer simulation is developed to predict the performance of the launcher system. It is shown that a traveling electromagnetic wave can be generated on the barrel by the resonance of drive coils and their capacitors. More than half of the energy initially stored in the capacitor bank can be converted into kinetic energy of the projectile in one shot, and an additional quarter can be utilized in subsequent shots, if the launcher dimensions, resonant frequency, and firing sequence are properly selected. The projectile starts smoothly from zero initial velocity and with zero initial sleeve current. Section-to-section transitions which have significant effects on the launcher performance are also discussed. Experimental results were obtained with a small model and are in good agreement with theoretical predictions. >