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Showing papers on "Control reconfiguration published in 2006"


Proceedings ArticleDOI
23 Apr 2006
TL;DR: This paper develops a basic scheme as a building block for all other advanced algorithms of the VN assignment problem and develops a selective VN reconfiguration scheme that prioritizes the reconfigurations of the most critical VNs.
Abstract: Recent proposals for network virtualization provide a promising way to overcome the Internet ossification. The key idea of network virtualization is to build a diversified Internet to support a variety of network services and architectures through a shared substrate. A major challenge in network virtualization is the assigning of substrate resources to virtual networks (VN) efficiently and on-demand. This paper focuses on two versions of the VN assignment problem: VN assignment without reconfiguration (VNA-I) and VN assignment with reconfiguration (VNAII). For the VNA-I problem, we develop a basic scheme as a building block for all other advanced algorithms. Subdividing heuristics and adaptive optimization strategies are then presented to further improve the performance. For the VNA-II problem, we develop a selective VN reconfiguration scheme that prioritizes the reconfiguration of the most critical VNs. Extensive simulation experiments demonstrate that the proposed algorithms can achieve good performance under a wide range of network conditions.

818 citations


Journal ArticleDOI
TL;DR: This note investigates process fault accommodation in a class of nonlinear continuous-time systems using a new fault estimation module, based on an adaptive estimator, to compensate for the effect of the faults by stabilizing the closed-loop system.
Abstract: This note investigates process fault accommodation in a class of nonlinear continuous-time systems. A new fault estimation module, based on an adaptive estimator, is first proposed. The fault tolerant controller is constructed to compensate for the effect of the faults by stabilizing the closed-loop system. A flexible joint robotic example is given to illustrate the efficiency of the proposed approach

712 citations


Journal ArticleDOI
01 Nov 2006
TL;DR: This paper presents Grid'5000, a 5000 CPU nation-wide infrastructure for research in Grid computing, designed to provide a scientific tool for computer scientists similar to the large-scale instruments used by physicists, astronomers, and biologists.
Abstract: Large scale distributed systems such as Grids are difficult to study from theoretical models and simulators only. Most Grids deployed at large scale are production platforms that are inappropriate research tools because of their limited reconfiguration, control and monitoring capabilities. In this paper, we present Grid'5000, a 5000 CPU nation-wide infrastructure for research in Grid computing. Grid'5000 is designed to provide a scientific tool for computer scientists similar to the large-scale instruments used by physicists, astronomers, and biologists. We describe the motivations, design considerations, architecture, control, and monitoring infrastructure of this experimental platform. We present configuration examples and performance results for the reconfiguration subsystem.

526 citations


Journal ArticleDOI
TL;DR: It is concluded that the extent to which the chosen mechanism enables incumbents to overcome cognitive and operational impediments influences their capacity to bridge capability gaps.
Abstract: I present a model of capability reconfiguration, integrating the Schumpeterian perspective on technological discontinuities with the dynamic capabilities literature to explain the responses of incumbents to technological change. I identify substitution, evolution, and transformation as three mechanisms of capability reconfiguration and then link the choice of reconfiguration mechanism to the nature of technological change and to the attributes of capabilities. I conclude that the extent to which the chosen mechanism enables incumbents to overcome cognitive and operational impediments influences their capacity to bridge capability gaps.

521 citations


Journal ArticleDOI
TL;DR: An adaptive fault-tolerant flight controller design method is developed based on the online estimation of an eventual fault and the addition of a new control law to the normal control law in order to reduce the fault effect on the system without the need for a fault detection and isolation (FDI) mechanism.
Abstract: This paper deals with the problem of flight tracking control against actuator faults using the linear matrix inequality (LMI) method and adaptive method. An adaptive fault-tolerant flight controller design method is developed based on the online estimation of an eventual fault and the addition of a new control law to the normal control law in order to reduce the fault effect on the system without the need for a fault detection and isolation (FDI) mechanism. In the framework of LMI approach, the normal tracking performance of the resultant closed-loop system is optimized without any conservativeness and the states of fault modes asymptotically track those of the normal mode. A numerical example of an F-16 aircraft model and its simulation results are given

475 citations


Journal ArticleDOI
TL;DR: This paper presents an algorithm for network reconfiguration based on the heuristic rules and fuzzy multiobjective approach for minimizing the number of tie-switch operations.
Abstract: This paper presents an algorithm for network reconfiguration based on the heuristic rules and fuzzy multiobjective approach. Multiple objectives are considered for load balancing among the feeders and also to minimize the real power loss, deviation of nodes voltage, and branch current constraint violation, while subject to a radial network structure in which all loads must be energized. These four objectives are modeled with fuzzy sets to evaluate their imprecise nature and one can provide his or her anticipated value of each objective. Heuristic rules are also incorporated in the algorithm for minimizing the number of tie-switch operations. The effectiveness of the proposed method is demonstrated through an example.

453 citations


Proceedings ArticleDOI
01 Aug 2006
TL;DR: In this article, the authors describe architectural enhancements to Xilinx FPGAs that provide better support for the creation of dynamically reconfigurable designs, augmented by a new design methodology that uses pre-routed IP cores for communication between static and dynamic modules and permits static designs to route through regions otherwise reserved for dynamic modules.
Abstract: The paper describes architectural enhancements to Xilinx FPGAs that provide better support for the creation of dynamically reconfigurable designs. These are augmented by a new design methodology that uses pre-routed IP cores for communication between static and dynamic modules and permits static designs to route through regions otherwise reserved for dynamic modules. A new CAD tool flow to automate the methodology is also presented. The new tools initially target the Virtex-II, Virtex-II Pro and Virtex-4 families and are derived from Xilinx's commercial CAD tools

308 citations


Journal ArticleDOI
Samina Karim1
TL;DR: The findings are that acquired and internally developed units serve different roles in the process of change, and that firms perceive reconfiguration to be beneficial.
Abstract: This paper explores changes in organizational structure and distinguishes between units' origins. Unit reconfiguration is the addition of units to, deletion of units from, and recombination of units within the firm. This study compares the reconfiguration of internally developed vs. acquired units, explores what forms of unit recombination are common, and observes whether firms pursue recombination before divestiture. Theoretical support is drawn from the dynamic capabilities perspective, research on modular organizational systems, and strategy–structure literature. The findings are that acquired and internally developed units serve different roles in the process of change, and that firms perceive reconfiguration to be beneficial. Copyright © 2006 John Wiley & Sons, Ltd.

285 citations


Proceedings ArticleDOI
09 Aug 2006
TL;DR: This paper shows how problems related to the lack of support for dynamic reconfigurations of hierarchical architectures can be addressed and presents an advanced component system SOFA 2.0 as a proof of the concept.
Abstract: Component-based software engineering is a powerful paradigm for building large applications. However, our experience with building application of components is that the existing advanced component models (such as those offering component nesting, behavior specification and checking, dynamic reconfiguration to some extent, etc.) are subject to a lot of limitations and issues which prevent them from being accepted more widely (by industry in particular). We claim that these issues are specifically related to (a) the lack of support for dynamic reconfigurations of hierarchical architectures, (b) poor support for modeling and extendibility of the control part of a component, and (c) the lack of support for different communication styles applied in inter-component communication. In this paper, we show how these problems can be addressed and present an advanced component system SOFA 2.0 as a proof of the concept. This system is based on its predecessor SOFA, but it incorporates a number of enhancements and improvements.

260 citations


Proceedings ArticleDOI
23 Apr 2006
TL;DR: This work proposes heuristic methods for constructing different flavors of reconfiguration policies to mimic and approximate the optimal ones, and provides theoretical evidence for the advantage of overlay network due to its configurability.
Abstract: The routing infrastructure of the Internet has become resistant to fundamental changes and the use of overlay networks has been proposed to provide additional flexibility and control. One of the most prominent configurable components of an overlay network is its topology, which can be dynamically reconfigured to accommodate communication requirements that vary over time. In this paper, we study the problem of determining dynamic topology reconfiguration for service overlay networks with dynamic communication requirement, and the ideal goal is to find the optimal reconfiguration policies that can minimize the potential overall cost of using an overlay. We start by observing the properties of the optimal reconfiguration policies through studies on small systems and find structures in the optimal reconfiguration policies. Based on these observations, we propose heuristic methods for constructing different flavors of reconfiguration policies, i.e., never-change policy, always-change policy and cluster-based policies, to mimic and approximate the optimal ones. Our experiments show that our policy construction methods are applicable to large systems and generate policies with good performance. Our work does not only provide solutions to practical overlay topology design problems, but also provides theoretical evidence for the advantage of overlay network due to its configurability.

255 citations


Journal ArticleDOI
TL;DR: This research reduces the searching space when a new codification strategy and novel genetic operators, called accentuated crossover and directed mutation, are used, allowing a drastic reduction of the computational time and minimizes the memory requirements, ensuring a efficiency search when compared to current GA reconfiguration techniques.
Abstract: This paper proposes and evaluates a method that improves the adaptability and efficiency of genetic algorithms (GAs) when applied to the minimal loss reconfiguration problem. This research reduces the searching space (population) when a new codification strategy and novel genetic operators, called accentuated crossover and directed mutation, are used. This allows a drastic reduction of the computational time and minimizes the memory requirements, ensuring a efficiency search when compared to current GA reconfiguration techniques. The reduced population is created through the branches that form "system loops." This means that almost all individuals created for the GA are feasible (radial networks) generating topologies that can only be limited by the system's operational constraints. The results of the proposed reconfiguration method are compared with other techniques, yielding smaller or equal power loss values with less computational efforts.

Proceedings ArticleDOI
27 Feb 2006
TL;DR: Designs are attainable that can tolerate a larger number of defects with less overhead than naive triple-modular redundancy, using domain-specific techniques such as end-to-end error detection, resource sparing, automatic circuit decomposition, and iterative diagnosis and reconfiguration.
Abstract: As silicon technologies move into the nanometer regime, transistor reliability is expected to wane as devices become subject to extreme process variation, particle-induced transient errors, and transistor wear-out. Unless these challenges are addressed, computer vendors can expect low yields and short mean-times-to-failure. In this paper, we examine the challenges of designing complex computing systems in the presence of transient and permanent faults. We select one small aspect of a typical chip multiprocessor (CMP) system to study in detail, a single CMP router switch. To start, we develop a unified model of faults, based on the time-tested bathtub curve. Using this convenient abstraction, we analyze the reliability versus area tradeoff across a wide spectrum of CMP switch designs, ranging from unprotected designs to fully protected designs with online repair and recovery capabilities. Protection is considered at multiple levels from the entire system down through arbitrary partitions of the design. To better understand the impact of these faults, we evaluate our CMP switch designs using circuit-level timing on detailed physical layouts. Our experimental results are quite illuminating. We find that designs are attainable that can tolerate a larger number of defects with less overhead than naive triple-modular redundancy, using domain-specific techniques such as end-to-end error detection, resource sparing, automatic circuit decomposition, and iterative diagnosis and reconfiguration.

Journal ArticleDOI
TL;DR: In this paper, a new approach for distribution system reconfiguration based on optimum power flow (OPF) in which the branch statuses (open/close) are represented by continuous functions is presented.
Abstract: This paper presents a new approach for distribution system reconfiguration (DSR) based on optimum power flow (OPF) in which the branch statuses (open/close) are represented by continuous functions. In the proposed approach, all branches are initially considered closed, and from the OPF results, a heuristic technique is used to determine the next loop to be broken by opening one switch. Then the list of switches that are candidates to be opened is updated, and the above process is repeated until all loops are broken, making the distribution system radial. This paper includes results and comparisons on test systems utilized in three classical papers published in the technical literature, as well as in a previous paper by the authors. Results obtained on a real large-scale distribution system are also presented

Patent
16 Aug 2006
TL;DR: In this paper, the authors proposed a method and apparatus for reconfiguring a MAC entity of a MAC layer of the apparatus receiving protocol data units from a mobile terminal via on uplink upon reconfiguration of the uplink channel.
Abstract: The invention relates to method and apparatus for reconfiguring a MAC entity of a MAC layer of the apparatus receiving protocol data units from a mobile terminal via on uplink upon reconfiguration of the uplink channel. Further, the invention relates to methods and mobile terminals for triggering the transmission of a status report from an RLC entity configured for an uplink channel of a network element in a radio access network, as well as a method and terminal for configuring the MAC layer of the mobile terminal. In order to enable an efficient and fast generation of RLC status reports after an uplink channel reconfiguration the invention suggests new mechanisms to trigger the transmission of status reports upon uplink reconfiguration as well a new operation and configuration of radio access network elements and UEs upon uplink channel reconfiguration, in particular a transmission time interval (TTI) reconfiguration.

Journal ArticleDOI
TL;DR: It is observed that the network losses are reduced when the voltage stability is enhanced by the network reconfiguration, and the fuzzy genetic algorithm uses a suitable coding and decoding scheme for maintaining the radial nature of the network at every stage of genetic evolution.

Journal ArticleDOI
TL;DR: In this paper, the problem of finding the optimal topological configuration of a power transmission system is considered with the aim of providing system operators with a tool suited for congestion management, and the solution of the resulting large-scale mixed-integer programming problem is carried out both by a deterministic branch-and-bound algorithm included in the CPLEX optimization package and by a genetic algorithm.

Journal ArticleDOI
02 May 2006
TL;DR: In this paper, the authors compare and contrast two methods for implementing modular reconfiguration in Virtex FPGAs, one of which offers simplicity and fast reconfigure times, but limits the geometry and connectivity of the system.
Abstract: Modular systems implemented on field-programmable gate arrays (FPGAs) can benefit from being able to load and unload modules at run-time, a concept that is of much interest in the research community. Although dynamic partial reconfiguration is possible in Virtex and Spartan series FPGAs, the configuration architecture of these devices is not amenable to modular reconfiguration, a limitation which has relegated research to theoretical or compromised resource allocation models. Two methods for implementing modular reconfiguration in Virtex FPGAs are compared and contrasted. The first method offers simplicity and fast reconfiguration times, but limits the geometry and connectivity of the system. The second method, developed recently, enables modules to be allocated arbitrary areas of the FPGA, bridging the gap between theory and reality and unlocking the latent potential of dynamic reconfiguration. The cost of this advancement is increased reconfiguration time. The second method has been demonstrated in three applications, including the first reported implementation of modular reconfiguration in a Virtex-4 device.

Proceedings ArticleDOI
25 Apr 2006
TL;DR: A new deterministic routing methodology for tori and meshes, which achieves high performance without the use of virtual channels, and is topology agnostic in nature, meaning it can handle any topology derived from any combination of faults when combined with static reconfiguration.
Abstract: Computers get faster every year, but the demand for computing resources seems to grow at an even faster rate. Depending on the problem domain, this demand for more power can be satisfied by either, massively parallel computers, or clusters of computers. Common for both approaches is the dependence on high performance interconnect networks such as Myrinet, Infiniband, or 10 Gigabit Ethernet. While high throughput and low latency are key features of interconnection networks, the issue of fault-tolerance is now becoming increasingly important. As the number of network components grows so does the probability for failure, thus it becomes important to also consider the fault-tolerance mechanism of interconnection networks. The main challenge then lies in combining performance and fault-tolerance, while still keeping cost and complexity low. This paper proposes a new deterministic routing methodology for tori and meshes, which achieves high performance without the use of virtual channels. Furthermore, it is topology agnostic in nature, meaning it can handle any topology derived from any combination of faults when combined with static reconfiguration. The algorithm, referred to as segment-based routing (SR), works by partitioning a topology into subnets, and subnets into segments. This allows us to place bidirectional turn restrictions locally within a segment. As segments are independent, we gain the freedom to place turn restrictions within a segment independently from other segments. This results in a larger degree of freedom when placing turn restrictions compared to other routing strategies. In this paper a way to compute segment-based routing tables is presented and applied to meshes and tori. Evaluation results show that SR increases performance by a factor of 1.8 over FX and up*/down* routing.

Book ChapterDOI
13 Feb 2006
TL;DR: FlexCup as mentioned in this paper is a flexible code update mechanism that minimizes the energy consumed on each sensor node for the installation of arbitrary code changes, which can support flexible reconfiguration and adaptation of the sensor nodes but should also operate in an energy and time efficient manner.
Abstract: The ability to update the program code installed on wireless sensor nodes plays an import role in the highly dynamic environments sensor networks are often deployed in. Such code update mechanisms should support flexible reconfiguration and adaptation of the sensor nodes but should also operate in an energy and time efficient manner. In this paper, we present FlexCup, a flexible code update mechanism that minimizes the energy consumed on each sensor node for the installation of arbitrary code changes. We describe two different versions of FlexCup and show, using a precise hardware emulator, that our mechanism is able to perform updates up to 8 times faster than related code update algorithms found in the literature, while consuming only an eighth of the energy.

Journal ArticleDOI
TL;DR: This paper shows that this reconfiguration problem is equivalent to a disturbance decoupling problem which is solved by means of the geometric approach and generates suitable inputs for the faulty plant based on the output of the nominal controller.
Abstract: This paper addresses the control of a system after an actuator has failed: A reconfiguration of the control structure is sought which keeps the system operational. The goal is to find a different set of actuators for controlling the plant and to use them in such a way that the plant output is identical to the output of the nominal closed-loop system. It is further required that the nominal controller remains part of the reconfigured control loop. This paper shows that this reconfiguration problem is equivalent to a disturbance decoupling problem which is solved by means of the geometric approach. The resulting solution is a reconfiguration block, which generates suitable inputs for the faulty plant based on the output of the nominal controller. The feasibility of this approach is demonstrated by a physical experiment with a helicopter model

Journal ArticleDOI
TL;DR: The proposed methodology was employed for solving two electrical systems and presented good results, and can be employed for large-scale systems in real-time environment.
Abstract: One objective of the feeder reconfiguration problem in distribution systems is to minimize the power losses for a specific load. For this problem, mathematical modeling is a nonlinear mixed integer problem that is generally hard to solve. This paper proposes an algorithm based on artificial neural network theory. In this context, clustering techniques to determine the best training set for a single neural network with generalization ability are also presented. The proposed methodology was employed for solving two electrical systems and presented good results. Moreover, the methodology can be employed for large-scale systems in real-time environment.

Journal ArticleDOI
TL;DR: The paper presents an algorithm for network reconfiguration based on fuzzy multi-objective approach for load balancing among the feeders, minimum deviation of the nodes voltage, minimize the power loss and branch current constraint violation, while subject to a radial network structure.

Proceedings ArticleDOI
10 Nov 2006
TL;DR: The modular architecture of REDS (REconfigurable Dispatching System) is illustrated, which enables programmers to change the internal configuration of the middleware to suit the deployment scenario, focusing on the aspects concerned with the dynamic reconfiguration of the dispatching network.
Abstract: We present a new publish-subscribe middleware called REDS (REconfigurable Dispatching System) designed to tolerate dynamic reconfigurations of the dispatching infrastructure, like those occurring in scenarios characterized by fluid topologies as in mobile and peer-to-peer networks. We illustrate the modular architecture of REDS, which enables programmers to change the internal configuration of the middleware to suit the deployment scenario, focusing on the aspects concerned with the dynamic reconfiguration of the dispatching network.

Proceedings ArticleDOI
21 Aug 2006
TL;DR: A feature-oriented approach to develop dynamically reconfigurable core assets is proposed, which takes feature binding analysis results as a key design driver for identifying and managing variation points of dynamically reconfigured products.
Abstract: Dynamic product reconfiguration refers to making changes to a deployed product configuration while a system is running. Recently, there have been increasing demands for dynamic product reconfiguration in various application areas (e.g., ubiquitous computing, self-healing systems, etc.); however, most product line engineering methods in the literature have focused on the development of reusable core assets for statically configured products. In this paper, we propose a feature-oriented approach to develop dynamically reconfigurable core assets. This approach takes feature binding analysis results as a key design driver for identifying and managing variation points of dynamically reconfigurable products. We also provide a conceptual model for a reconfigurator, which monitors and manages product reconfiguration at run time. The method is illustrated with a home service robot product line example.

Journal ArticleDOI
TL;DR: A novel fault-tolerant control system design technique has been proposed in this paper, which blends the multiple-model principle with the unavoidable performance degradation due to faults in actuators, sensors or system dynamics.
Abstract: A novel fault-tolerant control system design technique has been proposed in this paper, which blends the multiple-model principle with the unavoidable performance degradation due to faults in actuators, sensors or system dynamics The number of models employed depends on the characteristics of the system, the nature of the failures considered, and the physical limits of system variables The achievable performance under various component failures are represented in the form of reference models, known as performance reduced reference models These models are used to synthesize a set of controllers Under a specific fault condition, proper controller and revised control system command input are selected automatically to achieve desired performance A simulation example of an aircraft subject to different type of failures has been used to illustrate the design process and to demonstrate the effectiveness of the method

Journal ArticleDOI
TL;DR: In this article, a case study of the transition from traditional factories to mass production in America (1850-1930) is presented, showing that mass production was the last step in a much longer reconfiguration process involving cumulative changes in machine tools, building materials, materials handling technologies, power generation, and power distribution technologies.

Journal ArticleDOI
TL;DR: In this article, the causal properties of bond graphs not only allow validating the model, but also provide the computational algorithms to eliminate the unknown variables from coupled thermo-fluid models and thus generate analytical redundancy relations (ARR) in terms of measurements and parameters.

Proceedings ArticleDOI
24 Jan 2006
TL;DR: This work presents a method to efficiently map the applications on to the NoC architecture, satisfying the design constraints of each individual use-case, and explores the possibility of integrating dynamic voltage and frequency scaling (DVS/DFS) techniques with the use- case centric NoC design methodology.
Abstract: To provide a scalable communication infrastructure for systems on chips (SoCs), networks on chips (NoCs), a communication centric design paradigm is needed. To be cost effective, SoCs are often programmable and integrate several different applications or use-cases on to the same chip. For the SoC platform to support the different use-cases, the NoC architecture should satisfy the performance constraints of each individual use-case. In this work we motivate the need to consider multiple use-cases during the NoC design process. We present a method to efficiently map the applications on to the NoC architecture, satisfying the design constraints of each individual use-case. We also present novel ways to dynamically reconfigure the network across the different use-cases and explore the possibility of integrating dynamic voltage and frequency scaling (DVS/DFS) techniques with the use-case centric NoC design methodology. We validate the performance of the design methodology on several SoC applications. The dynamic reconfiguration of the NoC integrated with DVS/DFS schemes results in large power savings for the resulting NoC systems.

Journal ArticleDOI
TL;DR: This paper presents an approach to the control problem where the desired configuration is grown from an initial seed module and finds that the self-reconfiguration process always converges and the time to complete a configuration scales approximately linearly with the number of modules.

Journal ArticleDOI
TL;DR: In this article, the authors address the modeling of SOA architectures by refining business-oriented architectures, which abstract from technology aspects, into service-oriented ones, focusing on the ability of dynamic reconfiguration (binding to new services at run-time) typical for SOA.
Abstract: Service-oriented architectures (SOA) provide a flexible and dynamic platform for implementing business solutions In this paper, we address the modeling of such architectures by refining business-oriented architectures, which abstract from technology aspects, into service-oriented ones, focusing on the ability of dynamic reconfiguration (binding to new services at run-time) typical for SOA The refinement is based on conceptual models of the platforms involved as architectural styles, formalized by graph transformation systems Based on a refinement relation between abstract and platform-specific styles we investigate how to realize business-specific scenarios on the SOA platform by automatically deriving refined, SOA-specific reconfiguration scenarios