Showing papers on "Emulation published in 2003"

NIST Net: a Linux-based network emulation tool

Abstract: Testing of network protocols and distributed applications has become increasingly complex, as the diversity of networks and underlying technologies increase, and the adaptive behavior of applications becomes more sophisticated. In this paper, we present NIST Net, a tool to facilitate testing and experimentation with network code through emulation. NIST Net enables experimenters to model and effect arbitrary performance dynamics (packet delay, jitter, bandwidth limitations, congestion, packet loss and duplication) on live IP packets passing through a commodity Linux-based PC router. We describe the emulation capabilities of NIST Net; examine its architecture; and discuss some of the implementation challenges encountered in building such a tool to operate at very high network data rates while imposing minimal processing overhead. Calibration results are provided to quantify the fidelity and performance of NIST Net over a wide range of offered loads (up to 1 Gbps), and a diverse set of emulated performance dynamics.

A Remote Code Update Mechanism for Wireless Sensor Networks

Abstract: : Wireless sensor networks consist of collections of small, low-power nodes that interface or interact with the physical environment. The ability to add new functionality or perform software maintenance without having to physically reach each individual node is already an essential service, even at the limited scale at which current sensor networks are deployed. TinyOS supports single-hop over-the-air reprogramming today, but the need to reprogram sensors in a multi-hop network will become particularly critical as sensor networks mature and move toward larger deployment sizes. In this paper we present Multihop Over-the-Air Programming (MOAP), a code distribution mechanism specifically targeted for Mica-2 Motes. We discuss and analyze the design goals, constraints, choices and optimizations focusing in particular on dissemination strategies and retransmission policies. We have implemented MOAP on Mica-2 motes and we evaluate that implementation using both emulation and testbed experiments. We show that our dissemination mechanism obtains a 60-90% performance improvement in terms of required transmissions compared to flooding. We also show that a very simple windowed retransmission tracking scheme is nearly as effective as arbitrary repairs and yet is much better suited to energy and memory constrained embedded systems.

A solver for the network testbed mapping problem

Abstract: Network experiments of many types, especially emulation, require the ability to map virtual resources requested by an experimenter onto available physical resources. These resources include hosts, routers, switches, and the links that connect them. Experimenter requests, such as nodes with special hardware or software, must be satisfied, and bottleneck links and other scarce resources in the physical topology should be conserved when physical resources are shared. In the face of these constraints, this mapping becomes an NP-hard problem. Yet, in order to prevent mapping time from becoming a serious hindrance to experimentation, this process cannot consume an excessive amount of time.In this paper, we explore this problem, which we call the network testbed mapping problem.We describe the interesting challenges that characterize it, and explore its applications to emulation and other spaces, such as distributed simulation. We present the design, implementation, and evaluation of a solver for this problem, which is in production use on the Netbed shared network testbed. Our solver builds on simulated annealing to find very good solutions in a few seconds for our historical workload, and scales gracefully on large well-connected synthetic topologies.

SystemC cosimulation and emulation of multiprocessor SoC designs

Abstract: SystemC is an open source C/C++ simulation environment that provides several class packages for specifying hardware blocks and communication channels. The design environment specifies software algorithmically as a set of functions embedded in abstract modules that communicate with one another and with hardware components via abstract communication channels. It enables transparent integration of instruction-set simulators and prototyping boards. The authors describe a simulation environment that targets heterogeneous multiprocessor systems. They are currently working to extend their methodology to more complex on-chip architectures.

EMPOWER: a network emulator for wireline and wireless networks

Abstract: The increasing need of protocol development environments and network performance evaluation tools gives rise to the research of flexible, scalable, and accurate network emulators. The desired network emulator should be able to facilitate the emulation of either wireline or wireless networks. In the case when network topology is critical to the underlying network protocol, the emulator should provide specific mechanisms to emulate network topology. In this paper, we present a distributed network emulation system EMPOWER, which not only can fulfill those requirements, but also can generate user-defined network conditions and traffic dynamics at packet level. EMPOWER is highly scalable in that each emulator node could be configured to emulate multiple network nodes. Some significant research issues such as topology mapping scheme and scalability of the emulator are discussed and addressed. Preliminary emulation results show that EMPOWER is capable of assisting the study of both wireless and wireline network protocols and applications.

Emulator-enabled network connectivity to a device

Abstract: An emulator (200) is capable of connecting to an information interface (204) that can communicate information from an information source (110) to an information sink (112) in a format native to the information sink. The emulator comprises an emulation controller (210) capable of coupling to the information interface, a network controller (212) coupled to the emulation controller and capable of coupling to an external network, and a storage (216, 218). The storage holds an instruction sequence executable on the emulation controller. The instruction sequence comprises a code for receiving network information from the external network and a code capable of converting the network information to the native format for transfer to the information sink.

Winning the SoC revolution : experiences in real design

Abstract: 1. The History of the SoC Revolution.- 2. SoC Design Methodologies.- 3. Non-Technical Issues In SoC Design.- 4. The Philips Nexperia Digital Video Platform.- 5. The Tiomap& (TM) Platform Approach To Soc.- 6. Soc &- The Ibm Microelectronics Approach.- 7. Platform Fpgas.- 8. Sopc Builder: Performance By Design.- 9. Star-Ip Centric Platforms For Soc.- 10. Real-Time System-On-A-Chip Emulation.- 11. Technology Challenges For Soc Design.

Method and system for deterministic control of an emulation

Abstract: An emulation-based event-wait simulator including an application module to configure and command verification processes on a design under test (DUT) An event dispatcher is in communication with the application module to deliver commands to the DUT A plurality of transactors are in communication with the event dispatcher to forward the commands to the DUT A channel controller is in communication with the transactors to process and forward the commands to the DUT, wherein the channel controller also receives messages from the DUT, processes the messages, and forwards the messages to the transactors for delivery to the event dispatcher and the application module

Lowering the barrier to wireless and mobile experimentation

Abstract: The success of ns highlights the importance of an infrastructure that enables efficient experimentation. Similarly, Netbed's automatic configuration and control of emulated and live network environments minimizes the effort spent configuring and running experiments. Learning from the evolution of these systems, in this paper we argue that a live wireless and mobile experimental facility focusing on ease of use and accessibility will not only greatly lower the barrier to research in these areas, but that the primary technical challenges can be overcome.The flexibility of Netbed's common abstractions for diverse node and link types has enabled its development from strictly an emulation platform to one that integrates simulation and live network experimentation. It can be further extended to incorporate wireless and mobile devices. To reduce the tedium of wireless and mobile experimentation, we propose automatically allocating and mapping a subset of a dense mesh of devices to match a specified network topology. To achieve low-overhead, coarse repeatability for mobile experiments, we outline how to leverage the predictability of passive couriers, such as PDA-equipped students and PC-equipped busses.

A meta-model and framework for user mobility in mobile networks

Abstract: Mobility patterns play an important role for performance evaluations of mobile networks To simulate user movement, existing simulation tools provide only a few simple mobility models (eg, random movement) suitable for particular scenarios To evaluate a new scenario, an appropriate model needs to be created, but this requires extra work that distracts the researcher from his/her main task In general, three key elements determine the mobility of users: the spatial environment, the user trip sequences, and the user movement dynamics (eg, speed) In this paper, we introduce a meta-model that integrates these three elements in an easy-to-use framework, allowing a flexible modeling of user mobility in custom scenarios The framework is available for download as a stand-alone trace generator and may be used together with any simulation or emulation tool for mobile networks to evaluate a specific scenario

Design of High Speed AWGN Communication Channel Emulator

Abstract: This paper presents a method for designing a high accuracy white gaussian noise generator suitable for communication channel emulation. The proposed solution is based on the combined use of the Box-Muller method and the central limit theorem. The resulting architecture provides a high accuracy AWGN with a low complexity architecture for a digital implementation in FPGA. The performance is studied by means of MATLAB simulations and various complexity figures are given.

Definition of software fault emulation operators: a field data study

Abstract: This paper proposes a set of operators for software fault emulation through low-level code mutations. The definition of these operators was based on the analysis of an extensive collection of real software faults. Using the Orthogonal Defect Classification as a starting point, faults were classified in a detailed manner according to the high-level constructs where the faults reside and their effects in the program. We observed that a large percentage of faults fall in well-defined classes and can be characterized in a very precise way, allowing accurate emulation through a small set of mutation operators. The resulting operators closely emulate a broad range of common programmer mistakes. Furthermore, as the mutation is performed directly at the executable code, software faults can be injected in targets for which source code is not available.

Clustered processors in an emulation engine

Abstract: Clusters of processors are interconnected as an emulation engine such that processors share input and data stacks, and the setup and storing of results are done in parallel, but the output of one evaluation unit is connected to the input of the next evaluation unit. A set of ‘cascade’ connections provides access to the intermediate values. By tapping intermediate values from one processor, and feeding them to the next, a significant emulation speedup is achieved.

Emulation of a fixed point operation using a corresponding floating point operation

Abstract: A computer is programmed to emulate a fixed-point operation that is normally performed on fixed-point operands, by use of a floating-point operation that is normally performed on floating-point operands. Several embodiments of the just-described computer emulate a fixed-point operation by: expanding at least one fixed-point operand into a floating-point representation (also called “floating-point equivalent”), performing, on the floating-point equivalent, a floating-point operation that corresponds to the fixed-point operation, and reducing a floating-point result into a fixed-point result. The just-described fixed-point result may have the same representation as the fixed-point operand(s) and/or any user-specified fixed-point representation, depending on the embodiment. Also depending on the embodiment, the operands and the result may be either real or complex, and may be either scalar or vector. The above-described emulation may be performed either with an interpreter or with a compiler, depending on the embodiment. A conventional interpreter for an object-oriented language (such as MATLAB version 6) may be extended with a toolbox to perform the emulation. Use of type propagation and operator overloading minimizes the number of changes that a user must make to their program, in order to be able to use such emulation.

Rapid design and analysis of communication systems using the BEE hardware emulation environment

Abstract: This paper describes the early analysis and estimation features currently implemented in the Berkeley Emulation Engine (BEE) system. BEE is an integrated rapid prototyping and design environment for communication and digital signal processing (DSP) systems, consisting of four multi-FPGA based processing units, each capable of emulating 10 million ASIC (application specific integrated circuits) equivalent gates at an overall system clock rate up to 60 MHz. This translates to over 600 billion 16 bit additions (operations) per second on one unit. An integrated software design flow enables the users to specify the design using a data-flow diagram, then automatically generates both the FPGA implementation for real-time rapid prototyping and a cycle-accurate, bit-true, and functionally equivalent ASIC implementation. For system-level design, the BEE hardware and software support rapid design turn-around and early performance analysis, without full synthesis or hardware mapping, from the high-level design entry. A case study detailing a turbo-decoder explains how the processing capability of the emulator can be utilized to verify a design using one billion input vectors with a speed-up factor exceeding 106 over equivalent software simulation methods.

Toward scaling network emulation using topology partitioning

Abstract: Scalability is the primary challenge to studying large complex network systems with network emulation. This paper studies topology partitioning, assigning disjoint pieces of the network topology across processors, as a technique to increase emulation capacity with increasing hardware resources. We develop methods to create partitions based on expected communication across the topology. Our evaluation methodology quantifies the communication overhead or efficiency of the resulting partitions. We implement and contrast three partitioning strategies in ModelNet, a large-scale network emulator, using different topologies and uniform communication patterns. Results show that standard graph partitioning algorithms can double the efficiency of the emulation for Internet-like topologies relative to random partitioning.

Implementation of BEE: a real-time large-scale hardware emulation engine

Abstract: This paper describes the hardware implementation of a real-time, large-scale, multi-chip FPGA (Field Programmable Gate Array) based emulation engine with a capacity of 10 million ASIC (Application Specific Integrated Circuits) equivalent gates. Attainable system operation frequency can exceed 60 MHz, and the system throughput has been empirically verified to achieve 600 billion 16-bit additions per second. The emulator is custom designed to maximize the performance and resource utilization for a range of telecommunication and digital signal processing applications. With its high-speed interconnect architecture and large external I/O bandwidth, the emulator excels in prototyping real-time systems that have strict timing, logic capacity, and data rate requirements. Our development efforts are guided by such ongoing projects as ultra-wide band (UWB) and multi-channel-multi-antenna (MCMA) radio systems research.

Traffic-based Load Balance for Scalable Network Emulation

Abstract: Load balance is critical to achieving scalability for large network emulation studies, which are of compelling interest for emerging Grid, Peer to Peer, and other distributed applications and middleware. Achieving load balance in emulation is difficult because of irregular network structure and unpredictable network traffic. We formulate load balance as a graph partitioning problem and apply classical graph partitioning algorithms to it. The primary challenge in this approach is how to extract useful information from the network emulation and present it to the graph partitioning algorithms in a way that reflects the load balance requirement in the original emulation problem. Using a large-scale network emulation system called MaSSF, we explore three approaches for partitioning, based on purely static topology information (TOP), combining topology and application placement information (PLACE), and combining topology and application profile data (PROFILE). These studies show that exploiting static topology and application placement information can achieve reasonable load balance, but a profile-based approach further improves load balance for even large scale network emulation. In our experiments, PROFILE improves load balance by 50% to 66% and emulation time is reduced up to 50% compared to purely static topology-based approaches.

Methods and systems for preventing start code emulation at locations that include non-byte aligned and/or bit-shifted positions

Abstract: Methods and systems provide approaches to start code emulation prevention at a granularity higher than the bit level. In various embodiments, start code emulation prevention can occur at locations other than data boundaries such as byte boundaries and the like. These embodiments can be used in connection with systems that do not always preserve data alignment boundaries in the data that is processed. In some systems, the described techniques can provide a basis from which decoder systems can recover in the event that data boundaries are lost.

Data storage system emulation

Abstract: A technique for emulation of a data storage system. The invention allows the level of services to be provided by a data storage system to be specified in terms of the level of services provided by another storage system. In one aspect, a performance characterization of a data storage device to be emulated is obtained (e.g., by experimental techniques). A specification of a workload is also obtained that includes a specification of a plurality of data stores for the workload. The data stores are assigned to an emulation data storage device according to the performance characterization and according to the specification of the workload such that sufficient resources of the emulation data storage device are allocated to the workload to meet the performance characterization of the data storage device to be emulated. The emulation data storage device is then operated under the workload. Quality-of-service (QoS) control may be performed so as to provide a degree of performance isolation among the workloads.

vBET: a VM-based emulation testbed

Abstract: With the increasing requirement of robustness and predictability for network protocols and distributed systems, it becomes necessary to develop realistic, customizable, and scalable emulation testbeds for the testing and evaluation of network and distributed protocols. A number of recently proposed emulation testbeds have clearly demonstrated the advantage and promise of this approach. Meanwhile, more efforts are necessary to achieve higher degree of flexibility and customizability, especially for the creation of arbitrary network topology and for the customization of network-level entities.In this paper, we present vBET, an efficient and flexible emulation testbed using the virtual machine technology. Based on Linux, vBET can be installed in a high-end desktop or a commodity server and is therefore easily deployable in a research lab. vBET creates a virtual distributed environment with both network infrastructure and end systems. Each entity, such as a router, switch, firewall, or application-level proxy, is emulated by a virtual machine running unmodified system or application software. The entities emulated by vBET are user-configurable. Furthermore, the same (physical) vBET server can be easily setup as testbed for different experiments, such as Internet routing, distributed firewalls, and peer-to-peer networks.We describe the design, implementation, and application of vBET. For the design and implementation, we present key enabling techniques including virtual OS, virtual networking, and small-footprint file system. For the application of vBET, we demonstrate the creation of different experimental environments using vBET, including OSPF routing, distributed firewall, and Chord peer-to-peer network. These experiments reflect the versatility, customizability, and efficiency of vBET.

A low-cost, IP-based mobile network emulator (MNE)

Abstract: The Naval Research Laboratory (NRL) mobile network emulator (MNE) is a low-cost, flexible wireless mobile internetwork protocol (IP) test environment that provides flexible, dynamic topology control and manipulation for testing of both IPv4 and IPv6 dynamic network scenarios, direct and indirect software support for network node motion modeling is supported. The emulation design and various software and hardware support components are described. A case example of how the mobile emulation system has been applied is also provided with a set of ancillary visualization tools, motion generators, and network analysis tools. Finally, it is discussed how such an emulation environment provides a valuable engineering tool supplementing more abstract simulation studies and costly, time-consuming field trials of mobile network systems and software.

Automatic price display control by emulation of electronic cash register price lookup

Abstract: A system and method for distribution of product price and/or sales data in a retail establishment. Product price and/or sales data is stored locally, either in a central computer or master electronic cash register (ECR) or remotely at a master computer. The product price data is stored in the form of a price look-up (PLU) table. The price data can be pushed from the master ECR, local or master computers to and ECR emulation hub to an ECR emulation hub. Similarly, the ECR emulation hub can request product price data from the master ECR, local or master computers. Once the product price data arrives at the ECR emulation hub, it can be processed and sent to a display, which will be located near the appropriate product. The ECR emulation hub can also record and/or transmit prices actually charged for products over time to allow for automatic auditing of promotional pricing offers such as those made by manufacturers of the product. The ECR emulation hub acts like an ECR, thereby requiring no special software or hardware modifications to existing pricing display systems that already support ECRs.

Methods and systems for start code emulation prevention and data stuffing

Abstract: Methods and systems provide approaches to start code emulation prevention at a granularity higher than the bit level. By operating at a level other than the bit level, processing capability requirements on both the encoder and decoder side can be reduced. In accordance with one or more embodiments, a start code emulation prevention method looks for data patterns relative to fixed-size data portions larger than single bits. When a particular pattern is found, start code emulation prevention data is inserted to prevent start code emulation. The inserted data is larger than a single bit and, in some embodiments, comprises a byte. When a decoder decodes data that has had start code emulation prevention data inserted, it can easily identify legitimate start codes and then can remove the start code emulation prevention data to provide the original data that was protected. In addition, a data stuffing method is described which allows payload data to be rounded up in size to an integer number of byte sizes, and then allows filler data to be added in a manner which is easily detectable by a decoder.

A hybrid fault injection approach based on simulation and emulation co-operation

Abstract: This paper presents a new fault injection approach, which is based on a co-operation between a simulator and an emulator. This hybrid approach utilizes the advantages of both simulation-based fault injection as well as physical fault injection to provide a good controllability, observability and also a high speed in the fault injection experiments. To do this, parts of a circuit are simulated while the rest parts of the circuit are emulated. A fault injection tool called FITSEC (Fault Injection Tool based on Simulation and Emulation Cooperation) is developed, which supports the entire process of a system design. This is based on both Verilog and VHDL languages and can be used to inject faults at different levels of abstraction. The experimental results show that this approach can significantly reduce the time needed for executing fault injection campaigns.

Eeprom emulation in flash memory

Abstract: An efficient emulation of EEPROM employing flash memory employs a fixed location for an address pointer in flash memory and such that an erase operation is required only once every nth update where n is the number of bits at the fixed location, thus avoiding the need to erase the sector on every update and avoiding delays associated with linked lists for determining the address of the most up-to-date information. Use of bit shifting provides fast determination of the desired address.

Application of Control Charts for Detecting Faults in Variable-Air-Volume Boxes

Abstract: This paper describes a fault detection method developed for application to variable-air-volume (VAV) boxes. VPACC (VAV Box Performance Assessment Control Charts) is a fault detection tool that uses a small number of control charts to assess the performance of VAV boxes. The underlying approach, while developed for a specific type of equipment and control sequence, is general in nature and can be adapted to other types of VAV boxes. VPACC has been tested using emulation, laboratory, and field data sets. The results are encouraging. VPACC successfully detected each of the faults introduced in the emulation and laboratory testing and also detected two faults that were not intentionally implemented. In addition, no false alarms were identified in the emulation and laboratory testing. The assessment of VPACC with field data was not as straightforward, however, VPACC alarms for the field data do seem to point to several design and operational issues.

NRL Mobile Network Emulator

Abstract: : There is a flurry of recent scientific activity in the study of future information networking systems, especially in the area of mobile, wireless networking for more autonomous operations. While numerous simulation environments and models have been developed for mobile routing and networking analysis, there is a growing interest in the development of a real-low-cost, flexible wireless mobile internetwork protocol (IP) test environment that provides flexible, dynamic topology control and manipulation. The Naval Research Laboratory (NRL) Mobile Network Emulator (MNE) does this. The test suite also provides direct and indirect support for node motion control and modeling. Along with an overview of our mobile emulator design, we describe developed methods and ancillary tools for mobile network analysis and performance studies. The emulation environment has been implemented with widely available, off-the-shelf commercial hardware within a commercial open source environment; low operating cost and flexibility were primary goals. The tool allows experimenter, developers, and researchers to test actual mobile networking technology and scenarios under more controlled laboratory conditions with low cost and repeatability. In this report, we describe the emulation design and various software and hardware components. We also give simple examples of how the mobile emulation system has been applied with a set of ancillary visualization tools, motion generators, and network analysis tools. Finally, we discuss how this emulation environment can supplement more abstract simulation studies and more expensive and time-consuming field trials of mobile network systems and software.