Showing papers on "Etching (microfabrication) published in 2011"

Metal-Assisted Chemical Etching of Silicon: A Review

Abstract: This article presents an overview of the essential aspects in the fabrication of silicon and some silicon/germanium nanostructures by metal-assisted chemical etching. First, the basic process and mechanism of metal-assisted chemical etching is introduced. Then, the various influences of the noble metal, the etchant, temperature, illumination, and intrinsic properties of the silicon substrate (e.g., orientation, doping type, doping level) are presented. The anisotropic and the isotropic etching behaviors of silicon under various conditions are presented. Template-based metal-assisted chemical etching methods are introduced, including templates based on nanosphere lithography, anodic aluminum oxide masks, interference lithography, and block-copolymer masks. The metal-assisted chemical etching of other semiconductors is also introduced. A brief introduction to the application of Si nanostructures obtained by metal-assisted chemical etching is given, demonstrating the promising potential applications of metal-assisted chemical etching. Finally, some open questions in the understanding of metal-assisted chemical etching are compiled.

Apparatus and methods for cyclical oxidation and etching

Abstract: Apparatus and methods for the manufacture of semiconductor devices suitable for narrow pitch applications and methods of fabrication thereof are described herein. Disclosed are various single chambers configured to form and/or shape a material layer by oxidizing a surface of a material layer to form an oxide layer; removing at least some of the oxide layer by an etching process; and cyclically repeating the oxidizing and removing processes until the material layer is formed to a desired shape. In some embodiments, the material layer may be a floating gate of a semiconductor device.

Porous Silicon in Practice: Preparation, Characterization and Applications

Abstract: Preface FUNDAMENTALS OF POROUS SILICON PREPARATION Introduction Chemical Reactions Governing the Dissolution of Silicon Experimental Set-up and Terminology for Electrochemical Etching of Porous Silicon Electrochemical Reactions in the Silicon System Density, Porosity, and Pore Size Definitions Mechanisms of Electrochemical Dissolution and Pore Formation Resume of the Properties of Crystalline Silicon Choosing, Characterizing, and Preparing a Silicon Wafer PREPARATION OF MICRO-, MESO-, AND MACRO-POROUS SILICON LAYERS Etch Cell: Materials and Construction Power Supply Other Supplies Safety Precautions and Handling of Waste Preparing HF Electrolyte Solutions Cleaning Wafers Prior to Etching Preparation of Microporous Silicon from a p-Type Wafer Preparation of Mesoporous Silicon from a p++-Type Wafer Preparation of Macroporous, Luminescent Porous Silicon from an n-Type Wafer (Frontside Illumination) Preparation of Macroporous, Luminescent Porous Silicon from an n-Type Wafer (Back Side Illumination) Preparation of Porous Silicon by Stain Etching Preparation of Silicon Nanowire Arrays by Metal-Assisted Etching PREPARATION OF SPATIALLY MODULATED POROUS SILICON LAYERS Time-Programmable Current Source Pore Modulation in the z-Direction: Double Layer Pore Modulation in the z-Direction: Rugate Filter More Complicated Photonic Devices: Bragg Stacks, Microcavities, and Multi-Line Spectral Filters Lateral Pore Gradients (in the x-y Plane) Patterning in the x-y Plane Using Physical or Virtual Masks Other Patterning Methods FREESTANDING POROUS SILICON FILMS AND PARTICLES Freestanding Films of Porous Silicon-"Lift-offs" Micron-Scale Particles of Porous Silicon by Ultrasonication of Lift-off Films Core-Shell (Si/SiO2) Nanoparticles of Luminescent Porous Silicon by Ultrasonication CHARACTERIZATION OF POROUS SILICON Gravimetric Determination of Porosity and Thickness Electron Microscopy and Scanned Probe Imaging Methods Optical Reflectance Measurements Porosity, Pore Size, and Pore Size Distribution by Nitrogen Adsorption Analysis (BET, BJH, and BdB Methods) Measurement of Steady-State Photoluminescence Spectra Time-Resolved Photoluminescence Spectra Infrared Spectroscopy of Porous Silicon CHEMISTRY OF POROUS SILICON Oxide-Forming Reactions of Porous Silicon Biological Implications of the Aqueous Chemistry of Porous Silicon Formation of Silicon-Carbon Bonds Thermal Carbonization Reactions Conjugation of Biomolecules to Modified Porous Silicon Chemical Modification in Tandem with Etching Metallization Reactions of Porous Silicon APPENDIX A1. ETCH CELL ENGINEERING DIAGRAMS AND SCHEMATICS Standard or Small Etch Cell-Complete Standard Etch Cell Top Piece Small Etch Cell Top Piece Etch Cell Base (for Either Standard or Small Etch Cell) Large Etch Cell-Complete Large Etch Cell Top Piece Large Etch Cell Base APPENDIX A2. SAFETY PRECAUTIONS WHEN WORKING WITH HYDROFLUORIC ACID Hydrofluoric Acid Hazards First Aid Measures for HF Contact Note to Physician HF Antidote Gel APPENDIX A3. GAS DOSING CELL ENGINEERING DIAGRAMS AND SCHEMATICS Gas Dosing Cell Top Piece Gas Dosing Cell Middle Piece Gas Dosing Cell Bottom Piece

Steam Etched Porous Graphene Oxide Network for Chemical Sensing

Abstract: Oxidative etching of graphene flakes was observed to initiate from edges and the occasional defect sites in the basal plane, leading to reduced lateral size and a small number of etch pits. In contrast, etching of highly defective graphene oxide and its reduced form resulted in rapid homogeneous fracturing of the sheets into smaller pieces. On the basis of these observations, a slow and more controllable etching route was designed to produce nanoporous reduced graphene oxide sheets by hydrothermal steaming at 200 °C. The degree of etching and the concomitant porosity can be conveniently tuned by etching time. In contrast to nonporous reduced graphene oxide annealed at the same temperature, the steamed nanoporous graphene oxide exhibited nearly 2 orders of magnitude increase in the sensitivity and improved recovery time when used as chemiresistor sensor platform for NO2 detection. The results underscore the efficacy of the highly distributed nanoporous network in the low temperature steam etched GO.

Hydrothermal Etching Assisted Crystallization: A Facile Route to Functional Yolk-Shell Titanate Microspheres with Ultrathin Nanosheets-Assembled Double Shells

Abstract: We report a facile "hydrothermal etching assisted crystallization" route to synthesize Fe(3)O(4)@titanate yolk-shell microspheres with ultrathin nanosheets-assembled double-shell structure. The as-prepared microspheres possess a uniform size, tailored shell structure, good structural stability, versatile ion-exchange capability, high surface area, large magnetization, and exhibit a remarkable catalytic performance.

Methods and apparatus for atomic layer etching

Abstract: Substrate processing systems and methods for etching an atomic layer are disclosed. The methods and systems are configured to introducing a first gas into the chamber, the gas being an etchant gas suitable for etching the layer and allowing the first gas to be present in the chamber for a period of time sufficient to cause adsorption of at least some of the first gas into the layer. The first gas is substantially replaced in the chamber with an inert gas, and metastables are then generated from the inert gas to etch the layer with the metastables while substantially preventing the plasma charged species from etching the layer.

Fabrication, surface properties, and origin of superoleophobicity for a model textured surface

Abstract: Inspired by the superhydrophobic effect displayed in nature, we set out to mimic the interplay between the chemistry and physics in the lotus leaf to see if the same design principle can be applied to control wetting and adhesion between toners and inks on various printing surfaces. Since toners and inks are organic materials, superoleophobicity has become our design target. In this work, we report the design and fabrication of a model superoleophobic surface on silicon wafer. The model surface was created by photolithography, consisting of texture made of arrays of ∼3 μm diameter pillars, ∼7 μm in height with a center-to-center spacing of 6 μm. The surface was then made oleophobic with a fluorosilane coating, FOTS, synthesized by the molecular vapor deposition technique with tridecafluoro-1,1,2,2-tetrahydrooctyltrichlorosilane. Contact angle measurement shows that the surface exhibits super repellency toward water and oil (hexadecane) with a water and hexadecane contact angles at 156° and 158°, respectively. Since the sliding angles for both liquids are also very small (∼10°), we conclude that the model surface is both superhydrophobic and superoleophobic. By comparing with the contact angle data of the bare silicon surfaces (both smooth and textured), we also conclude that the superoleophobicity is a result of both surface texturing and fluorination. Results from investigations of the effects of surface modification and pillar geometry indicate that both surface oleophobicity and pillar geometry are contributors to the superoleophobicity. More specifically, we found that superoleophobicity can only be attained on our model textured surface when the flat surface coating has a relatively high oleophobicity (i.e., with a hexadecane contact angle of >73°). SEM examination of the pillars with higher magnification reveals that the side wall in each pillar is not smooth; rather it consists of a ∼300 nm wavy structure (due to the Bosch etching process) from top to bottom. Comparable textured surfaces with (a) smooth straight side wall pillars and (b) straight side wall pillars with a 500 nm re-entrant structure made of SiO(2) were fabricated and the surfaces were made oleophobic with FOTS analogously. Contact angle data indicate that only the textured surfaces with the re-entrant pillar structure are both superoleophobic and superhydrophobic. The result suggests that the wavy structure at the top of each pillar is the main geometrical contributor to the superoleophobic property observed in the model surface.

Patterning Graphene with Zigzag Edges by Self‐Aligned Anisotropic Etching

Abstract: A top-down approach for controlled tailoring of graphene nanostructures with zigzag edges is presented. It consists of two key steps: artificial defect patterning and hydrogen-plasma etching. With this approach, various graphene nanostructures with sub-10 nm features and identical zigzag edges are reliably achieved. This approach shows great promise for making future graphene devices or circuits.

Methods For Atomic Layer Etching

Abstract: Provided are methods of etching a substrate using atomic layer deposition apparatus. Atomic layer deposition apparatus including a gas distribution plate with a thermal element are discussed. The thermal element is capable of locally changing the temperature of a portion of the surface of the substrate to vaporize an etch layer deposited on the substrate.

Method of manufacturing semiconductor device

Abstract: PROBLEM TO BE SOLVED: To provide a method for manufacturing a high-performance bipolar transistor in which emitter size dependence of the transistor characteristics is reduced SOLUTION: A silicon oxide film 102 provided with an opening on an N epitaxial layer 101, a polysilicon 103 containing boron and in contact with the N epitaxial layer around the opening, a silicon nitride film 104, a silicon oxide film 105 and a silicon nitride film 106 are formed Next, a base region 108 is formed by depositing and heat-treating a BSG film 107, the BSG film 107 is exposed by depositing and etching back a silicon nitride film 109 with anisotropic etching, and a P-base region is exposed by etching back with anisotropic etching Next, a silicon oxide film with a thickness about 60% with respect to that of the BSG film 107 is formed, an undercut under a lower portion of the silicon nitride film is etched back by embedded isotropic etching, the film thickness of arsenic-doped polysilicon is uniformized by decreasing the undercut, and impurity concentration and depth of an emitter region are uniformized

Au/Ag Bilayered Metal Mesh as a Si Etching Catalyst for Controlled Fabrication of Si Nanowires

Abstract: Au/Ag bilayered metal mesh with arrays of nanoholes were devised as a catalyst for metal-assisted chemical etching of silicon. The present metal catalyst allows us not only to overcome drawbacks involved in conventional Ag-based etching processes, but also to fabricate extended arrays of silicon nanowires (SiNWs) with controlled dimension and density. We demonstrate that SiNWs with different morphologies and axial orientations can be prepared from silicon wafers of a given orientation by controlling the etching conditions. We explored a phenomenological model that explains the evolution of the morphology and axial crystal orientation of SiNWs within the framework of the reaction kinetics.

A carpet cloak for visible light.

Abstract: We report an invisibility carpet cloak device, which is capable of making an object undetectable by visible light. The cloak is designed using quasi conformal mapping and is fabricated in a silicon nitride waveguide on a specially developed nanoporous silicon oxide substrate with a very low refractive index (n<1.25). The spatial index variation is realized by etching holes of various sizes in the nitride layer at deep subwavelength scale creating a local effective medium index. The fabricated device demonstrates wideband invisibility throughout the visible spectrum with low loss. This silicon nitride on low index substrate can also be a general scheme for implementation of transformation optical devices at visible frequencies.

Footing Reduction Using Etch-Selective Layer

Abstract: A method of forming side spacers upwardly extending from a substrate, includes: providing a template constituted by a photoresist formed on and in contact with an etch-selective layer laminated on a substrate; anisotropically etching the template in a thickness direction with an oxygen-containing plasma to remove a footing of the photoresist and an exposed portion of the underlying layer; depositing a spacer film on the template by atomic layer deposition (ALD); and forming side spacers using the spacer film by etching. The etch-selective layer has a substantially lower etch rate than that of the photoresist.

Uv assisted silylation for recovery and pore sealing of damaged low k films

Abstract: Methods for the repair of damaged low k films are provided. Damage to the low k films occurs during processing of the film such as during etching, ashing, and planarization. The processing of the low k film causes water to store in the pores of the film and further causes hydrophilic compounds to form in the low k film structure. Repair processes incorporating ultraviolet (UV) radiation and silylation compounds remove the water from the pores and further remove the hydrophilic compounds from the low k film structure.

Non-reflecting silicon and polymer surfaces by plasma etching and replication.

Abstract: Constantly increasing demand of renewable and nonpolluting energy production methods has made solar cells one of today’s hottest research areas. Developing more cost-effective fabrication methods that enable production of extremely non-refl ecting surfaces is one of the key issues in solar cell research. [ 1 , 2 ] Many other applications, such as miniaturized chemical analysis systems, would also benefi t greatly from low-cost surfaces with low and uniform refl ectivity. [ 3 ] Typically, suppression of Fresnel refl ection has been achieved by antirefl ective coatings, but they suppress refl ection effi ciently only in a narrow wavelength range. Suppression of refl ection over a broad spectral range can be achieved by using nanotextured surfaces that form a graded transition of the refractive index from air to the substrate. [ 1 , 2 , 4–12 ]

Selective etch for silicon films

Abstract: A method of etching patterned heterogeneous silicon-containing structures is described and includes a remote plasma etch with inverted selectivity compared to existing remote plasma etches. The methods may be used to conformally trim polysilicon while removing little or no silicon oxide. More generally, silicon-containing films containing less oxygen are removed more rapidly than silicon-containing films which contain more oxygen. Other exemplary applications include trimming silicon carbon nitride films while essentially retaining silicon oxycarbide. Applications such as these are enabled by the methods presented herein and enable new process flows. These process flows are expected to become desirable for a variety of finer linewidth structures. Methods contained herein may also be used to etch silicon-containing films faster than nitrogen-and-silicon containing films having a greater concentration of nitrogen.

Remotely-excited fluorine and water vapor etch

Abstract: A method of etching exposed silicon oxide on patterned heterogeneous structures is described and includes a remote plasma etch formed from a fluorine-containing precursor. Plasma effluents from the remote plasma are flowed into a substrate processing region where the plasma effluents combine with water vapor. The chemical reaction resulting from the combination produces reactants which etch the patterned heterogeneous structures to produce, in embodiments, a thin residual structure exhibiting little deformation. The methods may be used to conformally trim silicon oxide while removing little or no silicon, polysilicon, silicon nitride, titanium or titanium nitride. In an exemplary embodiment, the etch processes described herein have been found to remove mold oxide around a thin cylindrical conducting structure without causing the cylindrical structure to significantly deform.

Semiconductor device manufacturing method and plasma etching apparatus

Abstract: A semiconductor device manufacturing method includes a plasma etching step for etching an etching target film formed on a substrate accommodated in a processing chamber. In the plasma etching step, a processing gas including a gaseous mixture containing predetermined gases is supplied into the processing chamber, and a cycle including a first step in which a flow rate of at least one of the predetermined gases is set to a first value during a first time period and a second step in which the flow rate thereof is set to a second value that is different from the first value during a second time period is repeated consecutively at least three times without removing a plasma. The first time period and the second time period are set to about 1 to 15 seconds.

A Carpet Cloak Device for Visible Light

Abstract: We report an invisibility carpet cloak device, which is capable of making an object undetectable by visible light. The cloak is designed using quasi conformal mapping and is fabricated in a silicon nitride waveguide on a specially developed nano-porous silicon oxide substrate with a very low refractive index. The spatial index variation is realized by etching holes of various sizes in the nitride layer at deep subwavelength scale creating a local effective medium index. The fabricated device demonstrates wideband invisibility throughout the visible spectrum with low loss. This silicon nitride on low index substrate can also be a general scheme for implementation of transformation optical devices at visible frequency.

Realization of vertical resistive memory (VRRAM) using cost effective 3D process

Abstract: Vertical ReRAM (VRRAM) has been realized with modification of Vertical NAND (VNAND) process and architecture as a cost-effective and extensible technology for future mass data storage. Dedicated ALD/CVD deposition and wet etching processes were developed to reproduce planar ReRAM properties in VRRAM structure. Multi-stack of VRRAM cell layers were fabricated at the same time using ALD TaOx/barrier layer/CVD TiN cell stacks. Oxidation control without intermixing has been found very critical in the vertical ReRAM cell process.

Multi-scale surface texture to improve blue response of nanoporous black silicon solar cells

Abstract: We characterize the optical and carrier-collection physics of multi-scale textured p-type black Si solar cells with conversion efficiency of 17.1%. The multi-scale texture is achieved by combining density-graded nanoporous layer made by metal-assisted etching with micron-scale pyramid texture. We found that (1) reducing the thickness of nanostructured Si layer improves the short-wavelength spectral response and (2) multi-scale texture permits thinning of the nanostructured layer while maintaining low surface reflection. We have reduced the nanostructured layer thickness by 60% while retaining a solar-spectrum-averaged black Si reflectance of less than 2%. Spectral response at 450 nm has improved from 57% to 71%.

Dry-etch for silicon-and-carbon-containing films

Abstract: A method of etching exposed silicon-and-carbon-containing material on patterned heterogeneous structures is described and includes a remote plasma etch formed from a fluorine-containing precursor and an oxygen-containing precursor. Plasma effluents from the remote plasma are flowed into a substrate processing region where the plasma effluents react with the exposed regions of silicon-and-carbon-containing material. The plasmas effluents react with the patterned heterogeneous structures to selectively remove silicon-and-carbon-containing material from the exposed silicon-and-carbon-containing material regions while very slowly removing other exposed materials. The silicon-and-carbon-containing material selectivity results partly from the presence of an ion suppression element positioned between the remote plasma and the substrate processing region. The ion suppression element reduces or substantially eliminates the number of ionically-charged species that reach the substrate. The methods may be used to selectively remove silicon-and-carbon-containing material at more than twenty times the rate of silicon oxide.

Method for etching high-k dielectric using pulsed bias power

Abstract: A method of patterning a gate stack on a substrate is described. The method includes preparing a gate stack on a substrate, wherein the gate stack includes a high-k layer and a gate layer formed on the high-k layer. The method further includes transferring a pattern formed in the gate layer to the high-k layer using a pulsed bias plasma etching process, and selecting a process condition for the pulsed bias plasma etching process to achieve a silicon recess formed in the substrate having a depth less than 2 nanometer (nm).

Effect of hydrofluoric acid etching duration on the roughness and flexural strength of a lithium disilicate-based glass ceramic

Abstract: The aim of this study was to examine the effect of different acid etching times on the surface roughness and flexural strength of a lithium disilicate-based glass ceramic. Ceramic bar-shaped specimens (16 mm x 2 mm x 2 mm) were produced from ceramic blocks. All specimens were polished and sonically cleaned in distilled water. Specimens were randomly divided into 5 groups (n=15). Group A (control) no treatment. Groups B-E were etched with 4.9% hydrofluoric acid (HF) for 4 different etching periods: 20 s, 60 s, 90 s and 180 s, respectively. Etched surfaces were observed under scanning electron microscopy. Surface profilometry was used to examine the roughness of the etched ceramic surfaces, and the specimens were loaded to failure using a 3-point bending test to determine the flexural strength. Data were analyzed using one-way ANOVA and Tukey's test (?=0.05). All etching periods produced significantly rougher surfaces than the control group (p<0.05). Roughness values increased with the increase of the etching time. The mean flexural strength values were (MPa): A=417 ± 55; B=367 ± 68; C=363 ± 84; D=329 ± 70; and E=314 ± 62. HF etching significantly reduced the mean flexural strength as the etching time increased (p=0.003). In conclusion, the findings of this study showed that the increase of HF etching time affected the surface roughness and the flexural strength of a lithium disilicate-based glass ceramic, confirming the study hypothesis.

Methods for etching oxide layers using process gas pulsing

Abstract: Methods for etching an oxide layer disposed on a substrate through a patterned layer defining one or more features to be etched into the oxide layer are provided herein. In some embodiments, a method for etching an oxide layer disposed on a substrate through a patterned layer defining one or more features to be etched into the oxide layer may include: etching the oxide layer through the patterned layer using a process gas comprising a polymer forming gas and an oxygen containing gas to form the one or more features in the oxide layer; and pulsing at least one of the polymer forming gas or the oxygen containing gas for at least a portion of etching the oxide layer to control a dimension of the one or more features.

Formation of High Aspect Ratio GaAs Nanostructures with Metal-Assisted Chemical Etching

Abstract: Periodic high aspect ratio GaAs nanopillars with widths in the range of 500–1000 nm are produced by metal-assisted chemical etching (MacEtch) using n-type (100) GaAs substrates and Au catalyst films patterned with soft lithography. Depending on the etchant concentration and etching temperature, GaAs nanowires with either vertical or undulating sidewalls are formed with an etch rate of 1–2 μm/min. The realization of high aspect ratio III–V nanostructure arrays by wet etching can potentially transform the fabrication of a variety of optoelectronic device structures including distributed Bragg reflector (DBR) and distributed feedback (DFB) semiconductor lasers, where the surface grating is currently fabricated by dry etching.

Microfluidic etching for fabrication of flexible and all-solid-state micro supercapacitor based on MnO2 nanoparticles.

Abstract: Micro-supercapacitors are a promising candidate whose reliability and performances are struggling to meet the energy demands dictated by the incoming generation of miniaturized electronic devices. In this paper, we describe a facile and low-cost method for fabricating flexible and all-solid-state micro supercapacitors by microfluidic etching. The micro-supercapacitor configuration is composed of sub-10-nm-scale MnO2 nanoparticle interdigital microelectrode fingers prepared by microfluidic etching with H3PO4-PVA thin films as both the solid-state electrolyte and the flexible substrate. The entire device shows outstanding electrochemical performances with high specific capacitance and stable cycle life, and the performance can be mostly preserved even conditions of under repeated bending. The technique we describe here is a universal method for fabricating a micro-supercapacitor, since the microfluidic etching can be extended to most active materials which can be used for energy- and power-devices, and there are many other choices for the solid electrolyte. Thus, these micro-supercapacitors provide a promising power source in microelectromechanical systems (MEMS), wearable electronics and other general requirements.

Porous silicon nanowires.

Abstract: In this mini-review, we summarize recent progress in the synthesis, properties and applications of a new type of one-dimensional nanostructures—single crystalline porous silicon nanowires. The growth of porous silicon nanowires starting from both p- and n-type Si wafers with a variety of dopant concentrations can be achieved through either one-step or two-step reactions. The mechanistic studies indicate the dopant concentration of Si wafers, oxidizer concentration, etching time and temperature can affect the morphology of the as-etched silicon nanowires. The porous silicon nanowires are both optically and electronically active and have been explored for potential applications in diverse areas including photocatalysis, lithium ion batteries, gas sensors and drug delivery.

Method and system for removing an antiferromagnetic seed structure

Abstract: A method for fabricating a transducer on a substrate is described. The transducer includes an antiferromagnetic seed structure. The antiferromagnetic seed structure includes a first NiFe layer, a first multilayer including a first Ru layer, a second NiFe layer, and a second multilayer including a second Ru layer. The second multilayer, the second NiFe layer and part of the first Ru layer are removed using a first wet etch, which uses a first etchant combination to remove NiFe and in which Ru is insoluble. The second Ru layer is removed through lift-off due to etching of the second NiFe layer. A remainder of the first Ru layer is removed through a second wet etch, which uses a second etchant combination to remove Ru. A remaining portion of the first multilayer and the first NiFe layer are removed through a third etch, which uses a third etchant combination that removes NiFe.