Showing papers on "Frequency multiplier published in 2010"
TL;DR: It is observed that conversion efficiencies of 9% at 30µW pump power in LiNbO3 , as well as self-limiting effects at high powers.
Abstract: We demonstrate for the first time natural phase matching for optical frequency doubling in a high-Q whispering-gallery-mode resonator made of lithium niobate. A conversion efficiency of 9% is achieved at 30 microW in-coupled continuous wave pump power. The observed saturation pump power of 3.2 mW is almost 2 orders of magnitude lower than the state-of-the-art value. This suggests an application of our frequency doubler as a source of nonclassical light requiring only a low-power pump, which easily can be quantum noise limited. Our theoretical analysis of the three-wave mixing in a whispering-gallery-mode resonator provides the relative conversion efficiencies for frequency doubling in various modes.
250 citations
TL;DR: In this paper, the authors present some aspects of the technology of terahertz heterodyne receiver front-ends dedicated to astrophysics, planetary and atmospheric sciences, focusing on frequency multipliers and on Schottky mixers.
162 citations
TL;DR: In this paper, a high-performance top-gate graphene field effect transistor (G-FET) is fabricated and used for constructing a high efficient frequency doubler, taking the advantages of the high gate efficiency and low parasitic capacitance of the top gate device geometry.
Abstract: A high-performance top-gate graphene field-effect transistor (G-FET) is fabricated, and used for constructing a high efficient frequency doubler. Taking the advantages of the high gate efficiency and low parasitic capacitance of the top-gate device geometry, the gain of the graphene frequency doubler is increased about ten times compared to that of the back-gate G-FET based device. The frequency response of the frequency doubler is also pushed from 10 kHz for a back-gate device to 200 kHz, at which most of the output power is concentrated at the doubled fundamental frequency of 400 kHz.
137 citations
TL;DR: In this article, a generalized approach to achieving microwave frequency multiplication using two cascaded MZMs is presented, and a theoretical analysis leading to the operating conditions to achieve frequency quadrupling, sextupling, or octupling is developed.
Abstract: Microwave frequency multiplication based on external modulation using two cascaded Mach-Zehnder modulators (MZMs) has been considered an effective solution for high-frequency and frequency-tunable microwave signal generation. Different techniques have been demonstrated recently, but no generalized approach has been developed. In this paper, a generalized approach to achieving microwave frequency multiplication using two cascaded MZMs is presented. A theoretical analysis leading to the operating conditions to achieve frequency quadrupling, sextupling, or octupling is developed. The system performance in terms of phase noise, tunability, and stability is also investigated.
127 citations
TL;DR: Key components of systems operating at high millimeter wave and sub-millimeter wave/terahertz frequencies, and the performance trends of nMOS transistors and Schottky diodes fabricated in CMOS, paths to terahertz CMOS circuits and systems including key challenges that must be addressed are suggested.
Abstract: Key components of systems operating at high millimeter wave and sub-millimeter wave/terahertz frequencies, a 140-GHz fundamental mode voltage controlled oscillator (VCO) in 90-nm CMOS, a 410-GHz push-push VCO with an on-chip patch antenna in 45-nm CMOS, and a 125-GHz Schottky diode frequency doubler, a 50-GHz phase-locked loop with a frequency doubled output at 100 GHz, a 180-GHz Schottky diode detector and a 700-GHz plasma wave detector in 130-nm CMOS are demonstrated. Based on these, and the performance trends of nMOS transistors and Schottky diodes fabricated in CMOS, paths to terahertz CMOS circuits and systems including key challenges that must be addressed are suggested. The terahertz CMOS is a new opportunity for the silicon integrated circuits community.
123 citations
TL;DR: In this paper, the authors report on the design, fabrication, and characterization of an 840-900 GHz frequency multiplier chain that delivers more than 1 mW across the band at room temperature with a record peak power of 1.4 mW at 875 GHz.
Abstract: We report on the design, fabrication, and characterization of an 840-900-GHz frequency multiplier chain that delivers more than 1 mW across the band at room temperature with a record peak power of 1.4 mW at 875 GHz. When cooled to 120 K, the chain delivers up to 2 mW at 882 GHz. The chain consists of a power amplifier module that drives two cascaded frequency triplers. This unprecedented output power from an electronic source is achieved by utilizing in-phase power-combining techniques. The first stage tripler uses four power-combined chips while the last stage tripler utilizes two power-combined chips. The source output was analyzed with a Fourrer transform spectrometer to verify signal purity.
122 citations
TL;DR: In this paper, the potential capabilities of Schottky multipliers for LO power generation up to 2.4 GHz were investigated by means of an in-house computer-aided design tool that combines harmonic balance techniques with an accurate physics-based numerical model of the semiconductor device.
Abstract: Planar Schottky diode frequency multipliers are by far the most employed devices for local oscillator (LO) power generation at terahertz frequencies. In order to push up to the limit the available LO power at terahertz frequencies, the use of accurate physics-based simulation tools is highly necessary to develop multiplier circuits with the highest performance. This paper investigates the potential capabilities of Schottky multipliers for LO power generation up to 2.4 THz by means of an in-house computer-aided design tool that combines harmonic balance techniques with an accurate physics-based numerical model of the semiconductor device. According to numerical simulation results, a 32-μW LO power could be theoretically achieved with a 2.4-THz LO chain at room temperature from a 150-mW W-band solid-state LO source. This demonstrates that there is still a broad margin for the improvement of state-of-the-art terahertz LO power sources.
97 citations
Patent•
20 May 2010
TL;DR: In this paper, a clock combining circuit was proposed to generate clock tap outputs from a plurality of period matched delay elements, where the output clock period is less than the input clock period.
Abstract: A frequency multiplier circuit comprising a delay line receiving at one end thereof a reference clock for generating clock tap outputs from respective ones of a plurality of period matched delay elements; a clock combining circuit responsive to pairs of tap outputs for generating a rising and falling edge of an output clock pulse from respective ones of the pairs whereby the output clock period is less than the input clock period.
83 citations
01 Dec 2010
TL;DR: In this article, the RF performance of CVD grown graphene transistors for the first time is discussed and a new graphene ambipolar frequency multiplier that can operate at 1.4 GHz with extremely high output spectral purity (> 90%) is demonstrated.
Abstract: Ambipolar transport in graphene offers great opportunities for novel device and circuit applications. This paper discusses the RF performance of CVD grown graphene transistors for the first time. Then, a new graphene ambipolar frequency multiplier that can operate at 1.4 GHz with extremely high output spectral purity (> 90%) is demonstrated. These GHz graphene frequency multipliers, made from wafer-scale graphene synthesis and fabrication processes, demonstrate the great potential of graphene-based ambipolar devices for RF and mixed-signal applications.
80 citations
Patent•
21 May 2010
TL;DR: In this paper, a multi-modulus divider, a numerically controlled oscillator and a programmable delay generator are used to synthesize a direct digital frequency synthesizer with phase-dithering noise induced by input into the accumulator of an increment generated from a pseudo-random noise generator.
Abstract: A direct digital frequency synthesizer includes a multi-modulus divider, a numerically controlled oscillator and a programmable delay generator. The divider receives an input clock having an input pulse frequency and outputs some integer fraction of those pulses at an instantaneous frequency that is some integer fraction (1/P) of the input frequency. The divider selects between at least two ratios of P (1/P or 1/P+1) in response to a signal from the oscillator. The oscillator receives a value which is the accumulator increment (i.e. the number of divided pulse edges) required before an overflow occurs that causes the divider to change divider ratios in response to receiving an overflow signal. The oscillator also outputs both the overflow signal and a delay signal to the delay generator. The delay signal contains phase-dithering noise that is induced by input into the accumulator of an increment generated from a pseudo-random noise generator.
75 citations
TL;DR: In this article, the authors demonstrate that a graphene monolayer, over which three metallic electrodes forming a coplanar waveguide are patterned, acts as a frequency multiplier and generates frequencies at least up to 40 GHz.
Abstract: In this letter, we demonstrate that a graphene monolayer, over which three metallic electrodes forming a coplanar waveguide are patterned, acts as a frequency multiplier and generates frequencies at least up to 40 GHz. These results show that monolayer graphene is a natural frequency multiplier.
TL;DR: In this article, the same topology where a push-push pair injects a double frequency tone locking an autonomous differential oscillator is adopted, allowing the design of voltage-controlled oscillators running at a frequency lower than required with advantage in terms of signal spectral purity and frequency tuning range.
Abstract: On-chip frequency generators for high frequency applications suffer from degradation of key passive components, variable capacitors in particular. In this framework, frequency multipliers can play a key role, allowing the design of voltage-controlled oscillators running at a frequency lower than required with advantage in terms of signal spectral purity and frequency tuning range. In this paper we present two injection locked frequency doublers for Ku-band and F-band applications respectively. Despite differences in implementation details, the same topology where a push-push pair injects a double frequency tone locking an autonomous differential oscillator is adopted. The circuits require limited input signal swing and provide a differential output over a broad frequency range. Dissipating 5.2 mW, the Ku-band multiplier, realized in a 0.13 μm CMOS node, displays an operation bandwidth from 11 GHz to 15 GHz with a peak voltage swing on each output of 470 mV. The F-band multiplier, realized in 65 nm CMOS technology, displays an operation bandwidth from 106 GHz to 128 GHz with a peak voltage swing on each output of 330 mV and a power dissipation of 6 mW. A prototype including the multiplier, driven by a half-frequency standard LC-tank VCO, demonstrates an outstanding 13.1% tuning range around 115 GHz.
TL;DR: In this article, the capabilities of two types of terahertz sources based on stimulated Smith-Purcell radiation of electrons in open cavities are discussed, and a series of developed pulsed orotrons provides coherent radiation with an output power of 1-0.1 W in the frequency range of 90-410 GHz, with high frequency stability and broadband electromechanical frequency tuning.
Abstract: The capabilities of two types of terahertz sources based on stimulated Smith-Purcell radiation of electrons in open cavities are discussed. A series of developed pulsed orotrons provides coherent radiation with an output power of 1-0.1 W in the frequency range of 90-410 GHz, with high frequency stability and broad-band electromechanical frequency tuning. A promising alternative source with smaller currents than that in orotrons is a frequency multiplier based on excitation of a surface wave of a periodic structure and Smith-Purcell radiation of arising electron bunches inside the orotron cavity. In contrast to a number of works where only an open grating is used, exploiting a cavity enables a stimulated radiation process with a much higher power. The developed theory demonstrates the possibility of single-mode generation in such multipliers with wide electron beams.
TL;DR: In this article, a novel approach to achieving frequency sextupling using a polarization modulator and a wavelength-fixed optical notch filter is proposed and experimentally demonstrated, which can be used to generate high-spectral-purity subterahertz wave signals using relatively low-frequency electrical and optical devices.
Abstract: Optical frequency multiplication based on electrooptical modulation is an effective way to generate high-spectral-purity and frequency-tunable subterahertz waves. The previously demonstrated frequency-doubling and quadrupling techniques based on a Mach-Zehnder modulator have a low multiplication factor and suffer from bias drift problem and residual chirp. In this paper, a novel approach to achieving frequency sextupling using a polarization modulator and a wavelength-fixed optical notch filter is proposed and experimentally demonstrated. The method is free from bias drift problem and residual chirp, which can be used to generate high-spectral-purity subterahertz wave signals using relatively low-frequency electrical and optical devices. By using a narrow-bandwidth fiber Bragg grating as a wavelength-fixed optical notch filter, a high-spectral-purity microwave signal tunable from 18 to 27.6 GHz is generated when a microwave drive signal from 3 to 4.6 GHz is applied to the polarization modulator. The phase noise of the generated signal is measured as low as -107.57 dBc/Hz at a 10-kHz offset frequency. By replacing the narrow-bandwidth notch filter by an optical interleaver, a subterahertz wave tunable from 66 to 114 GHz is generated when the drive signal is tuned from 11 to 19 GHz. The distribution of the generated signal over optical fiber is investigated. The results show that the quality of the distributed subterahertz wave signal is maintained after transmission over a 40-km standard single-mode fiber.
TL;DR: In this article, the authors proposed a wide-locking range divide-by-3 injection-locked frequency divider fabricated in the 90 nm 1P9M CMOS technology, which consists of an nMOS cross-coupled p-core Armstrong LC oscillator and a center-tapped inductor in series with the pMOSFETs.
Abstract: This letter proposes a wide-locking range divide-by-3 injection-locked frequency divider fabricated in the 90 nm 1P9M CMOS technology. The divider consists of an nMOS cross-coupled p-core Armstrong LC oscillator and a center-tapped inductor in series with the pMOSFETs. The pMOSFETs are used as a linear and second harmonic mixer. At the supply voltage of 1 V, the free-running frequency is from 7.84 to 8.42 GHz, the current and power consumption of the divider without buffers are 4 mA and 4 mW respectively. At the incident power of 0 dBm, the locking range is 4.28 GHz (19.8%), from the incident frequency 19.52 to 23.8 GHz.
Proceedings Article•
12 Apr 2010TL;DR: This paper presents a long range channel measurement system at 81–86 GHz frequency range along with initial channel characterization results, which reveal that the repeatability of the measurement system is very good, and according to the measurement results the line of sight component is dominant in the radio channel and the first multipath component at least 20 dB lower than the line-of- sight component.
Abstract: This paper presents a long range channel measurement system at 81–86 GHz frequency range along with initial channel characterization results. The measurement system enables channel measurements with link distances of several hundreds of meters. It utilizes a synthesizer sweeper and a frequency multiplier in the transmitter and the signal is measured in the receiver after a mixer with a vector network analyzer. As the long measurement distance requirement limits the usage of cables between the transmitter and receiver, only amplitude information is acquired from the channel. Instead, the phase information is acquired from the amplitude of the received signal using Hubert transformation. The channel measurements were performed in two different scenarios which were roof-to-street and street canyon measurement. The results reveal that 1) the measurement system operated well with link distances up to 685 m, 2) the repeatability of the measurement system is very good, and 3) according to the measurement results the line of sight component is dominant in the radio channel and the first multipath component at least 20 dB lower than the line of sight component.
TL;DR: The authors propose a scheme for implementing different logic operations adopting frequency based encoding technique, where the second harmonic generation and difference frequency generation techniques are used by exploiting the non-linear response character of some materials.
TL;DR: In this article, the authors studied the periodicity of the output super-harmonic and inter-modulation frequencies of nonlinear systems and showed the mechanism of the interaction between different output harmonics incurred by different input nonlinearities in system output spectrum.
Abstract: Nonlinear systems usually have complicated output frequencies For the class of Volterra systems, some interesting properties of the output frequencies are studied in this paper These properties show theoretically the periodicity of the output super-harmonic and inter-modulation frequencies and clearly demonstrate the mechanism of the interaction between different output harmonics incurred by different input nonlinearities in system output spectrum These new results have significance in the analysis and design of nonlinear systems and nonlinear filters in order to achieve a specific output spectrum in a desired frequency band by taking advantage of nonlinearities Examples and discussions are given to illustrate these new results
TL;DR: The SBG CNT-based frequency doubler is shown to be able to operate in a large signal mode where the input AC signal, being applied to the top-gate electrode, drives the FET operating alternatively in a p- or n-region yielding an output signal at the drain electrode with doubled frequency and high conversion efficiency.
Abstract: A small band-gap carbon nanotube (SBG CNT) with a large diameter of 4 nm has been used to fabricate ambipolar field-effect transistors (FETs) with ultrahigh carrier mobility of more than 18 300 and 8300 cm2/V·s for holes and electrons, respectively Using a top-gate device geometry with 12 nm HfO2 being the gate oxide, the SBG CNT-based FET exhibits an almost perfect symmetric ambipolar transfer characteristic without any noticeable hysteresis, and a highly efficient frequency doubler is constructed based on this near perfect ambipolar FET The SBG CNT-based frequency doubler is shown to be able to operate in a large signal mode where the input AC signal, being applied to the top-gate electrode, drives the FET operating alternatively in a p- or n-region yielding an output signal at the drain electrode with doubled frequency and high conversion efficiency For an input AC signal of 1 kHz, detailed frequency power spectrum analysis shows that more than 95% of the output signal is concentrated at the doubled
Patent•
28 May 2010TL;DR: In this paper, a variable frequency motor drive and control techniques are presented in which filter capacitor faults are detected by measuring filter neutral node current and/or voltages and detecting changes in the fundamental frequency component of the measured neutral condition.
Abstract: Variable frequency motor drives and control techniques are presented in which filter capacitor faults are detected by measuring filter neutral node current and/or voltages and detecting changes in the fundamental frequency component of the measured neutral condition at the fundamental frequency of the input power and/or based on input current unbalance.
TL;DR: In this article, a 60 GHz injection-locked frequency tripler is designed to improve spectral purity with spur suppression of the fundamental and the even-order harmonics, and several circuit designs are utilized in the harmonic current injection circuit to maximize the third order harmonic and minimize the undesired harmonic current outputs.
Abstract: A 60 GHz injection-locked frequency tripler is designed to improve spectral purity with spur suppression of the fundamental and the even-order harmonics. Several circuit designs are utilized in the harmonic current injection circuit to maximize the third-order harmonic and minimize the undesired harmonic current outputs, including notch filters and a capacitive cross-coupled transistor pair. With the input signal of 0.5 dBm at 19.7 GHz, the harmonic rejection ratios of the fundamental, and the second-order achieve 31.3 dBc, and 45.8 dBc, respectively. Implemented in 0.13 m CMOS technology, the core circuit consumes power of 9.96 mW with 1.2 V supply voltage. The entire die occupies an area of 985 × 866 μm2.
Patent•
TDK1
TL;DR: In this article, a measuring circuit system in a magnetic field measuring apparatus of the invention has an amplifier and a band pass filter connected in sequence on an output terminal side of the TMR element, the band-pass filter is a narrow-range bandpass filter such that a peak pass frequency of the filter that is a center is a basic frequency selected from a range of 10 to 40 GHz.
Abstract: A measuring circuit system in a magnetic field measuring apparatus of the invention has an amplifier and a band-pass filter connected in sequence on an output terminal side of the TMR element, the band-pass filter is a narrow-range band-pass filter such that a peak pass frequency of the filter that is a center is a basic frequency selected from a range of 10 to 40 GHz and a band width centered around the basic frequency is a narrow range of ±0.5 to ±4 GHz; and with the measuring circuit system, an S/N ratio (SNR) of 3 dB or greater is obtained, the SNR being defined by a ratio of an amplitude S of a high-frequency generated signal induced by the TMR element to a total noise N that is a sum of a head noise generated by the TMR element and a circuit noise generated by the amplifier. With such a configuration, an in-plane high-frequency magnetic field generated by a microwave-assisted magnetic head is reliably and precisely measured.
23 May 2010
TL;DR: In this paper, a combined frequency doubler and tripler is proposed for wideband millimeter wave frequency generation in CMOS, which consists of a push-push FET frequency doubter along with a single-balanced mixer based frequency tripler.
Abstract: A combined frequency doubler and tripler is proposed for wideband millimeter wave frequency generation in CMOS. The circuit consists of a push-push FET frequency doubler along with a single-balanced mixer based frequency tripler. The frequency doubler-tripler can generate frequencies in the range of 23–48 GHz with more than −20dBm output power into 50Ω. The conversion gains of the doubler and tripler are measured to be −2.6dB and −12.3 dB, respectively, with a 0dBm input at 14.4GHz. Fabricated in 0.13-µm CMOS, the circuit has an active area of 600×440 µm2. The frequency multipliers consume 12.6mW dc power from 1.2V supply, while the output buffers consume 11.9mW.
02 Sep 2010
TL;DR: A heterodyne receiver chipset utilizing the 140 GHz atmospheric window is presented and detailed descriptions of the individual building blocks are given and measured results are presented for the building blocks as well as for the receiver.
Abstract: For passive mm-wave imaging applications, broadband mm-wave receivers functioning within atmospheric windows are highly desired. Within this paper, a heterodyne receiver chipset utilizing the 140 GHz atmospheric window is presented. The heterodyne chipset is based on two different millimeter-wave monolithic integrated circuits (MIMICs). One is the receiver MIMIC including a low-noise amplifier, a down-conversion mixer, a frequency multiplier and a local oscillator buffer amplifier together with a local oscillator distribution network. The other is a voltage-controlled oscillator (VCO) working in the 35 GHz frequency range to generate the local oscillator signal for the receiver (down-converter) chip. The process technology chosen to realize the chipset is a 100 nm gatelength metamorphic InAlAs/InGaAs high electron mobility transistor (HEMT) technology on 50 μm thick and 4 inch diameter GaAs substrates. The chips are utilizing a grounded coplanar waveguide (GCPW) technology. For an operation frequency band from 120 to 145 GHz, the receiver demonstrates a flat conversion gain between -1 and +2 dB with a power consumption of 120 mW. The VCO is tuneable from 31 to 37 GHz with associated output power levels from -2 to +1 dBm. Detailed descriptions of the individual building blocks are given and measured results are presented for the building blocks as well as for the receiver.
TL;DR: An all-digital phase-locked loop (ADPLL) with all components working with time interval or period signals is demonstrated, and measurement results show that it works well over wide operation conditions.
Abstract: An all-digital phase-locked loop (ADPLL) with all components working with time interval or period signals is demonstrated. The ADPLL consists mainly of a free-running ring oscillator (FRO), a time to digital converter (TDC), a digitally controlled oscillator (DCO), a digital divider and a digital loop filter. In the proposed architecture, the TDC and DCO have an equal time resolution from the common FRO. The digital divider keeps the loop gain constant when the frequency multiplication factor changes. As a result, the ADPLL is inherently stable regardless of the variations of the process, supply voltage and temperature (PVT). The ADPLL is fabricated in 0.13 ?m CMOS process. Measurement results show that it works well over wide operation conditions, with the input frequencies ranging from 37.5 KHz to 25 MHz, frequency multiplication factors from 10 to 255, output frequencies from 10 MHz to 500 MHz, and supply voltages from 0.6 V to 1.6 V.
TL;DR: An electrical distributed parametric oscillator is presented to realize a passive CMOS frequency divider with low phase noise and there is a good agreement among analysis, simulation, and 10-MHz measurement results.
Abstract: We present an electrical distributed parametric oscillator to realize a passive CMOS frequency divider with low phase noise. Instead of using active devices, which are the main sources of noise and power consumption, an oscillation at half of the input frequency is sustained by the parametric process based on nonlinear interaction with the input signal. To show the feasibility of the proposed approach, we have implemented a 20-GHz frequency divider in a 0.13-μm CMOS process. Without any dc power consumption, 600-mV differential output amplitude is achieved for an input amplitude of 600 mV. The input frequency ranges from 18.5 to 23.5 GHz with varactor tuning. The output phase noise is almost 6 dB lower than that of the input signal for all offset frequencies up to 1 MHz. There is a good agreement among analysis, simulation, and 10-MHz measurement results. To the best of our knowledge, this is the first passive frequency divider in a CMOS process.
Patent•
21 Sep 2010TL;DR: In this paper, a dimmable LED driver circuit comprises a resonant DC-DC converter coupled to an output circuit, where the output circuit may include at least one LED series or shunt switch for switching an LED unit on and off.
Abstract: A dimmable LED driver circuit comprises a resonant DC-DC converter coupled to an output circuit. The converter comprises a half bridge or full bridge switching circuit coupled to a resonant circuit. An output of the resonant circuit is rectified and fed to the output circuit. The output circuit may comprise at least one LED series or shunt switch for switching an LED unit on and off. A control circuit controls the switches of the switching circuit at a variable switching frequency. The control circuit is also configured for controlling the switching circuit for amplitude modulating the converter and for pulse-width modulating the converter at a first pulse-width modulation frequency lower than the switching frequency. The control circuit is may further be configured for controlling the switching of the LED switch at a second pulse-width modulation frequency lower than the switching frequency.
Patent•
16 Sep 2010TL;DR: In this article, a band-pass filter is used to suppress the signal of a higher-order resonant frequency with respect to the fundamental frequency of a piezoelectric actuator.
Abstract: In a piezoelectric actuator driver circuit, a resistor provided to detect current is inserted in a current path for a piezoelectric actuator. A signal of a decreased voltage of the resistor is subjected to positive feedback to an amplifier circuit via a band-pass filter. An output signal of the amplifier circuit is subjected to negative feedback to the amplifier circuit via a band-elimination filter. The band-pass filter allows a signal of a fundamental resonant frequency of a piezoelectric device, which includes the piezoelectric actuator, to pass therethrough, and the band-elimination filter blocks the signal of the fundamental resonant frequency. Thus, a loop gain at a higher-order resonant frequency with respect to the fundamental resonant frequency becomes very low and a higher-order resonant mode can be effectively suppressed.
TL;DR: In this article, a memristor is used as a resistive switch whose resistance varies under low frequency excitation but is unchanged at high frequencies, which results from a frequency dependent hysteresis.
Abstract: A method of using memristors as passive electromagnetic switches is demonstrated via full-wave finite-difference time-domain simulations A memristor is a fundamental circuit element that directly links flux and charge These circuit elements exhibit a resistive memory effect, which results from a frequency dependent hysteresis Therefore a memristor can be used as a resistive switch whose resistance varies under low frequency excitation but is unchanged at high frequencies Utilizing this property, a passive reconfigurable band-pass frequency selective surface that is switched via space waves was designed and simulated
23 May 2010
TL;DR: In this article, a single-chip 325-GHz ×18 frequency multiplier chain based on two cascaded active differential triplers and a balanced output doubler is presented, which operates over a 317 to 328 GHz bandwidth with a 0-dBm 18-GHz input signal.
Abstract: A single-chip 325-GHz ×18 frequency multiplier chain based on two cascaded active differential triplers and a balanced output doubler is presented. The multiplier operates over a 317 to 328 GHz bandwidth with a 0-dBm 18-GHz input signal. A peak output power of −8 dBm is obtained at 325 GHz. The multiplier chain is realized in an evaluation SiGe HBT technology with cut-off frequencies f T /f max of 250 GHz / 380 GHz.