Showing papers on "Insulated-gate bipolar transistor published in 2002"

Multilevel inverter by cascading industrial VSI

Abstract: In this paper, the modularity concept applied to medium-voltage adjustable speed drives is addressed First, the single-phase cascaded voltage-source inverter that uses series connection of insulated gate bipolar transistor (IGBT) H-bridge modules with isolated DC buses is presented Next, a novel three-phase cascaded voltage-source inverter that uses three IGBT triphase inverter modules along with an output transformer to obtain a 3-pu multilevel output voltage is introduced The system yields in high-quality multistep voltage with up to four levels and low dv/dt, balanced operation of the inverter modules, each supplying a third of the motor rated kVA The concept of using cascaded inverters is further extended to a new modular motor-modular inverter system where the motor winding connections are reconnected into several three-phase groups, either six-lead or 12-lead connection according to the voltage level, each powered by a standard triphase IGBT inverter module Thus, a high fault tolerance is being achieved and the output transformer requirement is eliminated A staggered space-vector modulation technique applicable to three-phase cascaded voltage-source inverter topologies is also demonstrated Both computer simulations and experimental tests demonstrate the feasibility of the systems

A resonant power MOSFET/IGBT gate driver

Abstract: This paper discusses a resonant gate driver that employs a new method of driving a power MOSFET or IGBT. This resonant gate driver recycles the energy stored in the gate capacitance to reduce the CV/sup 2/f losses associated with a conventional gate driver. Reducing the CV/sup 2/f losses reduces the power consumption and hence the subsequent power dissipation in the resonant gate driver. Less power dissipation enables the driver to operate to higher frequencies. In addition, this topology allows the resonant gate driver to drive the MOSFET gate with a much higher peak to peak voltage swing than it is supplied with and to drive the gate negative in its off cycle. The resonant gate driver can drive the gate with a variable frequency and duty cycle, and very fast switching of the power MOSFET is obtained. An introduction into the low loss capacitance driver circuit topology (patent pending) is presented. The design considerations of implementing a practical MOSFET gate driver using this topology are discussed. Practical implications and considerations of using this topology to drive power MOSFETs/IGBTs are briefly put forward. Experimental test circuits and results are then presented.

Voltage balancing method for IGBTs connected in series

Abstract: This paper presents a new method for balancing voltages of series-connected insulated gate bipolar transistors (IGBTs). This method can be implemented only by adding simple circuits to the gate drive system of the IGBTs, and its effect of balancing the IGBT's collector-emitter voltages during the switching transients is remarkable. This principal strategy and experimental results with series-connected IGBTs are first described. After that, further experimental results are shown from the switching tests of four 2.5-kV flat-packaged IGBTs connected in series. Through the switching tests, superior characteristics of the proposed method have been confirmed.

Characterization and modeling of high-voltage field-stop IGBTs

Abstract: The high-voltage field-stop (FS) insulated gate bipolar transistor (IGBT) is a promising power device for high-power applications thanks to the robust characteristics offered by the FS technology, which combines the inherent advantages offered by punch-through and nonpunch-through structures while overcoming the drawbacks of each structure. In this paper, an electrothermal physics-based model for the FS IGBT is developed. The model contains a detailed description of the FS layer and it is validated using experimental results for a commercial 1200-V/60-A FS IGBT over the entire temperature range specified in the data sheets. The validated model is then used to simulate a 6.5-kV FS IGBT. The simulation results are compared with experimental results published in the literature and good agreement is obtained.

An overvoltage suppression scheme for AC motor drives using a half DC-link voltage level at each PWM transition

Abstract: Passive filters are conventionally used to suppress overvoltage in the motor terminal, either by reducing the voltage rise rate at the inverter output, or by decreasing the motor terminal impedance. We propose an overvoltage suppression scheme that renders the use of passive filters unnecessary. This approach differs from general filter methods, in that it is independent,of d/spl upsi//dt and does not try to reduce d/spl upsi//dt. Our scheme utilizes the middle voltage level V/sub DC//2 at each pulsewidth modulation voltage transition, where V/sub DC/ represents the DC-link voltage. The duration of the middle voltage level is controlled in such a way that reflected voltages are cancelled out at the motor terminal. Optimal cancellation is achieved when the duration of V/sub DC//2 is equal to twice the transport delay of the cable. Further, if reflection coefficients at the motor terminal and the inverter output are equal to /spl plusmn/1, no overvoltage takes place. The proposed scheme requires the use of six auxiliary insulated gate bipolar transistor switches. Simulation as well as experimental results are presented here.

Unit circuit, electronic circuit, electronic apparatus, electro-optic apparatus, driving method, and electronic equipment

Abstract: The invention compensates for variations of a driving transistor Tr 1 . The invention provides a pixel circuit including a current-type driven element L, a driving transistor Tr 1 to control the amount of electrical current to be supplied to the driven element, a capacitor element C connected to the gate of the driving transistor, a switching transistor Tr 3 connected to the gate of the driving transistor, a switching transistor Tr 1 , a scanning line S connected to the gate of the switching transistor Tr 3 , a data line D connected to the source or the drain of the switching transistor Tr 3 , and a power-supply line V connected to a signal line via the switching transistor Tr 3 . A diode-connected compensating transistor Tr 4 is disposed between the power-supply line V and the switching transistor Tr 3.

Advanced wide cell pitch CSTBTs having light punch-through (LPT) structures

Abstract: In order to improve the total performance of nonpunch-through (NPT) type trench IGBT for the 1200/spl sim/1700 V region, a triple combination of concepts is adopted: "wide cell pitch" and "carrier stored trench-gate bipolar transistor (CSTBT)" for the emitter side, and "light punch-through (LPT)" structure for the collector side. The wide cell pitch LPT-CSTBT demonstrates lower on-state voltage, lower switching loss, lower junction leakage current than that of conventional NPT trench IGBT, and relatively large short circuit capability. In addition, our device shows excellent gate dielectric reliability by utilizing CVD gate oxide film. The LPT-CSTBT with CVD gate dielectric is a promising candidate for high voltage power devices, because its performance is approaches that of punch-through (PT) trench IGBTs.

H-bridge circuit for generating a high-energy biphasic waveform in an external defibrillator using single SCR and IGBT switches in an integrated package

Abstract: An external defibrillator with an output circuit having four legs arrayed in the form of an “H” (an “H-bridge”) is disclosed. The output circuit is designed to be able to conduct a range of defibrillation pulse energies, from below 50 joules to above 200 joules. Each leg of the output circuit contains a solid-state switch. By selectively switching on pairs of switches in the H-bridge, a biphasic defibrillation pulse may be applied to a patient. The switches in three of the legs of the H-bridge output circuit are preferably SCR switches, while the fourth leg includes an IGBT switch. In one embodiment, a single power switch is utilized in each of the legs of the H-bridge output circuit, and are included in a single integrated module or package. The use of single semiconductor switches in an integrated surface mountable module or package simplifies the assembly and manufacturing of the defibrillator device. The use of a single IGBT in a leg of the H-bridge (as opposed to two or more IGBTs in series) also greatly simplifies the drive circuitry required to turn on and off the IGBT.

Self-aligned power MOSFET with enhanced base region

Abstract: A power MOSFET transistor is formed on a substrate including a source, body layer, and drain layer and an optional fourth layer for an IGBT. The device is characterized by a conductive gate having a high conductivity metal layer coextensive with a polysilicon layer for high power and high speed operation.

Simulation and optimisation of diode and IGBT interaction in a chopper cell using MATLAB and Simulink

Abstract: A simulation method for power electronic devices has emerged which has high accuracy and short runtimes based on a Fourier model of the device physics. This paper describes the use of the Fourier models for diodes and IGBTs and implementation in MATLAB and Simulink in a formal optimisation strategy. In particular, this paper investigates coupled circuit, diode and IGBT behaviour. Conclusions are drawn concerning device loading and circuit design, especially the role of stray inductance.

Insulated gate bipolar transistor IGBT drive protection circuit

Abstract: The invention relates to a protection circuit driven by insulated gate bipolar transistor (IGBT). It is composed of power supply, IGBT, a signal circuit driven by upper and lower bridges, light coupler, a control circuit with a switch triode, an amplifying circuit for driving signal, a protection circuit for detecting and adjusting the voltages between collector and emitter of IGBT. Said protection circuit includes a short circuit protection circuit, fault latching circuit and fault soft switch off circuit. When the voltage of collector-emitter of IGBT is abnormal, the voltage of insulated gate of IGBT is adjusted to lower than threshold voltage, by the operation of short circuit protection circuit as well as control and amplifying circuit. Thus the IGBT is cut-off and the close latching is realized by that fault latching circuit. It guarantees to close off IGBT before CPU receives the fault signal and closes off driving signal.

A new gate circuit performing fault protections of IGBTs during short circuit transients

Abstract: Short circuit faults of IGBTs determine overcurrent through the devices subsequently to a turn-on switching or during the on-state condition, leading respectively to hard switching fault (HSF) or fault under load (FUL). Firstly, the state of the art as appearing in literature is recalled and discussed. A new short-circuit protection scheme, which allows protection of IGBT devices against fault under load and hard switching fault transients, is presented. It performs the fault current limiting action within the short circuit time, and subsequently forces the device to gate on again in a tentative turn-on. Moreover, the proposed circuitry allows strong bounding of the peak of the current in FUL transients. The validity and correctness of the proposed approach has been extensively validated by experimental tests.

Investigation of parallel operation of IGBTs

Abstract: Widespread application of IGBTs in the past decade has resulted in dramatic improvement in performance of power electronic converters, with simultaneous reduction in costs. In order to further reduce the cost of power electronics systems and improve their reliability it is imperative that techniques for standardized and integrated architectures be adopted, allowing them to be mass-customized for a larger class of applications. One of the key factors that allow broad application of a power switching devices rated at a lower power level across large power levels is ease of parallel operation. This paper is devoted to presenting the results from investigation of parallel operation of IGBT devices. Experimental and computer simulation results are presented.

Enhanced conduction angle power factor correction topology

Abstract: The invention in the simplest form is an improved AC inductor circuit design that is ideal for single boost, or split phase dual boost topologies, and other poly-phase systems improving input power factor and total harmonic distortion. The implementation is efficient, reliable, and flexible, utilizing a wide range of input voltages and currents (including synthesized input voltage waveforms other than sinusoids), and variable frequency voltage sources such as flywheels or micro-turbines, switches, such as IGBT, MOSFET, in combination with AC inductors and typical high frequency rectifier diodes, high frequency rectifiers, or even some line frequency rectifier diodes. The present invention is applicable to power supplies, motor drives, power conditioners, power generation equipment, hybrid power conditioning and distribution equipment, appliances, and flywheels.

Stack structure of power converter

Abstract: PROBLEM TO BE SOLVED: To reduce the cost of a heat radiator and an element by balancing the temperature of a power converter. SOLUTION: In a power converting circuit or the like which performs multiphase AC output or input, semiconductor elements (IGBT) U1-W3 for power, which are to be connected in plural numbers in parallel per phase, are arranged in parallel separately for each phase in the direction of ventilation of a cooling fan shown by an arrow of solid line in the figure, whereby this stack structure suppresses the current value of a downstream IGBT where the temperature of a module case is high, making use of the properties of a positive property IGBT, thereby balancing the temperature. What is more, 1 shows an electrolytic capacitor as a DC power source and 6 shows a fuse. COPYRIGHT: (C)2006,JPO&NCIPI

Empirical power MOSFET modeling: practical characterization and simulation implantation

Abstract: This study deals with power MOSFET models. Parasitic capacitors are one of the main parameters for dynamic models, and have a critical influence on switching waveforms and switching losses. Most of classical models consider that these capacitors are one-voltage dependent. The aim of this paper is to present a new insight based on a physical structure analysis of charge locations and moves and electrical waveforms, both during switching transitions. Establishment of the model with respect to critical voltage changes is presented, and results are compared with experimental curves. This model appears to be more accurate and more reliable than PSPICE or manufacturer original models.

Introduction to Electronic Circuit Design

Abstract: I. THE FOUNDATIONS OF ELECTRONIC CIRCUIT DESIGN. 1. Electronic Circuit Design. The Process of Design. Analysis for Design. Electronic Systems. Notation. 2. Semiconductor Physics and Electronic Devices. Material Properties. Conduction Mechanisms. Conductor-to-Semiconductor Contacts. pn-Junction Diodes. Bipolar Junction Transistors (BJTs). Metal-Oxide Semiconductor Field-Effect Transistors (MOSFETs). Junction Field-Effect Transistors (JFET's). Metal-Semiconductor FET's (MOSFET's). Silicon Controlled Rectifier and Power Handling Devices. Comparison of Devices. 3. Solid-State Device Fabrication. CMOS Technology. Bipolar Technology. 4. Computer-Aided Design: Tools and Techniques. Overview of Simulation Techniques. Circuit Simulation Using SPICE. Circuit Elements and Models for SPICE. Macro Models in SPICE. II. ANALOG ELECTRONIC CIRCUIT DESIGN. 5. Operational Amplifiers. Basic Op Amp Circuits. Frequency-Dependent Op Amp Circuits. Nonlinear Op Amp Circuits. Nonideal Characteristics of Op Amps. 6. Small-Signal Linearity and Amplification. Linear Time-Invariant Networks. Nonlinear Circuit Analysis. Small-Signal Analysis. Small-Signal Amplifiers. Types of Amplifiers. 7. DC Biasing. DC and Large-Signal Low-Frequency Models for Design. Biasing of Single-Stage Amplifiers. Biasing of Multi-Stage Amplifiers. Biasing for Integrated Circuits. Biasing of Differential Amplifiers. Worst-Case Analysis and Parameter Variation. 8. Low-Frequency Small-Signal AC Analysis and Amplifiers. Low-Frequency Small-Signal Models for Design. Stages with Voltage and Current Gain. Voltage Buffers. Current Buffers. Integrated Amplifiers. Differential Amplifiers. Multi-Stage Amplifiers. Comparison of BJT and FET Amplifiers. 9. Amplifier Frequency Response. High-Frequency Small-Signal Models for Design. Stages with Voltage and Current Gain. Voltage Buffers. Current Buffers. Comparison of Single-Stage Amplifiers. Multi-Stage Amplifiers. Differential Amplifiers. 10. Feedback. Negative Feedback. Positive Feedback and Oscillators. 11. Filters and Tuned Amplifiers. Filters. Tuned Amplifiers. Phase-Locked Loops. 12. Low-Frequency Large-Signal AC Analysis. Diode Circuits. Amplifiers. Output Stages. 13. Data Converters. Overview. Digital-to-Analog Converters. Analog-to-Digital Converters. III. DIGITAL ELECTRONIC CIRCUIT DESIGN. 14. Gate-Level Digital Circuits. Background and Binary Logic. Flip-Flops. Shift Registers and Counters. Reflections on Transmission Lines. 15. Transistor-Level Digital Circuits. Device Modeling for Digital Design. Specification of Logic Gates. MOS Digital Circuits. Bipolar Digital Circuits. APPENDIXES. Appendix A: SPICE Reference. Running SPICE. The Input File. Appendix B: Example Device Models. Device Data. Model Libraries from the CD. Appendix C: Two-Port Network Properties (on the CD). Appendix D: Review of Linear Time-Invariant Network Analysis (on the CD). Index.

Multiple-voltage power supply for railway vehicle

Abstract: The invention concerns an installation constituting a railway propulsion chain, characterized in that it comprises, sequentially arranged, in the power electrical circuit, between a power transformer powered by a catenary and an electric motor of said vehicle, said catenary being capable of supplying a plurality of voltages, alternating or direct, said electrical circuit comprising a plurality of contact switches for selecting a given catenary voltage, at least one of the following elements: a controlled rectifier bridge (A1, A2), preferably a single-phase bridge with forced switching; a substantially reactive input filter (A3), preferably comprising at least a capacitance and/or at least an induction coil; a braking chopper capable of including also a clipping function (B); a multiphase and multilevel static converter (C1, C2, C3), preferably three-phase; electronic components, preferably IGBT power semiconductors for each element, each element belonging to at least an elementary power arm of the modular circuit diagram.

Design of IGBT with integral freewheeling diode

Abstract: A new power structure integrating a freewheeling diode in the termination region of a punch-through (PT) insulated gate bipolar transistor (IGBT) is presented. The proposed solution requires virtually no silicon area penalty with respect to a standard IGBT. Static and dynamic experimental results show the correct behavior of both IGBT and freewheeling diode. Further, it is shown that the lateral diode surrounding the multicellular IGBT can support IGBT direct current with low on-state voltage drop. The operation mechanisms of the composite structure and design techniques to improve structure dynamic behavior are investigated through two-dimensional numerical device simulations.

Advanced SPICE modeling of large power IGBT modules

Abstract: An enhanced insulated gate bipolar transistor (IGBT) model based on the Kraus model with new derivations based on an extra parameter accounting for p-i-n injection was developed to allow simulation of both trench and DMOS IGBT structures. Temperature dependence was also implemented in the model. The model was validated against steady-state and transient measurements done on an 800-A 1.7-kV Dynex IGBT module at 25/spl deg/C and 125/spl deg/C. The Spice model has also shown excellent agreement with mixed mode MEDICI simulations. The Spice model also takes into account for the first time the parasitic thyristor effect allowing the dc and dynamic temperature-dependent latchup modeling of power modules as well as their temperature-dependent safe operating area.

Parameter extraction for physics-based IGBT models by electrical measurements

Abstract: The IGBT (insulated gate bipolar transistor) is becoming the power switch of choice for many power applications, since it offers a good compromise between on-state loss, switching loss, and ease of use. To develop circuits and systems using these devices, models are needed for use in circuit simulators. This paper presents a procedure for extracting the most important parameters to be used in IGBT models with physical background by electrical measurements. The parameter extraction consists of 6 test circuits and 6 algorithms that extract 13 physical and structural parameters needed in most physics-based IGBT models.

Plasma extraction transit time oscillations in bipolar power devices

Abstract: Disturbing high frequency oscillations observed during turn-off of IGBT modules can be explained by (i) a local parasitic resonant circuit and (ii) a new r.f. generator mechanism similar to the BARITT diode effect. The phenomenon is related to periodic hole extraction from the electron–hole plasma. Therefore it will be called “plasma extraction transit time” effect. This effect can be modelled using device simulation. The r.f. generation efficiency is very small. Resonator Q -factor, resonance frequency and carrier transit time must fit well to enable excitation of the parasitic resonant circuit.

Thermal component models for electro thermal analysis of multichip power modules

Abstract: Thermal component models are developed for multi-chip of insulated gate bipolar transistor (IGBT) power electronic modules (PEM) and associated high-power converter heat sinks. The models are implemented in SABER and are combined with the electro-thermal IGBT and diode models to simulate the electro-thermal performance of high power converter systems. The thermal component models are parameterized in terms of structural and material parameters so that they can be readily used to develop a library of component models for the various commercially available power modules. The paper presents model development and implementation in SABER, simulation results, and validation using experimental data.

New collector design concept for 4.5 kV injection enhanced gate transistor (IEGT)

Abstract: In this paper, we propose a new collector design concept for high voltage IGBTs/IEGTs, which is composed of a low injection efficiency p-emitter and low transport factor n-buffer. The n-buffer with low transport factor provides decreasing hole injection from p-emitter to n-base to improve the trade-off relation between collector-emitter saturation voltage and turn-off loss. Besides, the n-buffer with low transport factor does not prevent hole injection from p-emitter to n-base at the device turn-on period. As the low transport n-buffer is combined with a low efficiency p-emitter, total switching loss including turn-off loss and turn-on loss decreases. The new collector design concept was applied to 4.5 kV IEGTs, and the fabricated device has demonstrated a reduction of total switching loss by 11% compared with that of the device having only low injection efficiency p-emitter. The fabricated device with the new collector design concept also has excellent turn-off capability.

A thermal model for igbt modules and its implementation in a real time simulator

Abstract: As the power density and switching frequency increase, thermal analysis of power electronics system becomes imperative. The analysis provides valuable information on the semiconductor rating, long-term reliability and efficient heat-sink design. The aim of this thesis is to build a comprehensive thermal model for the power IGBT modules used in three-phase inverters in order to predict the dynamic junction temperature rise under real operating conditions. The thermal model is developed in two steps: first, the losses are calculated and then the junction temperature is estimated. The real-time simulation environment dictates the requirements for the models: easy implementation on the software platform SIMULINK and fast calculation time. The power losses model, which is based on the look-up table method for calculating the conduction and switching losses, are successfully built and implemented in the real time simulation environment. The power losses equations are derived from the experimental data. Several algorithms are developed to catch every switching event and to solve the synchronization problem in a real-time system. An equivalent RC network model is built to perform the thermal analysis. The parameters of the thermal network are extracted from the junction to case and case to ambient dynamic thermal impedance curves. Two separate approaches are followed in deriving these thermal characteristic curves. The first approach uses the experimental data available while the second approach uses the commercial software package ANSYS. The 3-D simulation results using ANSYS agree well with the experimental data and therefore can be relied upon to extract the parameters of the thermal RC network. The latter is successfully implemented using the transfer function method, and is then built in SIMULINK environment for the use in a real time simulator. The power losses and thermal RC network models are extensively tested in a real time simulator environment. The accuracy of the models is confirmed by comparing their predictions with the experimental data.

Key power semiconductor device concepts for the next decade

Abstract: The paper presents a comparison of the latest device concepts like the super junction MOSFET, the IGBT and the actual trends in SiC devices. All these devices are capable of blocking voltages in the range of 1000 V, and optimized for different fields of applications. Silicon carbide switching devices exhibit superior properties compared to silicon devices. Low specific on-resistance for high breakdown voltages is believed to be the most outstanding feature of SiC power switching devices. MOSFETs and JFETs capable of blocking 1800 V with a specific on-resistance of 47 m/spl Omega/ cm/sup 2/ are SiC devices attractive for the system designer.