Showing papers on "Pulse-width modulation published in 2021"
TL;DR: Experimental results demonstrate that the proposed 13-level inverter has the advantages of high boosting factor, self-balanced capacitor voltages, low harmonics, and high efficiency, and the maximum efficiency is up to 97.2%.
Abstract: A 13-level inverter based on switched-capaci-tor technique is proposed in this article. It consists of ten transistors, four diodes, and four capacitors with self-balanced voltages. The ten transistors form two H-bridges and one half-bridge resulting in simple structure and easy design of gate drivers. With a hybrid of level-shifted and phase-shifted pulsewidth modulation algorithm, voltage ripples of capacitors and low harmonic components of output voltage are suppressed simultaneously. Compared with the existing solutions, the proposed 13-level inverter has a simpler structure and the lower cost per level. Experimental results demonstrate that the proposed inverter has the advantages of high boosting factor, self-balanced capacitor voltages, low harmonics, and high efficiency, and the maximum efficiency is up to 97.2%.
70 citations
TL;DR: In this article, a comprehensive review of the Space Vector Modulation (SVM) for the Neutral Point Clamped (NPC) Multi-Level Inverters (MLI) is presented.
Abstract: The Neutral Point Clamped (NPC) Multi-Level Inverters (MLI) have been ruling the power electronics industries for the past two decades. The Multi-Carrier Pulse Width Modulation (MCPWM) is common PWM techniques which are widely used in NPC-MLI applications. However, MCPWM is not having a good impact on the balancing of DC-link voltages, Common Mode Voltage (CMV) and limiting the Total Harmonics Distortion (THD). The Selective Harmonic Elimination (SHE) technique is introduced for reducing the THD, however all the switching angles should be maintained less than $\pi $ /2 to keep the eliminated harmonics at constant level which narrows down the modulation index range. Hence, in recent days Space Vector Modulation (SVM) technique is widely used in NPC-MLI, which gives better DC-link voltage balancing, self-neutral point balancing, near-zero CMV reduction, better-quality harmonics profile and switching loss minimization. Hence, it is a preferred solution for the majority of electrical conversion applications such as electric traction, high power industrial drives, renewable power generation, and grid-connected inverters, etc. The paper gives a comprehensive review of the SVM for NPC-MLI. First, this paper deliberates the state of art for two-level SVM and extends it to three-level (3L) SVM. Also compares the 3L SVM performance with other MCPWM techniques. Followed by the various modified MLI SVM techniques in terms of their implementations, DC-link capacitor balancing, and reduction of CMV. Further, the review of MLI SVM is widened to open-end winding Inverters and multiphase MLIs. The final part of this paper discussed the future trends and research directions on MLI SVM techniques and its applications.
67 citations
14 Apr 2021
TL;DR: Pulse Width Modulation method, Random Nearest level (RNL) modulation scheme are presented, and the proposed circuit is along with the respective degree of the output voltage were synthesized in non-linear load by the development of reactive power across a motor load.
Abstract: Pulse width modulation (PWM) is a powerful technique employed in analog circuit convert with a microprocessor based digital output. Besides, Pseudo Random Multi Carrier (PRMC) involves in two random PWM strategies to minimize the harmonic order for 9- level cascaded multilevel H-bridge (CHB) inverter and 9-level Modular Multilevel inverter are introduced. The design mainly focuses on the (Pulse Width Modulation) PWM method, in which two nearest voltage levels are approached in estimated output voltage prediction based on the Partial swarm optimization (PSO) algorithm, and it conveys a random variation in the pulse position of output by Pseudo Random Multi Carrier- Pulse Width Modulation (PRMC-PWM). The CHB and the Modular inverters generate low distortion output by using PMRC. The simulation and prototype circuit are developed for the nine level output using sixteen switches and ten with Resistive-Inductive (R-L) load variation condition. The power quality is improved in CHB and Modular inverter (MoI) with minimized harmonics in various modulation index (MI) as varied from 0.1 up to 0.8. The circuit is designed by using a Field Programmable Gate Array (FPGA), Implementing a PSO algorithm for both CHB, and MoI are proposed. The comparisons of results are verified with lower order harmonics and find the best switching angle across the MLI switches. Modular inverter furthermore investigates with PRMC, Random Nearest level (RNL) modulation scheme are presented, and the proposed circuit is along with the respective degree of the output voltage were synthesized in non-linear load by the development of reactive power across a motor load.
60 citations
TL;DR: This article investigates the period control approach (PCA-MPC) to achieve a fixed switching pattern, similar to that of modulated strategies placed at a desired frequency, with clean spectrum at a wide range of switching frequencies.
Abstract: Finite control set model predictive control (FCS-MPC) chooses at each sampling period the input control vector state without using a modulator. Therefore, it belongs to the direct control family. As a consequence, the conventional implementation of FCS-MPC presents variable switching frequency. This makes difficult the design of the output filter. This article investigates the period control approach (PCA-MPC) to achieve a fixed switching pattern, similar to that of modulated strategies placed at a desired frequency. PCA-MPC cannot reach a reference switching frequency without a steady-state error. Nonetheless, it is more than capable of reaching a fixed switching pattern, with clean spectrum at a wide range of switching frequencies. This feature is used here to design an embedded control objective to reach the desired switching frequency. The implementation of the cost function is done through modification of PCA-MPC measurements. These modifications allow one to obtain fast and precise estimates of the switching frequency, which, in turn, permits a fast control. The performance of this control strategy is evaluated through simulation and corroborated by experimental validation on a two-level three-phase, power converter.
54 citations
TL;DR: In this article, a high-voltage dc and pulsewidth modulation (PWM) excitations between different terminals during different switching intervals are investigated. And the authors provide a group of PDIV comparisons of packaging insulation under dc and PWM waveforms and discloses discrepancies in these PDIV results with respect to their excitations.
Abstract: Emerging applications of compact high-voltage SiC modules pose strong challenges in the module package insulation design. Such SiC module insulations are subjected to both high-voltage dc and pulsewidth modulation (PWM) excitations between different terminals during different switching intervals. High dV/dt strongly interferes with partial discharge (PD) testing as it is hard to distinguish PD pulses and PWM excitation-induced interferences. This article covers both the testing and modeling of PD phenomena in the high-voltage power modules. A high dV/dt PD testing platform is proposed, which involves a super-high-frequency (SHF) (SHF >3 GHz) down-mixing PD detection receiver and a high-voltage scalable square wave generator. The proposed method captures SHF PD signatures and determines PD inception voltage (PDIV) for packaging insulation. Using this platform, this article provides a group of PDIV comparisons of packaging insulation under dc and PWM waveforms and discloses discrepancies in these PDIV results with respect to their excitations. Based on these PD testing results, the article further provides a model using the space-charge accumulation to explain the PD difference under dc and PWM waveforms. Both simulation and sample testing results are included in this article to support this hypothesis. With this new model, the article includes an updated insulation design procedure for the high-voltage power modules.
54 citations
TL;DR: An improved dc-link voltage regulation strategy is proposed for grid-connected converters applied in dc microgrids and has robustness properties to handle parameter mismatches compared with the input–output linearization method.
Abstract: In this article, an improved dc-link voltage regulation strategy is proposed for grid-connected converters applied in dc microgrids. For the inner loop of the grid-connected converter, a voltage modulated direct power control is employed to obtain two second-order linear time-invariant systems, which guarantees that the closed-loop system is globally exponentially stable. For the outer loop, a sliding mode control strategy with a load current sensor is employed to maintain a constant dc-link voltage even in the presence of constant power loads at the dc-side, which adversely affect the system stability. Furthermore, an observer for the dc-link current is designed to remove the dc current sensor at the same time improving the reliability and decreasing the cost. From both simulation and experimental results obtained from a 15-kVA prototype setup, the proposed method is demonstrated to improve the transient performance of the system and has robustness properties to handle parameter mismatches compared with the input–output linearization method.
51 citations
TL;DR: A new single current sensor (SCS) method for a permanent magnet synchronous motor three-phase current reconstruction, with a novel hybrid pulsewidth modulation (PWM) technique introduced.
Abstract: Current sensing techniques with reduced number of sensors attract a high interest from industry, for the possibility of cost reduction and sampling mismatch reduction. This article puts forward a new single current sensor (SCS) method for a permanent magnet synchronous motor three-phase current reconstruction, with a novel hybrid pulsewidth modulation (PWM) technique introduced. This method is implemented by changing the position of SCS from dc bus to a current branch, and a modified space vector PWM technique is employed to realize the phase current reconstruction. Compared with traditional SCS control methods, the proposed method can relieve the measurement dead-zones at sector boundary region without introducing extra compensation algorithms. Besides, this method can be realized not only with a single hall-effect current sensor but also a single shunt resistor, which further expands the applications and increases the system reliability as well. This method is also available in other motor control with a two-level three-phase PWM voltage source inverter topology. The accuracy and feasibility of the proposed method is validated by the simulation and experimental results.
51 citations
TL;DR: In this paper, the authors explored various direct power control (DPC) strategies for three-phase two-level pulsewidth modulation (PWM) converters and summarized the fundamental power formula of PWM rectifiers, and studied the operating principle of the conventional table-based approach and its related improvements.
Abstract: Starting from the principle of instantaneous power theory, this article explores various direct power control (DPC) strategies for three-phase two-level pulsewidth modulation (PWM) converters. After summarizing the fundamental power formula of PWM rectifiers, this article studies the operating principle of the conventional table-based approach and its related improvements. It further looks into the advanced counterparts employing space vector modulation and different nonlinear control strategies. The emphasis is put on the prevailing predictive DPC. Besides, the voltage-sensorless and robust DPC methods based on the virtual flux concept and the state observer or estimator are investigated. Critical issues, including the sample delay, constant switching frequency, duty cycle optimization, objective function, and unbalanced operation are examined.
49 citations
TL;DR: Two alternatives of a direct model predictive control scheme for a three-phase two-level grid-connected converter with an $LCL$ filter are proposed, implying that a fixed modulation cycle akin to pulsewidth modulation (PWM) results.
Abstract: This article proposes two alternatives of a direct model predictive control (MPC) scheme for a three-phase two-level grid-connected converter with an $LCL$ filter. Although both approaches are implemented as direct control methods, i.e., they combine control and modulation in one computational stage, they operate the converter at a constant switching frequency and generate a discrete grid current harmonic spectrum. To achieve this, the first method allows for one switching transition per phase and sampling interval, implying that a fixed modulation cycle akin to pulsewidth modulation (PWM) results. Moreover, by appropriately designing the objective function of the optimization problem underlying MPC, grid current distortions similar to those of space vector modulation (SVM) are produced. As for the second approach, two phases are allowed to switch per sampling interval, emulating the behavior of discontinuous PWM. Consequently, due to the introduced formulations, harmonic limitations imposed by relevant grid codes can be met with the proposed methods. Furthermore, due to the multiple-input multiple-output (MIMO) nature of both approaches, all output variables of the system can be simultaneously controlled. Finally, the inherent full-state information of MPC renders an additional active damping loop unnecessary, further simplifying the controller design. The presented performance assessment highlights the potential benefits of both proposed MPC-based algorithms.
48 citations
TL;DR: A comprehensive review of the state-of-the-art capacitor voltage balancing strategies for MLCs under SHE-PWM, including self-balancing control, charge amount regulation, zero-sequence harmonic adjustment, redundant switching angle sets adjustment, angle modification, and selective harmonic elimination model predictive control.
Abstract: In recent decades, applications of selective harmonic elimination pulsewidth modulation (SHE-PWM) have been extended from two-level to multilevel converters (MLCs). For most MLC topologies, one of the main challenges of using SHE-PWM lies on capacitor voltage balancing, especially with very low switching frequency in high-power applications. Due to the broad variety of MLCs, it is of great difficulty to develop a generalized capacitor voltage balancing method under SHE-PWM that is suitable for all topologies. In order to further facilitate the industrial applications of SHE-PWM on MLCs, this article provides a comprehensive review of the state-of-the-art capacitor voltage balancing strategies for MLCs under SHE-PWM. The voltage balancing methods in this article include self-balancing control, charge amount regulation, zero-sequence harmonic adjustment, redundant switching angle sets adjustment, angle modification, selective harmonic elimination model predictive control, space voltage vectors adjustment, and redundant states adjustment. Detailed comparisons of the eight voltage balancing strategies under SHE-PWM are presented to facilitate the selections of the most suitable method for specific applications. Moreover, discussions on open questions and future trends of this topic are also presented, to motivate future research and explore new alternatives.
46 citations
TL;DR: The main innovation is that the parameter recognition method is able to recognize both mutual inductance and double-side self-inductance with only rms value of sampling signal, phase information and auxiliary circuit being needless.
Abstract: In order to allow a wireless power transfer system to operate in a large-scale space where coupling coefficient has a significant variation due to different air gaps and displacements, a double-side self-tuning LCC /S system using a variable switched capacitor based on parameter recognition is proposed in this article. The main innovation is that the parameter recognition method is able to recognize both mutual inductance and double-side self-inductance with only rms value of sampling signal, phase information and auxiliary circuit being needless. Besides, based on the result of parameter recognition, the double-side use of variable switched capacitors and corresponding control strategy allow the proposed system to operate in a large-scale coupling space and help to improve system efficiency. Experiment results show parameters recognizing error less than 5%. A contrastive simulation verifies that variable switched capacitor can be equivalent to discrete capacitor with the same branch current in the proposed system. System feasibility is testified by a 700-W prototype and the effectiveness of the proposed system is demonstrated by a contrastive experiment with and without pulsewidth modulation (PWM) tuning, efficiency from dc to dc will increase about 3% with PWM tuning.
TL;DR: In this paper, a closed-loop neutral-point voltage balancing method based on carrier-overlapped pulsewidth modulation (COPWM) is proposed to solve the problem of imbalance.
Abstract: Neutral-point voltage imbalance is one of the main problems of five-level neutral-point clamped inverters that impedes their industrial application. In order to solve this problem, a closed-loop neutral-point voltage balancing method based on carrier-overlapped pulsewidth modulation (COPWM) is proposed in this article. The four dc-link capacitor voltages are balanced by three steps: voltage balancing between the two outer capacitors, voltage balancing between the two inner capacitors, and voltage balancing between the two inner and the two outer capacitors. The relationship between the neutral-point currents and the reference voltage is studied, and the top and the bottom dc-link capacitor voltages are balanced by zero-sequence voltage injection. The two inner capacitor voltages are balanced by adjusting the width of switching signals. Simulation and experimental results are presented to confirm the validity of this method.
TL;DR: A hybrid nine-level inverter topology (HNIT) for DC-AC conversion is proposed in this brief, where each phase of the HNIT is designed with only eight semiconductor switches, one diode, and two electrolytic capacitors.
Abstract: Nowadays, output voltage boosting gain property along with curtailment in the circuit voltage stress, and component count are considered as the essential topological features for the new multilevel inverter (MLI) circuits. Recognizing the above, a hybrid nine-level inverter topology (HNIT) for DC-AC conversion is proposed in this brief. Each phase of the HNIT is designed with only eight semiconductor switches, one diode, and two electrolytic capacitors. Herein, series-parallel and conventional-series techniques are utilized effectively to balance the capacitor voltages. Further, cost and quantitative comparisons are carried among the state-of-art circuits to highlight the supremacy of proposed circuit. Subsequently, the performance of HNIT is verified experimentally with the fundamental switching PWM technique at different load conditions.
TL;DR: This article proposes a common-mode voltage (CMV) attenuation method for the three-phase current source inverter (CSI)-fed permanent-magnet synchronous machine drive by introducing an auxiliary circuit branch connected in parallel with the dc link.
Abstract: This article proposes a common-mode voltage (CMV) attenuation method for the three-phase current source inverter (CSI)-fed permanent-magnet synchronous machine drive. The key of this method is to introduce an auxiliary circuit branch connected in parallel with the dc link. Based on the dedicated switching strategy, the zero-voltage-switching conditions are provided for the main switches in the CSI. In particular, the zero current vector is newly constructed without utilizing shoot-through operation in the CSI. Thus, the CMV in the traditional CSI drives is attenuated significantly. Compared with the existing research on CMV suppression, the proposed method will not compromise the modulation index range or increase output current harmonics. Meanwhile, the overshoot voltage can be clamped by the auxiliary power circuit in the dc link under open-circuit fault in the power switches. The system configuration, operating principle, analysis of operation modes, as well as the control scheme are described in detail. Both simulation and experimental results are presented to verify the performance of the proposed method.
TL;DR: Detailed mathematical model of the proposed CTMLI is presented considering the optimal transformer turn’s ratio in addition to the power distribution among them, and cost estimation model for the MLI is present in details in order to investigate the cost reduction in the proposedCTMLI.
TL;DR: An improved repetitive filter is proposed to remove all the sampled SHs and keep the advantage of phase boost by using the multisampling control and the method is evaluated with a single-loop inverter-side current control, and its effectiveness is verified through the simulation and experiment.
Abstract: Multisampling control provides an attractive way to reduce the control delays in LCL-filtered grid-connected inverters. Thereby, the bandwidth and stability margin will be improved. However, high frequency switching harmonics (SHs) is introduced in the control loop when the inverter-side current is sampled. In order to investigate the effect of multisampled high frequency SHs, the relationship between the double-update pulse width modulation (PWM) and multi-update PWM is deduced through geometric deduction. It is shown that the multi-update PWM is equivalent to double-update PWM with sampling instant shift, and the equivalent Nyquist frequency is equal to the switching frequency. Moreover, the non-averaged value of current is sampled within one switching period and aliased low-order harmonics will appear in the grid-side current. Hence, filtering the multi-sampled SHs is necessary, and an improved repetitive filter is proposed to remove all the sampled SHs and keep the advantage of phase boost by using the multisampling control. The method is evaluated with a single-loop inverter-side current control, and its effectiveness is verified through the simulation and experiment.
TL;DR: This letter proposes a dual-side phase-shift implementation method using driving windings to regulate the dual- side phase difference conducted only on the primary side, which is independent from power transfer to get rid of the issues of the conventional phase synchronization method.
Abstract: The isolated feature between primary and secondary sides in wireless power transfer requires dual-side communication, phase synchronization, and two controllers on both sides. The phase difference between dual-side ac voltages can be changed for output regulation or bidirectional power flow. Zero crossing detection of the secondary ac voltage or current is normally conducted for frequency locking and phase synchronization. However, it is inaccurate at light-load conditions for high-power applications due to a large sensing scale and much noise; also, it can generate undesired results with discontinuous or distorted waveforms having more than two zero crossing points in one cycle. To solve these issues, this letter proposes a dual-side phase-shift implementation method using driving windings to regulate the dual-side phase difference conducted only on the primary side. By controlling the phase difference between the primary-side power and driving windings, the phase difference between the dual-side power windings can be regulated. In this way, the dual-side regulation is independent from power transfer to get rid of the issues of the conventional phase synchronization method, and bidirectional power flow can be more easily realized.
TL;DR: The results show that the PReSCE circuit eliminates the inrush current and increases the balance speed three times than the parallel pure switched-capacitor equalizer.
Abstract: The traditional pure switched-capacitor equalizer suffers from a large inrush current and low balance speed. An automatic parallel resonant switched-capacitor equalizer (PReSCE) for series-connected battery strings is proposed, which utilizes resonant switched-capacitor to eliminate the inrush current. The parallel ReSC converters not only minimizes output impedance at the low switching frequency, but delivers the excess energy to the low-voltage battery directly from the high-voltage battery in one cycle. Both of the two functions increase the balance speed. All of the switches are controlled by a pair of complementary pulsewidth modulation signals at a fixed operational frequency. Both simulation and experiment are used to verify the theoretical analysis and system feasibility of the proposed circuit. The results show that the PReSCE circuit eliminates the inrush current and increases the balance speed three times than the parallel pure switched-capacitor equalizer.
TL;DR: In this paper, a deadbeat current controller for isolated bidirectional dual-active-bridge dc-dc converter is proposed, which uses an enhanced single phase shift modulation method by exploiting pulse width as an extra control variable besides phase shift ratio.
Abstract: This letter proposes a deadbeat current controller for isolated bidirectional dual-active-bridge dc–dc converter. The controller uses an enhanced single phase shift modulation method by exploiting pulse width as an extra control variable besides phase shift ratio, the only control variable of the conventional single phase shift modulation. The current reference can be tracked within one switching cycle during the bidirectional power transmission and transition of the two directions. Deadtime effect is studied and the compensation method for the controller is proposed. Parameter robustness is analyzed by mathematical derivation and the online autotuning method for the inductance is presented. The proposed deadbeat current controller is simple and easy for implementation. Moreover, it shows superior dynamic performance, which is verified by experimental results during the transient processes of the converter. The effectiveness of the autotuning method is also validated by the prototype experiment.
TL;DR: A step-up seven-level inverter supplied by a single dc source suitable for renewable energy application and praised for the ability of sensorless voltage balancing of the capacitors, reducing control complexity to produce a bipolar staircase waveform.
Abstract: In this article, a step-up seven-level inverter supplied by a single dc source suitable for renewable energy application is presented. Forming the desired output is realized by charging capacitors and synthesizing them based on a switched-capacitor concept. This structure is praised for the ability of sensorless voltage balancing of the capacitors, reducing control complexity to produce a bipolar staircase waveform. It also benefits from regenerative performance, avoiding unwanted capacitors overvoltage. A phase disposition pulsewidth modulation (PD-PWM) technique is utilized to control the circuit operation. Furthermore, a comparison with other recent topologies reveals that losses, number of semiconductor devices, and gate driver circuits are reduced. Theoretical analysis is verified through a laboratory prototype implementation. Experimental results under various types of loads approve the performance of the proposed inverter and validity of the design. Finally, maximum experimental efficiency of 94.3% (115 V, 250 W load) was reached.
TL;DR: This article proposes an approach to control a photovoltaic cascaded H-bridge multilevel inverter with failed cells and changing meteorological conditions for large-scale grid-connected applications and is able to produce balanced three-phase line-to-line voltages and currents even if there is a failed cell.
Abstract: This article proposes an approach to control a photovoltaic cascaded H-bridge multilevel inverter with failed cells and changing meteorological conditions for large-scale grid-connected applications. The controller development is based on an analysis of the interaction between the inverter common-mode and differential-mode quantities, which is done in the time domain, supported by a space vector representation analysis. The proposed approach is able to produce balanced three-phase line-to-line voltages and currents even if there is a failed cell or if the fluctuating meteorological conditions cause uneven power distribution among the bridges. This is achieved through the modification of the pulsewidth modulation reference phase voltage angles combined to the injection of a dynamic homopolar component. Such an approach avoids tripping the system due to the protective functions #25 and #87 for per grid applicable codes and standards. Numerical simulations and laboratory experiments performed on a seven-level converter with different abnormal conditions to confirm the effectiveness of the suggested control strategy.
TL;DR: An enhanced fault-tolerant model predictive current control with continued modulation is proposed in this article, which includes reconstructing the postfault vector distribution and adopting a multistep vector selection method.
Abstract: To deal with the single-phase open-circuited fault, an enhanced fault-tolerant model predictive current control with continued modulation is proposed in this article. This method includes reconstructing the postfault vector distribution and adopting a multistep vector selection method. In the reconstruction procedure, the transition vectors are generating to realize standard pulsewidth modulation waveforms. Then, the unreachable area can be filled by creating new synthetic vectors. Finally, the vectors with oversized amplitudes are optimized by using null vectors. In order to cover the full modulation area, a multistep vector selection method is used to determine the phase angle and amplitude of the optimal vector. The phase angle can be determined by defining two cost functions and adopting duty cycle modulation technology. The amplitude of the optimal vector can be optimized by utilizing the duty cycle modulation technology again. The oscillation, due to the back electromotive force, is compensated in each step. A thorough experimental evaluation has been conducted to confirm the effectiveness and superiority of the proposed fault-tolerant method.
TL;DR: In this article, the authors proposed a modulation strategy to ensure zero voltage switching (ZVS) and reduce the circulating current for the dual-active bridge (DAB) converters, which can achieve ZVS operation in a range of 2% to 100% of the rated power.
Abstract: The dual-active bridge (DAB) topology is commonly preferred in bidirectional applications due to several attractive features, including auto-adjust of power flow, galvanic insulation, wide voltage gain, and zero voltage switching (ZVS) capability over some power ranges. However, the efficiency of the converter drops at light loads because the ZVS range is directly dependent on the circulating current. Assuming that the processed power is variable, the DAB converter's design must find a compromise between extending ZVS ranges and reducing the reactive power processing to ensure higher efficiency. Aiming this compromise, many papers propose hybrid approaches in which the modulation strategy is selected according to the processed power. However, this is not a simple solution because it demands multivariable control and offline optimizations. This paper proposes a modulation strategy to ensure ZVS and reduce the circulating current for the DAB converters. While the usual phase-shift modulation provides ZVS operation in a range of 40% to 100% of rated power, the proposed asymmetrical pulse-width modulation can obtain ZVS operation in a range of 2% to 100% of rated power. Experimental results demonstrated that the proposed strategy improves the converter efficiency for all power ranges, especially at light loads.
TL;DR: The disturbance and unbalance mechanisms of capacitor voltages in MMC system under CPS-PWM are theoretically revealed and solved, and a novel capacitor voltage balancing method is proposed that is highly efficient for different working conditions of MMC, and is easy to be designed/realized.
Abstract: The modular multilevel converter (MMC) is an attractive converter topology for medium-/high-voltage applications. The voltage balancing for floating capacitors of submodules in MMC under carrier-phase-shift pulsewidth modulation (CPS-PWM), is an important research focus. However, the existing capacitor voltage balancing methods under this modulation mode have limited robustness and may not be applied to different working conditions. In this article, the disturbance and unbalance mechanisms of capacitor voltages in MMC system under CPS-PWM are theoretically revealed and solved. The disturbance metrics for capacitor voltage are extracted by using a proposed asynchronized sampling mode. Based on the characteristics of the extracted disturbances in nonsynchronized sampling mode, a novel capacitor voltage balancing method is proposed. The proposed balancing method is highly efficient for different working conditions of MMC, and is easy to be designed/realized. Finally, a flexible mission-profile emulator for the test of MMC is designed and built, with comprehensive validations to verify the effectiveness of the proposed capacitor balancing method under different operating conditions of MMC.
TL;DR: Comparing with those existing q-axis current injection methods and modified space vector pulse width modulation technologies, the proposed control scheme could eliminate the torque ripple and THD at the same time and thus possess the better performances.
Abstract: Open-winding permanent magnet synchronous machine (OW-PMSM) could obtain the higher bus voltage utilization and more robustness against the component damage and faults. However, the additional torque ripples and total harmonic distortion (THD) caused by zero-sequence current would limit the further applications of OW-PMSM. In this article, a novel model predictive two-target current control (MPTCC) scheme is presented to deal with such problem through model predictive control concept. First, a basic model predictive current control is proposed to deal with the torque production in fundamental components. Then, another modified cost function is proposed to provide more precise voltage vectors in torque production. After that, the deadbeat predictive control concept is proposed to calculate the required voltage vectors in zero-sequence loop. This zero-sequence voltage is injected in the voltage vectors, which are responsible for torque production. It needs to be mentioned that the limitation of inverter is analyzed. And the real-time judgment is proposed to assess the performance of MPTCC in some work conditions. Finally, both simulation and experiments have been both applied to assess the performances of the proposed control scheme. Comparing with those existing q -axis current injection methods and modified space vector pulse width modulation (SVPWM) technologies, the proposed control scheme could eliminate the torque ripple and THD at the same time and thus possess the better performances.
TL;DR: In this paper, the effect of the magnetic induction, continuous phase flow rate, duty cycle, and applied frequency on the generation frequency and drop diameter was investigated under the PWM magnetic field and compared with those under the DC magnetic field.
Abstract: Micro-magnetofluidics offers a promising tool to regulate the drop formation process with versatile applications in engineering and biomedicine. In the present study, on-demand ferrofluid drop generation at a T-junction is investigated utilizing a magnetic pulse. Also, a novel method for ferrofluid droplet formation is introduced using a non-uniform Pulse-Width Modulation (PWM) magnetic field. A novel mechanism of drop generation named “beating regime” was seen for the first time in which the ferrofluid moves back and forth before the breakup. The effect of the magnetic induction, continuous phase flow rate, duty cycle, and applied frequency on the generation frequency and drop diameter was investigated under the PWM magnetic field and compared with those under the DC magnetic field. The results showed that greater values of drop diameter and generation frequency are obtained either when the magnetic induction and/or duty cycle increases or when the applied frequency decreases. The regime maps of ferrofluid droplet formation were presented for different magnetic Bond and Capillary numbers under both PWM and DC magnetic fields and compared with each other. Finally, a correlation was presented to estimate the dimensionless drop diameter on the basis of four nondimensionalized parameters, showing a 7.2 % average relative error.
TL;DR: A novel interleaved parallel bidirectional DAB converter with extended phase shift can reduce the reactive power and current stress, and the pulsewidth modulation (PWM) plus single phase-shift (PWMSPS) can achieve more than twice of the maximum transmission power of conventional Dab converter.
Abstract: Although conventional dual-active-bridge (DAB) dc–dc converters have been applied in more-electric aircraft, the maximum transmission power of conventional DAB converters is still limited by its structure. In order to increase the maximum transmission power, this article proposes a novel interleaved parallel bidirectional DAB converter. Two bidirectional buck/boost converters are applied in low-voltage side of the proposed converter. So the voltage of transformer primary side would not be limited by the voltage of low-voltage bus and can be controlled by the duty cycle according to the modulation strategies. In this article, three phase-shift control methods are used for the proposed topology. From the analysis of operation modes and power characteristics of the proposed topology, compared with the single phase-shift (SPS), the extended phase shift can reduce the reactive power and current stress. The pulsewidth modulation (PWM) plus single phase-shift (PWMSPS) can achieve more than twice of the maximum transmission power of conventional DAB converter. Finally, test results verify the theoretical analysis and the validity of the proposed converter.
TL;DR: In this paper, a sawtooth carrier-based PWM (SCPWM) technique was proposed to reduce common-mode voltage (CMV) in both the peak-to-peak amplitude and the changing frequency.
Abstract: The increased phase number of multiphase systems enables us to exploit more degrees of freedom, such as the shape of phase carriers in pulsewidth modulation (PWM) The sawtooth carrier-based PWM (SCPWM) techniques are proposed in this article to reduce common-mode voltage (CMV) in both the peak-to-peak amplitude and the changing frequency, and it can be easily extended to symmetrical multiphase two-level inverters with any odd phase number Theoretical analysis reveals that the switching between mirror-symmetrical carriers within one phase narrows the range of the sum of switching states in all phases, which leads to the reduction of CMV amplitude Meanwhile, the overlapping of sawtooth carriers’ straight edges among different phases slows down the change of the sum of switching states, which results in the decrease of CMV changing frequency Moreover, the effects of voltage harmonics injection and switches’ dead-time settings on the CMV reduction performance under the proposed SCPWM techniques are investigated Finally, the experiment results in a five-phase induction machine and multiphase RL loads verify the improved CMV performance and the extensibility of the proposed SCPWM methods
TL;DR: A nonsymmetrical selective harmonic elimination (SHE) formulation is adopted to further extend the output voltage range with a good harmonic profile under fault conditions and the performance of the proposed method is evaluated experimentally on a seven-level CHB motor drive.
Abstract: This article proposes a new fault-tolerant technique to increase the maximum balanced line-to-line output voltage of the cascaded H-bridge (CHB) motor drives. The CHB converters have been widely used for medium-voltage motor drives due to their scalability and reliability features. A significant indicator of the reliability is the maximum balanced line-to-line voltage amplitude under fault conditions. This article adopts a nonsymmetrical selective harmonic elimination (SHE) formulation to further extend the output voltage range with a good harmonic profile under fault conditions. The dc current component can be regulated for the dynamic braking operation. Based on the nonsymmetrical SHE formulation, the fault-tolerant problem that achieves the maximum output voltage range and good harmonic profile is converted to an optimization problem, which can be solved by the proposed optimization framework. By properly selecting the output voltage waveforms, the entire converter voltage capability can be achieved under fault conditions with a good harmonic profile. The performance of the proposed method is evaluated experimentally on a seven-level CHB motor drive.
13 Oct 2021
TL;DR: In this paper, the performance of the five-level boosted ANPC inverter is compared using four distinct unipolar PWM techniques: unipolar sine PWM, unipolar 60◦ PWM and unipolar third harmonic injection (THI) PWM.
Abstract: In the electric vehicle industry, multilevel inverters (MLIs) are widely used for power conversion in high-power-medium-voltage propulsion drives. The five-level ANPC topology with voltage boosting capability is a promising MLI topology for single-stage solar photovoltaic power conversion. The switching pulses for the MLIs are generated using various PWM techniques. The performance of the five-level boosted ANPC inverter is compared using four distinct unipolar PWM techniques: unipolar sine PWM, unipolar 60◦ PWM, unipolar third harmonic injection (THI) PWM, and unipolar zero sequence injection (ZSI) PWM. The performance of these PWM schemes are tested on real-time OPAL-RT platform. Under unipolar THI PWM, the 5L-boosted ANPC outperforms in terms of %THD reduction and higher fundamental output voltage magnitude. Furthermore, the ZSI PWM balances the neutral point potential efficiently.