Showing papers on "Voltage drop published in 2014"

Instability of Wind Turbine Converters During Current Injection to Low Voltage Grid Faults and PLL Frequency Based Stability Solution

Abstract: In recent grid codes for wind power integration, wind turbines are required to stay connected during grid faults even when the grid voltage drops down to zero; and also to inject reactive current in proportion to the voltage drop. However, a physical fact, instability of grid-connected converters during current injection to very low (close to zero) voltage faults, has been omitted, i.e., failed to be noticed in the previous wind power studies and grid code revisions. In this paper, the instability of grid side converters of wind turbines defined as loss of synchronism (LOS), where the wind turbines lose synchronism with the grid fundamental frequency (e.g., 50 Hz) during very deep voltage sags, is explored with its theory, analyzed and a novel stability solution based on PLL frequency is proposed; and both are verified with power system simulations and by experiments on a grid-connected converter setup.

A Micro Inertial Energy Harvesting Platform With Self-Supplied Power Management Circuit for Autonomous Wireless Sensor Nodes

Abstract: A 025 cm 3 autonomous energy harvesting micro-platform is realized to efficiently scavenge, rectify and store ambient vibration energy with batteryless cold start-up and zero sleep-mode power consumption The fabricated compact system integrates a high-performance vacuum-packaged piezoelectric MEMS energy harvester with a power management IC and surface-mount components including an ultra-capacitor The power management circuit incorporates a rectification stage with ~30 mV voltage drop, a bias-Ωip stage with a novel control system for increased harvesting efficiency, a trickle charger for permanent storage of harvested energy, and a low power supply-independent bias circuitry The overall system weighs less than 06 grams, does not require a precharged battery, and has power consumption of 05 μW in active-mode and 10 pW in sleep-mode operation While excited with 1 g vibration, the platform is tested to charge an initially depleted 70 mF ultra-capacitor to 185 V in 50 minutes (at 155 Hz vibration), and a 20 mF ultra-capacitor to 135 V in 75 min (at 419 Hz) The end-to-end rectification efficiency from the harvester to the ultra-capacitor is measured as 58-86% The system can harvest from a minimum vibration level of 01 g

Voltage-Source Control of PV Inverter in a CERTS Microgrid

Abstract: Microgrids are highly compatible with photovoltaic (PV) sources because of their ability to internally aggregate and balance multiple renewable sources. Traditional grid-connected PV inverter control configurations are basically current sourced and cannot easily control ac voltage or frequency. The PV inverter using the Consortium for Electric Reliability Technology Solutions (CERTS) concepts can control ac voltage and frequency but have a major problem with load transients. During a load transient, the PV microsource becomes overloaded with the possibility of collapsing the dc bus voltage resulting in an ac voltage drop. This paper presents a PV inverter control strategy which enables PV to behave as a voltage source and is capable of maintaining dc bus voltage stability during load transient. With this PV inverter control configuration, it is shown that the PV microsource can operate as a voltage source in the CERTS microgrid.

A Simple and Direct Dead-Time Effect Compensation Scheme in PWM-VSI

Abstract: This paper presents the direct compensation of the switching interval error of the effective voltage vectors by the dead time of a pulsewidth modulation voltage source inverter (PWM-VSI). The output voltages of a three-phase PWM-VSI are distorted and have voltage errors from the dead time to avoid the shoot-through of inverter arms and the time delay of the gate drive. Voltage distortion increases the harmonics of the output voltages and decreases control performance. This paper presents a simple and direct compensation technique to solve this problem in a three-phase VSI. The practical switching output voltages are determined by the dc-link voltage, the switching signals of each phase, the dead time, the time delay, and the current polarities of each phase. For these reasons, output voltage errors are not constant. In order to analyze the dead-time effect in the actual switching voltages of each phase, the practical switching voltages in a sampling period of a space vector PWM (SVPWM) method are calculated according to the current polarity. In the calculation, the dead time, the time delay of devices, and the voltage drops on power devices are included to consider nonlinear voltage distortion. From these practical switching voltages during the switching intervals in a sampling period, the average output voltages of each phase can be derived, and the output voltage errors between the voltage commands and the average output voltages of each phase are obtained. The SVPWM switching intervals of each phase can be derived by the average output voltages that are calculated according to the current polarity and nonlinear voltage distortion to compensate for the output voltage errors. With the simple detection of the current polarity, the practical errors of the switching intervals of each phase can be compensated by the addition of the compensated switching time. Simulation and experimental results validating the proposed compensation method are presented in this paper.

Impact of Parasitic Elements on the Spurious Triggering Pulse in Synchronous Buck Converter

Abstract: This paper derives a circuit-level analytical model for describing the mechanism of the spurious triggering pulse in the gate-source voltage of the synchronous MOSFET (SyncFET) in the synchronous buck converter. The model takes into account not only the parasitic capacitances and inductances of the control MOSFET (CtrlFET) and the SyncFET, but also the reverse recovery characteristics of the body diode of the SyncFET. An exhaustive investigation into the impact of all these factors on the spurious triggering pulse is conducted. The spurious triggering pulse can be attributed to two factors. The first one is the positive gate voltage caused by the displacement current through the gate-drain capacitance of the SyncFET, due to the increase in the drain-source voltage. The second one is the negative source voltage caused by the voltage drop across the source inductance of the SyncFET, due to the decrease in the drain current. It is discovered that the gate impedance of the SyncFET would exert different influence on the magnitude of the spurious triggering pulse, depending on the contributions of these two factors. Experimental results affirm that variation in the magnitude of the spurious triggering pulse with each parasitic element can be correctly inferred by the proposed model. Design guidelines for enhancing spurious turn-on immunity are advanced.

Real-time scheduling of electric vehicles charging in low-voltage residential distribution systems to minimise power losses and improve voltage profile

Abstract: Unscheduled charging of plenty of electric vehicles (EVs) might exert an adverse effect on the existing power grid, especially when the charging coincides with daily peak load at distribution level. In this study, a scalable real-time scheduling scheme for EV charging in low-voltage residential distribution system is proposed. Since most often, voltage drop would become a binding constraint when a distribution feeder is subject to a high EV penetration level, a scheduling method is first developed to increase the voltage safety margin. Then, a novel factor is derived to allow the scheduling to shift from voltage-safety-oriented to loss-minimisation-oriented, or vice versa, on demand of the EV penetration level. A number of charging scenarios were simulated to evaluate the proposed scheduling scheme. Simulation results verified that the proposed scheduling scheme is fast and efficient with circuit losses close to optimal at a low EV penetration level and voltage drops maintained within the tolerable limit at a high EV penetration level. The high scalability and effectiveness of the proposed scheme has made it suitable for coordinating large number of EV charging activities in real-time.

Enhanced Voltage Drop Control by VSC–HVDC Systems for Improving Wind Farm Fault Ridethrough Capability

Abstract: This paper presents a new control approach for enhancing the fault ridethrough capability of wind farms connected to the grid through a voltage-source-converter-based high-voltage dc transmission line. A controlled voltage drop in the wind farm collector grid is initiated upon the occurrence of fault in the high-voltage grid in order to achieve fast power reduction. In the process, a dc voltage of defined magnitude and duration is injected by the sending-end converter together with the voltage reduction to suppress the dc component of the short-circuit current arising from the voltage reduction. As a result, the electrical and mechanical stress on the wind turbines, especially on the DFIG-based units and their converters, are mitigated. Using a test network, the improvement in the fault ridethrough capability of the system that can be achieved by employing the proposed method has been demonstrated.

Randomized PHEV Charging Under Distribution Grid Constraints

Abstract: Plug-in Hybrid Electrical Vehicles (PHEV) are promising to improve energy efficiency and environment friendliness. However, without proper control, their charging will cause harmful impact on the power distribution grid, including load congestion and voltage drop. Instead of using centralized optimization which may need accurate predictions on key parameters, in this paper, a new decentralized random access framework is introduced to schedule the PHEV charging. The proposed distributed solution does not need accurate predictions and can be executed online. Simulation on a semi-urban residential medium voltage grid shows that our algorithm can effectively provide demand response to protect the distribution grid from bus congestion and voltage drop, and also improve its efficiency. Most importantly, this algorithm is simple to deploy.

Power conversion device

Abstract: There is provided an inverter (1) to be applied to a dispersed generation system (10) to interconnect with a system bus (7), which measures a system voltage (Vr) of the system bus (7), detects a voltage drop of the system bus (7), based on the measured system voltage (Vr), increases a frequency of a carrier wave when the voltage drop is detected, generates a signal wave to control an output current (Iiv) of the inverter (1), compares the carrier wave with the signal wave, generates a gate signal (Gt), and performs power conversion by PWM control, based on the generated gate signal (Gt).

Numerical Analysis of Breakdown Voltage Enhancement in AlGaN/GaN HEMTs With a High- $k$ Passivation Layer

Abstract: 2-D analysis of breakdown characteristics in AlGaN/GaN high electron mobility transistors (HEMTs) is performed by considering a deep donor and a deep acceptor in a buffer layer. The dependence of the OFF-state breakdown voltage on the relative permittivity of the passivation layer er and the thickness of the passivation layer d are studied. It is shown that as er increases, the OFF-state breakdown voltage increases. This is because the electric field at the drain edge of the gate is weakened as er increases. This occurs because in the insulator the applied voltage tends to drop uniformly in general, and hence when the insulator is attached to the semiconductor, the voltage drop along the semiconductor becomes smoother at the drain edge of the gate if the er of the insulator is higher. It is also shown that the OFF-state breakdown voltage increases as d increases because the electric field at the drain edge of the gate is weakened as d increases. It is concluded that AlGaN/GaN HEMTs with a high- k and thick passivation layer should have high breakdown voltages.

Ion flux asymmetry in radiofrequency capacitively-coupled plasmas excited by sawtooth-like waveforms

Abstract: Using particle-in-cell simulations, we predict that it is possible to obtain a significant difference between the ion flux to the powered electrode and that to the grounded electrode—with about 50% higher ion flux on one electrode—in a geometrically symmetric, radiofrequency capacitively-coupled plasma reactor by applying a non-sinusoidal, ‘Tailored’ voltage waveform. This sawtooth-like waveform presents different rising and falling slopes over one cycle. We show that this effect is due to differing plasma sheath motion in front of each electrode, which induces a higher ionization rate in front of the electrode which has the fastest positive rising voltage. Together with the higher ion flux comes a lower voltage drop across the sheath, and therefore a reduced maximum ion bombardment energy; a result in contrast to typical process control mechanisms.

Distributed adaptive droop control for DC microgrids

Abstract: Conventional droop controls have been widely studied for load sharing in dc Microgrids. However, unlike ac Microgrids, transmission line impedances can undermine the controller's performance, and it might fail to provide regulated rated voltage and proportional load sharing. Herein, a distributed secondary controller is introduced that includes two modules; a voltage regulator and a current regulator. A sparse cyber network is also spanned through the converters for data exchange wherein, each converter is in contact with a few others as its neighbors. A cooperative algorithm is introduced and used in a voltage observer that estimates the average voltage across the Microgrid. This estimation is further used in the voltage regulator to locally adjust the voltage set point, compensating the voltage drop caused by the droop mechanism. Simultaneously, the current regulator compares local per-unit current with the neighbors' per-unit currents and, accordingly, adjusts the droop virtual impedance to balance the per-unit supplied currents. Thus, the voltage and current regulators together provide the best choice of voltage set point and virtual impedance that leads to the global voltage regulation and tight load sharing. Simulation studies on a low-voltage dc Microgrid verify the performance of the proposed control methodology.

Voltage compensated active cell balancing

Abstract: A monitoring device includes an input terminal configured to receive an input signal from a battery system management (BSM); an output terminal configured to output cell parameters used to determine an open cell voltage associated with one of a plurality of cells within the battery stack connected to the monitoring circuit based on the input signal received from the BSM; a processor; and a memory storing executable instructions for causing the processor to: measure a cell voltage associated with the one of the plurality of cells within the battery stack; measure a voltage drop associated with a measured balancing current; calculate the open cell voltage by adjusting the measured cell voltage based on the measured voltage drop; and balance the battery stack based on the calculated open cell voltage, wherein balancing and calculating the open cell voltage are performed concurrently.

Power conversion system

Abstract: In a power conversion system in which one or more converter cells are connected in series to form an arm for each phase, a control device includes a voltage command generating unit for generating a positive arm voltage command and a negative arm voltage command for each phase The voltage command generating unit includes an AC current control unit, a circulating current control unit, and a command distributing unit On the basis of inputted voltage commands, the command distributing unit subtracts voltage drop portions due to inductance values in the arms from respective voltages assigned as outputs of the positive arm and the negative arm, to distribute voltage components, thereby determining the positive arm voltage command and the negative arm voltage command

Line Loss Minimization in Isolated Substations and Multiple Loop Distribution Systems Using the UPFC

Abstract: This paper presents the line loss minimum condition in isolated substations and same substation multiple loop distribution systems by using the unified power flow controller (UPFC). In each case, the mathematical model is presented and the line loss minimum conditions are obtained based on the line parameters of the distribution feeders. Since multiple loop distribution system is fed from same substation, the line loss minimization can be achieved by compensating the summation of the line reactance voltage drop. In an isolated substation loop distribution system, the line loss minimization can be achieved by compensating the summation of the line reactance voltage drop in addition to the voltage difference of the substations. Realization of both cases can be achieved if the loop current is eliminated from the loop system. The series compensation technique applied by the UPFC is used to eliminate the loop current from the loop distribution system and hence minimize the total line loss. The effectiveness of the proposed control schemes of the UPFC have been verified experimentally.

The Intensification Technologies to Water Electrolysis for Hydrogen Production — A Review

Abstract: Water electrolysis derived by renewable energy such as solar energy and wind energy is a sustainable method for hydrogen production due to high purity, simple and green process. One of the challenges is to reduce energy consumption of water electrolysis for large-scale application in future. Cell voltage, an important criterion of energy consumption, consists of theoretical decomposition voltage (U-theta), ohmic voltage drop (i*Sigma R) and reaction overpotential (eta). The kinetic and thermodynamic roots of high cell voltage are analyzed systemically in this review. During water electrolysis, bubble coverage on electrode surface and bubble dispersion in electrolyte, namely bubble effect, result in high ohmic voltage drop and large reaction overpotential. Bubble effect is one of the most key factors for high energy consumption. Based on the theoretical analysis, we summarize and divide recent intensification technologies of water electrolysis into three categories: external field, new electrolyte composition and new thermodynamic reaction system. The fundamentals and development of these intensification technologies are discussed and reviewed. Reaction overpotential and ohmic voltage drop are improved kinetically by external field or new electrolyte composition. The thermodynamic decomposition voltage of water is also reduced by new reaction systems such as solid oxide electrolysis cell (SOEC) and carbon assisted water electrolysis (CAWE). (C) 2013 Elsevier Ltd. All rights reserved.

Research Update: Molecular electronics: The single-molecule switch and transistor

Abstract: In order to design and realize single-molecule devices it is essential to have a good understanding of the properties of an individual molecule. For electronic applications, the most important property of a molecule is its conductance. Here we show how a single octanethiol molecule can be connected to macroscopic leads and how the transport properties of the molecule can be measured. Based on this knowledge we have realized two single-molecule devices: a molecular switch and a molecular transistor. The switch can be opened and closed at will by carefully adjusting the separation between the electrical contacts and the voltage drop across the contacts. This single-molecular switch operates in a broad temperature range from cryogenic temperatures all the way up to room temperature. Via mechanical gating, i.e., compressing or stretching of the octanethiol molecule, by varying the contact's interspace, we are able to systematically adjust the conductance of the electrode-octanethiol-electrode junction. This two-terminal single-molecule transistor is very robust, but the amplification factor is rather limited.

New Voltage-Programmed AMOLED Pixel Circuit to Compensate for Nonuniform Electrical Characteristics of LTPS TFTs and Voltage Drop in Power Line

Abstract: This paper presents a simple pixel structure that uses the voltage-programmed method to compensate for the electrical characteristic variations in low-temperature polycrystalline-silicon thin-film transistors and the current-resistance ( \(I\) – \(R\) ) voltage drop in the power line for active-matrix organic light-emitting diode displays. Based on the experimental results, the functionality of the pixel circuit can be operated correctly during each operation phase. Moreover, the pixel current exhibits high uniformity against the threshold voltage and mobility variations in the driving TFT.

Capacitor Clamped Current-Sharing Circuit for Multistring LEDs

Abstract: This paper proposes a simple capacitor clamped current-sharing circuit including linear and loop types according to the connection of capacitors for multistring light-emitting diodes (LEDs). The proposed circuit employs interleaved turn-on switches and multicapacitor charge conservation to solve the current imbalance problem caused by voltage drop tolerance and the negative temperature coefficient of LEDs. The operating principle and parameter design of the topologies are analyzed in detail. Based on this analysis, a three-string current-sharing topology has been validated by experiments. Experimental waveforms show that the proposed circuit does not only have good effect on current sharing while the effect is not affected by individual LED short but also has the advantages of low voltage stress, nonmagnetic components, ease of integration, and simple control.

Simultaneous online estimation of junction temperature and current of IGBTs using emitter-auxiliary emitter parasitic inductance

Abstract: A novel method is presented for online estimation of the junction temperature (Tj) of semiconductor chips in IGBT modules, based on the voltage drop (VEE') across the parasitic inductor that exists between the main emitter (E) and auxiliary emitter (E) terminals. The peak amplitude of the voltage drop (VEE') was found to depend on the junction temperature at a known current and DC link voltage. Also, the collector current can be estimated simultaneously, by integrating VEE' without the use of any additional sensors. Measurement circuits were implemented to estimate Tj and the current, and their results are discussed. The results of these measurement circuits when implemented in a real power electronic (PE) converter to estimate Tj and current in real time are also presented. This method opens up a full set of new opportunities for engineers and designers to better understand the behavior and performance of high power modules in real PE applications.

Modeling and simulation of termination resistances in superconducting cables

Abstract: We address the problem of modeling termination resistances which are largely responsible for the uneven distribution of currents in superconducting cables. For such purpose we present three dc models. In a first model a 0D circuit-like approach considering a continuous E–J relationship is presented. A second model uses the 2D H-formulation of Maxwell's equations, with a new contribution to the electric field term that takes into account the voltage drop due to termination resistances. A third model, based on the 3D H-formulation of Maxwell's equations, uses a novel technique to simulate both the termination resistances and the superconducting cable within a compact framework that calculates both contributions using two non-connected domains. Advantages and disadvantages of each model are discussed. Particular applications for which a given model is best fitted are also considered. The models' predictions are in good agreement with experimental results for a stacked-tape cable composed of 4 HTS tapes. Overall, this work presents a palette of three different numerical tools for calculating the current distribution in cables composed of multiples tapes, where the termination resistance is also taken into account. The choice of one model over another depends on the particular application and on the degree of precision needed.

Device and method for achieving external dynamic compensation for display screen active area direct-current voltage drop

Abstract: The invention discloses a device and method for achieving external dynamic compensation for display screen active area direct-current voltage drop. The device comprises an input signal comparator, a processor and a voltage signal modulating device. The input signal comparator is used for detecting current or voltage consumption of a current display frame on an ELVDD bus in real time, the detected current or voltage consumption is converted into digital signals which are output to the processor. The processor compares the received digital signals with the stored current or voltage consumption reference value of the current display frame in reference data information, a current or voltage compensation value which needs to conduct compensation on the current display frame is obtained, and the current or voltage compensation value is output to the voltage signal modulating device in a digital mode. The voltage signal modulating device generates an analog-form compensation voltage according to the received current or voltage compensation value and then feeds the compensation voltage back to an ELVDD lead, and the voltage is applied to each pixel unit through an ELVDD bus in an active area, so that external dynamic compensation for the display screen active area direct-current voltage drop is achieved.

Proton Exchange Membrane Fuel Cell Operation and Degradation in Short-Circuit

Abstract: This paper presents an experimental study dealing with operation and degradation during an electrical short circuit of a proton exchange membrane fuel cell stack. The physical quantities in the fuel cell (electrical voltage and current, gas stoichiometry, pressures, temperatures and gas humidity) are studied before, during and after the failure. After a short circuit occurs, a high peak of current appears but decreases to stabilize in a much lower value. The voltage drops in all the cells and even some cells presents reversal potentials. The degradation is quantified by using electrochemical impedance spectroscopy.

Voltage monitoring circuit, test method therefor, and voltage monitoring system

Abstract: A voltage monitoring circuit includes a plurality of voltage input terminals which input a voltage across each of a plurality of series-coupled battery cells, a selection circuit which, by selecting two of the voltage input terminals, selects a voltage across one of the battery cells, an A/D converter which converts the voltage across the battery cell into a digital value, a control unit which sends the digital value to an external controller, a ground wiring which is coupled to a ground terminal for inputting a ground level voltage for the voltage monitoring circuit, the ground terminal being among the voltage input terminals, and through which the voltage monitoring circuit is supplied with the ground level voltage, a terminal which is supplied with a lowest fixed potential, and a switch circuit which is coupled between the first terminal and the ground wiring.

A Voltage-Based Leakage Current Calculation Scheme and its Application to Nanoscale MOSFET and FinFET Standard-Cell Designs

Abstract: Logic-level estimators of leakage currents, in nanoscale standard-cell-based designs, are relevant for the dramatic speed advantage with respect to analog SPICE-level simulation. We propose a novel logic-level leakage estimation model based on the characterization of voltages at the internal nodes of digital cells, in conjunction with the characterization of leakage currents in a single field-effect transistor (FET) device and with the input-dependent Kirchhoff current law expression of the total current in the cell topology. The voltage-based nature of the approach simplifies the inclusion of supply voltage variation/scaling impact, as well as of output voltage drop (loading effect), on leakage currents. The method has been implemented in hardware description language models of a complete cell library. Exhaustive tests report average accuracy below 1% error in 22-nm CMOS and 20-nm FinFET technologies, when compared with SPICE BSIM simulation results.

Molecular electronics: the single-molecule switch and transistor

Abstract: In order to design and realize single-molecule devices it is essential to have a good understanding of the properties of an individual molecule. For electronic applications, the most important property of a molecule is its conductance. Here we show how a single octanethiol molecule can be connected to macroscopic leads and how the transport properties of the molecule can be measured. Based on this knowledge we have realized two single-molecule devices: a molecular switch and a molecular transistor. The switch can be opened and closed at will by carefully adjusting the separation between the electrical contacts and the voltage drop across the contacts. This single-molecular switch operates in a broad temperature range from cryogenic temperatures all the way up to room temperature. Via mechanical gating, i.e., compressing or stretching of the octanethiol molecule, by varying the contact's interspace, we are able to systematically adjust the conductance of the electrode-octanethiol-electrode junction. This two-terminal single-molecule transistor is very robust, but the amplification factor is rather limited.