Showing papers on "Voltage regulator published in 2002"

Thyristor-Based Facts Controllers for Electrical Transmission Systems

Abstract: 1. Introduction. 1.1 Background. 1.2 Electrical Transmission Networks. 1.3 Conventional Control Mechanisms. 1.4 Flexible ac Transmission Systems (FACTS). 1.5 Emerging Transmission Networks. 2. Reactor--Power Control in Electrical Power Transmission Systems. 2.1 Reacrive Power. 2.2 Uncompensated Transmission Lines. 2.3 Passive Compensation. 2.4 Summary. 3. Principles of Conventional Reactive--Power Compensators. 3.1 Introduction. 3.2 Synchronous Condensers. 3.3 The Saturated Reactor (SR). 3.4 The Thyristor--Controlled Reactor (TCR). 3.5 The Thyristor--Controlled Transformer (TCT). 3.6 The Fixed Capacitor--Thyristor--Controlled Reactor (FC--TCR). 3.7 The Mechanically Switched Capacitor--Thristor--Controlled Reactor (MSC--TCR). 3.8 The Thyristor--Switched capacitor and Reactor. 3.9 The Thyristor--Switched capacitor--Thyristor--Controlled Reactor (TSC--TCR). 3.10 A Comparison of Different SVCs. 3.11 Summary. 4. SVC Control Components and Models. 4.1 Introduction 4.2 Measurement Systems. 4.3 The Voltage Regulator. 4.4 Gate--Pulse Generation. 4.5 The Synchronizing System. 4.6 Additional Control and Protection Functions. 4.7 Modeling of SVC for Power--System Studies. 4.8 Summary. 5. Conceepts of SVC Voltage Control. 5.1 Introduction 5.2 Voltage Control. 5.3 Effect of Network Resonances on the Controller Response. 5.4 The 2nd Harmonic Interaction Between the SVC and ac Network. 5.5 Application of the SVC to Series--Compensated ac Systems. 5.6 3rd Harmonic Distortion. 5.7 Voltage--Controlled Design Studies. 5.8 Summary. 6. Applications. 6.1 Introduction. 6.2 Increase in Steady--State Power--Transfer Capacity. 6.3 Enhancement of Transient Stability. 6.4 Augmentation of Power--System Damping. 6.5 SVC Mitigation of Subsychronous Resonance (SSR). 6.6 Prevention of Voltage Instability. 6.7 Improvement of HVDC Link Performance. 6.8 Summary. 7. The Thyristor--Controlled SeriesCapacitor (TCSC). 7.1 Series Compensation. 7.2 The TCSC Controller. 7.3 Operation of the TCSC. 7.4 The TSSC. 7.5 Analysis of the TCSC. 7.6 Capability Characteristics. 7.7 Harmonic Performance. 7.8 Losses. 7.9 Response of the TCSC. 7.10 Modeling of the TCSC. 7.11 Summary. 8. TCSC Applications. 8.1 Introduction. 8.2 Open--Loop Control. 8.3 Closed--Loop Control. 8.4 Improvement of the System--Stability Limit. 8.5 Enhancement of System Damping. 8.6 Subsynchronous Resonanace (SSR) Mitigation. 8.7 Voltage--Collapse Prevention. 8.8 TCSC Installations. 8.9 Summary. 9. Coordination of FACTS Controllers. 9.1 Introduction 9.2 Controller Interactions. 9.3 SVC--SVC Interaction. 9.4 SVC--HVDC Interaction. 9.5 SVC--TCSC Interaction. 9.6 TCSC--TCSC Interaction. 9.7 Performance Criteria for Damping--Controller Design. 9.8 Coordination of Multiple Controllers Using Linear--Control Techniques. 9.9 Coordination of Multiple Controllers using Nonlinear--Control Techniques. 9.10 Summary. 10. Emerging FACTS Controllers. 10.1 Introduction. 10.2 The STATCOM. 10.3 THE SSSC. 10.4 The UPFC. 10.5 Comparative Evaluation of Different FACTS Controllers. 10.6 Future Direction of FACTS Technology. 10.7 Summary. Appendix A. Design of an SVC Voltage Regulator. A.1 Study System. A.2 Method of System Gain. A.3 Elgen Value Analysis. A.4 Simulator Studies. A.5 A Comparison of Physical Simulator results With Analytical and Digital Simulator Results Using Linearized Models. Appendix B. Transient--Stability Enhancement in a Midpoint SVC--Compensated SMIB System. Appendix C. Approximate Multimodal decomposition Method for the Design of FACTS Controllers. C.1 Introduction. C.2 Modal Analysis of the ith Swing Mode, C.3 Implications of Different Transfer Functions. C.4 Design of the Damping Controller. Appendix D. FACTS Terms and Definitions. Index.

Factorized power architecture with point of load sine amplitude converters

Abstract: A Factorized Power Architecture (“FPA”) method and apparatus includes a front end power regulator (“PRM) which provides one or more controlled DC bus voltages which are distributed through the system and converted to the desired load voltages using one or more DC voltage transformation modules (“VTMs”) at the point of load. VTMs convert the DC bus voltage to the DC voltage required by the load using a fixed transformation ratio K=V out /V in and with a low output resistance. VTMs exhibit high power density, efficiency and, owing to their inherent simplicity and component utilization, reliability. VTMs may be paralleled and share power without dedicated protocol and control interfaces, supporting scalability and fault tolerance. Feedback may be provided from a feedback controller at the point of load to the front end or to upstream, on-board power regulator modules (“PRMs”) to achieve precise regulation.

Voltage sag detection technique for a dynamic voltage restorer

Abstract: Dynamic voltage restorers (DVRs) are used to protect sensitive loads from the effects of voltage sags on the distribution feeder. This paper presents and verifies a novel voltage sag detection technique for use in conjunction with the main control system of a DVR. In all cases it is necessary for the DVR control system to not only detect the start and end of a voltage sag but also to determine the sag depth and any associated phase shift. The DVR, which is placed in series with a sensitive load, must be able to respond quickly to a voltage sag if end users of sensitive equipment are to experience no voltage sags. A problem arises when fast evaluation of the sag depth and phase shift is required, as this information is normally embedded within the core of a main DVR control scheme and is not readily available to either users monitoring the state of the grid or parallel controllers. Previous research presented an additional controller, which required phase and sag depth information to manipulate the injection voltage vector returned by the main controller in order to prevent the DVR injection transformers from saturating. Typical standard information tracking or detection methods such as the Fourier transform or phase-locked loop (PLL) are too slow in returning this information, when either applied to the injection voltage vector, or to the supply voltages directly. As a result of this the voltage sag detection method in this paper proposes a new matrix method, which is able to compute the phase shift and voltage reduction of the supply voltage much quicker than the Fourier transform or a PLL. The paper also illustrates that the matrix method returns results that can be directly interpreted, whereas other methods such as the wavelet transform return results that can be difficult to interpret.

Compensation of distribution system voltage using DVR

Abstract: A dynamic voltage restorer (DVR) is a power-electronic controller that can protect sensitive loads from disturbances in the supply system. In this paper, it is demonstrated that this device can tightly regulate the voltage at the load terminal against imbalance or harmonic in the source side. The behavior of the device is studied through steady-state analysis, and limits to achievable performance are found. This analysis is extended to the study of transient operation where the generation of the reference voltage of the DVR is discussed. Once the reference signals are generated, they are tracked using a switching band scheme. A suitable structure in which the DVR is realized by voltage-source inverters (VSIs) is also discussed. Particular emphasis to the rating of this device is provided. Extensive simulation results are included to illustrate the operating principles of a DVR.

Coupled-inductor design optimization for fast-response low-voltage DC-DC converters

Abstract: Multiphase voltage regulator modules (VRMs) for microprocessor power delivery with coupled output inductors are discussed. Strong coupling is shown to be feasible and effective at reducing ripple if the correct magnetic topology is used. For more than two phases, this can be a "ladder" core with windings around each rung. Typical ripple reduction is better than a factor of six with no effect on response time. One can also chose to improve response time while still significantly reducing ripple. A simultaneous numerical optimization of the magnetics and the circuit is used to minimize loss in a fast-response 100 A design.

Critical inductance in voltage regulator modules

Abstract: Multichannel interleaving makes it possible to use small inductances to improve voltage regulator modules' (VRMs) transient responses. However, smaller inductances reduce efficiency. Analysis shows that the transient responses are not only determined by the inductances but also the control bandwidths. This paper presents the concept of critical inductance in VRM. Critical inductance is the largest inductance that gives the fastest transient responses. Critical inductance is a good reference for optimal VRM design. Critical inductance is a function of the feedback control, the step current magnitude and the steady-state operating point.

Stability and dynamic performance of current-sharing control for paralleled voltage regulator modules

Abstract: The parallel operation of voltage regulator modules (VRMs) for high-end microprocessors requires a current-sharing (CS) circuit to provide a uniform load distribution among the modules. A good dynamic performance of the CS circuit is very important since the microprocessors present highly dynamic loads to the VRMs. Stability and dynamic performance of the CS control are considered. To assess these issues, a comprehensive small-signal model of the paralleled VRMs was developed and verified.

Voltage and current stress reduction in single-stage power factor correction AC/DC converters with bulk capacitor voltage feedback

Abstract: Single-stage power factor correction (PFC) AC/DC converters integrate a boost-derived input current shaper (ICS) with a flyback or forward DC/DC converter in one single stage. The ICS can be operated in either discontinuous current mode (DCM) or continuous current mode (CCM), while the flyback or forward DC/DC converter is operated in CCM. Almost all single-stage PFC AC/DC converters suffer from high bulk capacitor voltage stress and extra switch current stress. The bulk capacitor voltage feedback with a coupled winding structure is widely used to reduce both the voltage and current stresses in practical single-stage PFC AC/DC converters. This paper presents a detailed analysis of the bulk capacitor voltage feedback, including the relationship between bulk capacitor voltage, input current harmonics, voltage feedback ratio, and load condition. The maximum bulk capacitor voltage appears when the DC/DC converter operates at the boundary between CCM and DCM. This paper also reveals that only the voltage feedback ratio determines the input current harmonics under DCM ICS and CCM DC/DC operation. The theoretical prediction of the bulk capacitor voltage as well as the predicted input harmonic contents is verified experimentally on a 60 W AC/DC converter with universal-line input.

Multi-phase switching regulator

Abstract: An N-phase switching voltage regulator includes N current sensing elements (14, 16, 23, 24) which carry respective phase currents. The voltages present at the switch node sides of the sensing elements are summed and presented to an amplifier (28) which also receives the regulator's output voltage, to produce an output which is proportional to the regulator's total output current Iout. The invention also provides a means for direct insertion of total inductor output current information into a regulator's voltage-mode control loop, to provide active voltage positioning (AVP) for the output voltage. A voltage based on total inductor output current is summed with the regulator's reference voltage; this sum and Vout are applied to the voltage control error amplifier (114), the output of which is processed to operate the regulator's switches (100, 102). This enables the regulator's ouput to have a desired droop impedance and to provide AVP of Vout as a function of total filtered inductor output current I?out(fltr)?.

Vector current controlled voltage source converter-deadbeat control and saturation strategies

Abstract: This paper presents a voltage source converter connected to a grid with software specially designed for limited control voltage. The voltage source converter uses a deadbeat vector current controller. The paper deals with limiting reference voltage, integrator windup and delay time compensation. Simulations and experimental verifications of the proposed controller are included.

Critical inductance in voltage regulator modules

Abstract: Multi-channel interleaving makes it possible to use small inductances to improve voltage regulator module's (VRM's) transient responses. However, smaller inductances reduce efficiency. Analysis shows that the transient responses are not only determined by the inductances but also the control bandwidths. This paper presents the concept of critical inductance in VRM. Critical inductance is the largest inductance that gives the fastest transient responses. Critical inductance is a good reference for the VRM optimal design. Critical inductance is a function of the feedback control, step current magnitude, and steady-state operating point.

Multiterminal LVDC system for optimal acquisition of power in wind-farm using induction generators

Abstract: Optimal wind-power acquisition requires automatic tracking of the optimum wind-turbine speed for the prevailing wind velocity. As the wind velocity keeps changing with time so the wind-turbine must keep adjusting its speed. In a wind-farm, the wind velocities depend on the locations of the wind-turbines, each of which has its optimal turbine speed at any given time. With an eye to costs, the wind-farm of this paper is conceived as operating with cheap induction generators driven by variable-speed wind-turbines, without the expense of speed governors. This paper shows that the voltage-source converters of low voltage direct current (LVDC) transmission systems (which are now commercially available) can be tailored as speed-sensorless drives of the wind-turbine induction generators, while meeting the objective of optimal wind-power acquisition. The LVDC system aggregates the power of many wind-turbine induction-generator units into a DC grid. Then a DC voltage regulator inverts the collected power into a three-phase AC electric utility grid.

Voltage recovery after unbalanced and balanced voltage dips in three-phase systems

Abstract: This paper studies the recovery of the voltage after a voltage dip due to a fault in a three-phase system. The instant of voltage recovery corresponds to the instant of fault clearing. For single-phase and phase-to-phase faults, a single point-on-wave of voltage recovery can be defined. For two-phase-to-ground and three-phase faults, the recovery takes place in two or three steps. The voltage recovery is described in a systematic way by using a classification of three-phase unbalanced voltage dips. The voltage recovery needs to be modeled correctly for studies of equipment immunity against voltage dips.

Design of 48 V Voltage regulator modules with a novel integrated magnetics

Abstract: The push-pull forward topology with the current-doubler and synchronous rectifier is a suitable approach for high-input voltage regulator modules (VRMs) used to supply high-performance microprocessors. In order to improve efficiency and reduce size, this paper proposes an improved push-pull forward converter with a novel integrated magnetics. All the magnetic components including input filter inductor, step-down transformer and output filter inductors are integrated into a single EI or EE core. This topology is essentially the modified push-pull converter with the built-in input filter and the coupled-inductor current doubler rectifier. The proposed integrated magnetic structure features a simple core structure, a small leakage inductance and low winding and core losses. A design is given for a 48-V VRM with a 1.2-V and 70-A output, and its experimental results show that the proposed approach can offer a great improvement in efficiency.

Cancellation of slope compensation effect on current limit

Abstract: A current-mode switching regulator that maintains a substantially constant maximum current limit over a virtually full range of duty cycles is provided. The regulator has a control circuit that includes a buffer circuit, an adjustable voltage clamp circuit, and a slope compensation circuit. The buffer circuit isolates a control signal from capacitive loading associated with control circuit. The threshold level of the adjustable voltage clamp circuit varies with respect to the amount of slope compensation provided to the voltage regulator. This allows a control voltage to increase as slope compensation increases so that a substantially constant maximum current limit is maintained.

Global Transient Stability and Volt age Regulation for Power Systems

Abstract: This paper concerns the global control of power systems. It arises from the practical concern that transient stability and voltage regulation are both important properties of power system control, but they are ascribed to different model descriptions and relate to different stages of system operation (i.e. transient period and post-transient period respectively). Earlier control results deal with the two problems separately, or employ a switching strategy of two different kinds of controllers, which causes a discontinuity of system behavior. We design in this paper a global controller to co-ordinate the transient stabilizer and voltage regulator. The designed controller is smooth and robust with respect to different transient faults. Simulations on a single-machine infinite bus power system have demonstrated better performances compared with existing controllers.

Design considerations for VRM transient response based on the output impedance

Abstract: This paper discusses the transient response of voltage regulator modules (VRMs) based on small-signal models. The concept of constant resistive output impedance design for the VRM is proposed, and its limitation in application is analyzed. The impact of the output filter and the feedback control bandwidth shows that there is an optimum design for the VRM to achieve fast transient response, small size and good efficiency. Simulations and experimental results prove the theoretical analysis.

An efficient digital sliding controller for adaptive power-supply regulation

Abstract: Proposes a digital controller for adaptive power-supply regulation that uses sliding control, which is a widely used technique in switching power supplies for its fast transient response and robust stability. A novel reformulation of the sliding control law enables a simple and power-efficient digital implementation. The reference circuit can be either a delay line or a ring oscillator, and the sensor circuits for both cases are discussed. The prototype chip fabricated in 0.25-/spl mu/m CMOS technology demonstrates a power efficiency of 89% - 95 % over the regulated voltage range of 1.1 - 2.3 V.

Investigation of candidate topologies for 12 V VRM

Abstract: With higher input voltages and lower output voltages, the most popular voltage regulator module (VRM) topology-the multiphase buck converter-operates at very small duty cycles. The influence of duty cycle on the performance of a multiphase buck converter is investigated and the results show that both the transient response and the efficiency suffer from the very small duty cycle. Alternative topologies with extended duty cycles are explored in order to improve the efficiency without comprising the transient response. The topologies under investigation are multiphase tapped-inductor buck converter, multiphase coupled-buck converter and improved multiphase coupled-buck converter with built-in filters.

Static memory cell having independent data holding voltage

Abstract: A static memory cell, composed of cross-coupled MOS transistors having a relatively high threshold voltage, is equipped with MOS transistors for controlling the power supply line voltage of the memory cell. To permit the voltage difference between two data storage nodes in the inactivated memory cell to exceed the voltage difference between the two nodes when write data is applied from a data line pair DL and /DL to the two nodes in the activated memory cell, the power supply line voltage control transistors are turned on to apply a high voltage VCH to the power supply lines after the word line voltage is turned off. The data holding voltage in the memory cell can be activated to a high voltage independent of the data line voltage, and the data holding voltage can be dynamically set so that read and write operations can be performed at high speed with low power consumption.

Multiple energy storage device controller

Abstract: A system for controlling multiple energy storage devices in an uninterruptible power supply (UPS) system is provided. In one embodiment of the invention, the system generally includes a charger coupled to a direct current (DC) bus of the UPS system, and two or more energy storage circuits, each of which includes a power regulator coupled to the charger and coupled to the DC bus, at least one energy storage device coupled to the power regulator, and a processor coupled to the power regulator for controlling the charge and discharge of the at least one energy storage device. In another embodiment of the invention, digital communication between two or more controllers is accomplished over the DC bus through use of the Control Area Network (CAN) protocol.

Low power regulator system and method

Abstract: Methods are disclosed for collecting sensor data in a pressure regulator system including a controller and a plurality of sensors (34, 35, 44, 48, 58). The controller and each of the individual sensors are activated as required to collect sensor data during a sampling period thereby reducing the amount of power consumed by the pressure regulator system. Further power conservation measures are implemented by using a battery sensor to monitor the capacity of the pressure regulator battery and placing the pressure regulator in reduced power consumption operating modes as the capacity of the battery is reduced.

Investigation of topology candidates for 48 V VRM

Abstract: In future applications, it will be impractical for voltage regulator modules (VRMs) to draw power from the 12 V output of the silver box because the voltage bus will be too low to deliver more power. Therefore, distributed power systems (DPSs) with buses of 48 V will be more feasible solutions for future high-end PCs. This paper focuses primarily on the investigation and comparison of 48 V VRM candidates. Six 48 V VRM prototypes are built and compared: the active clamp forward, asymmetrical half bridge, symmetrical half bridge, push-pull, push-pull forward and integrated-filter push-pull forward topologies.

LED lamp apparatus for vehicles

Abstract: In an LED unit, all of eight LEDs are connected in series. The voltage of a power supply, that is, a battery of a vehicle, 12 V, is insufficient for the eight LEDs. To cope with this, a boosting circuit is provided within the control unit to boost the voltage to about 16 V which is then applied to the eight LEDs. The front end of the LED unit is connected to a constant-current circuit, and a voltage detection circuit is provided near and connected to this constant-current circuit for detecting the voltage applied to the constant-current circuit. The voltage detected by the voltage detection circuit is compared with a reference voltage drawn from the power supply, is amplified in an amplifier, and is input as a boosting control signal into the boosting circuit. The boosting control signal is output so as to regulate the boosted voltage in such a manner that the voltage detected in the voltage detection circuit is a lowest possible voltage.

Impact DG on voltage regulation

Abstract: This paper includes the technical impact of distributed generation (DG) on voltage regulation when integrated into a typical distribution system. To study the interaction of DG with voltage regulators and capacitors, computer models were developed and control systems simulated and implemented. Test cases are presented that demonstrate and visualize the impact of DG on voltage regulation and the interaction of DG with voltage regulators and capacitors.

Method and system for providing self-calibration for adaptively adjusting a power supply voltage in a digital processing system

Abstract: A method for providing self-calibration for adaptively adjusting a power supply voltage in a digital processing system is provided that includes providing a nominal power supply voltage to the system as a power supply voltage. A regulator clock signal is propagated through a delay line. The delay line comprises a plurality of delay cells and is operable to function based on the nominal power supply voltage. A plurality of pairs of delay cells are sampled until a first and second delay cell are identified based on the first delay cell receiving the regulator clock signal and the second delay cell failing to receive the regulator clock signal at a specified time. A reference voltage is provided to the system as the power supply voltage. The system is operated using the first and second delay cells to determine whether to adjust the power supply voltage for the system.

Digitally controlled low-harmonic rectifier having fast dynamic responses

Abstract: This paper describes a completely digitally controlled low-harmonic rectifier. It is shown that the dynamics of the outer voltage loop can be significantly improved using a digital notch filter. Low input current harmonics and fast voltage response are experimentally verified using a 200 W universal-input boost power supply operating at the switching frequency of 200 kHz.

Dual-output direct current voltage converter

Abstract: A step-down switching voltage regulator with a push-pull output stage is adapted to provide a voltage converter with an auxiliary voltage rail that supplies an auxiliary voltage that is higher than the input supply voltage. The push-pull output stage of the step-down voltage regulator is used to drive a charge pump voltage-doubler circuit. In this way, a single integrated topology provides a regulated low voltage output as well as an auxiliary high voltage output. The circuit topology enables a low component count resulting in lower component cost and smaller physical size.

LDO Voltage regulator having efficient current frequency compensation

Abstract: A low drop out linear voltage regulator ( 200 ) overcomes the dynamic quiescent current limitation by creating an internal zero that moves in the same direction and has the same amplitude as that of the output pole without sensing a portion of the load current. The low drop out linear voltage regulator ( 200 ) having frequency compensation in accordance with the present invention includes an error amplifier ( 202 ), a NMOS pass transistor ( 204 ), a variable compensation network (C i , 206 ), and a stabilization circuit ( 208, 210 , I 3 , I 4 ). The error amplifier ( 202 ) includes a power supply input connected to a first power supply, a non-inverting input coupled to a reference voltage, a inverting input and an output terminal. The NMOS pass transistor ( 204 ) includes a source connected to an output terminal of the voltage regulator, a drain coupled to the second power supply, and a gate coupled to the output terminal of the error amplifier. The variable compensation network (C i , 206 ) connects to the error amplifier. More particularly, the variable compensation network may include an RC circuit comprising a resistive transistor ( 206 ) and a capacitance (C i ) coupled in series. The stabilization circuit ( 208, 210 , I 3 , I 4 ) couples between the NMOS pass transistor ( 204 ) and the resistive transistor ( 206 ), such that the ratio of the impedance of the NMOS pass transistor ( 204 ) to the impedance of the resistive transistor ( 206 ) is constant.

Pole-zero tracking frequency compensation for low dropout regulator

Abstract: Most low dropout regulators (LDRs) have a limited of load current operating range due to stability problems. This paper proposes a new frequency compensation scheme for LDR to optimize the regulator performance over a wide load current range. By introducing a tracking zero to cancel out the regulator output pole, the frequency response of the feedback loop becomes load current independent. The open-loop DC gain is boosted up by a low frequency dominant pole, which increases the regulator accuracy. To demonstrate the feasibility of the proposed scheme, a LDR utilizing the new frequency compensation scheme is designed and fabricated using the TSMC 0.35/spl mu/m digital CMOS process. Simulation results show that with output current from 0 /spl mu/A to 100 mA, the bandwidth variation is only 2.3 times and the minimum DC gain is 72 dB. Measurement of the dynamic response matches well with simulation.