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Showing papers on "Voltage regulator published in 2003"


Journal ArticleDOI
TL;DR: In this paper, a switch-capacitor (SC) circuit is integrated within a boost converter for a steep step-up of the line voltage, allowing for a boost of the input voltage to high values.
Abstract: A new circuit is proposed for a steep step-up of the line voltage. It integrates a switched-capacitor (SC) circuit within a boost converter. An SC circuit can achieve any voltage ratio, allowing for a boost of the input voltage to high values. It is unregulated to allow for a very high efficiency. The boost stage has a regulation purpose. It can operate at a relatively low duty cycle, thus avoiding diode-reverse recovery problems. The new circuit is not a cascade interconnection of the two power stages; their operation is integrated. The simplicity and robustness of the solution, the possibility of getting higher voltage ratios than cascading boost converters, without using transformers with all their problems, and the good overall efficiency are the benefits of the proposed converter.

439 citations


Journal ArticleDOI
TL;DR: The architecture and IC implementation of a digital PWM (DPWM) generation module, using a ring-oscillator-multiplexer scheme, is discussed and experimental results from a prototype VRM and a partial controller IC implementation are presented.
Abstract: This paper develops the architecture of a digital PWM controller for application in multiphase voltage regulation modules (VRMs). In this context, passive current sharing and VRM transient response with nonzero controller delay are analyzed. A scheme for sensing a combination of the VRM output voltage and output current with a single low-resolution window analog-to-digital converter (ADC) is proposed. The architecture and IC implementation of a digital PWM (DPWM) generation module, using a ring-oscillator-multiplexer scheme, is discussed. Experimental results from a prototype VRM and a partial controller IC implementation are presented.

436 citations


Proceedings ArticleDOI
Woo-Cheol Kwon1, Taewhan Kim2
02 Jun 2003
TL;DR: A voltage allocation technique is proposed which produces a feasible task schedule with optimal processor energy consumption and is extended to include the case in which tasks have non-uniform load (i.e., switched) capacitances, and solve it optimally.
Abstract: This paper presents a set of new important results for the problem of task scheduling and voltage allocation in dynamically variable voltage processor for minimizing the total processor energy consumption. The contributions are two folds: (1) For given multiple discrete supply voltages and tasks with arbitrary arrival-time/deadline constraints, we propose a voltage allocation technique which produces a feasible task schedule with optimal processor energy consumption; (2) We then extend the problem to include the case in which tasks have non-uniform load (i.e., switched) capacitances, and solve it optimally.

189 citations


Journal ArticleDOI
TL;DR: In this paper, the transient response of voltage regulator modules (VRMs) based on the small-signal models is discussed. And the concept of constant resistive output impedance design for the VRM is proposed, and its limitations in applications are analyzed.
Abstract: This paper discusses the transient response of voltage regulator modules (VRMs) based on the small-signal models. The concept of constant resistive output impedance design for the VRM is proposed, and its limitations in applications are analyzed. The impacts of the output filter and the feedback control bandwidth show that there is an optimal design that allows the VRM to achieve fast transient response, small size and good efficiency. Simulations and experimental results prove the theoretical analysis.

187 citations


Patent
27 Jun 2003
TL;DR: In this paper, a method and system for applying addressing voltages to pixels of a display involves receiving input data including an indication of an addressing voltage impulse to be applied to a pixel via an electrode.
Abstract: A method and system for applying addressing voltages to pixels of a display involves receiving input data. The input data includes an indication of an addressing voltage impulse to be applied to a pixel via an electrode. One or more voltage sources are selected, to provide the addressing voltage impulse. The one or more voltage sources each have a pre-selected voltage. The selected one or more voltage sources are electrically connected to an electrode to apply the addressing voltage impulse to the pixel.

163 citations


Proceedings ArticleDOI
23 Jun 2003
TL;DR: In this paper, the authors presented an efficient approach for volt/Var control in radial distribution networks taking DGs performance into consideration, where DGs are modeled as PV nodes and voltage regulators, local controllers, and load tap changer (LTC) are modeled completely and the optimization problem has been solved by using genetic algorithm.
Abstract: As power system in many countries is going to be restructured and deregulated. After deregulation, because of numerous advantageous of distributed generation (DG), the number of this kind of generators are going to be increased. DGs can affect entire system and especially distribution networks. One of the important control schemes at distribution system that DGs can change it is volt/Var control. This paper presents an efficient approach for volt/Var control in radial distribution networks takes DGs performance into consideration. In general distributed generations can be considered as PV or PQ nodes. In this paper DGs are modeled as PV nodes. The goal of this approach is to minimize power losses at distribution system through controlling the tap of load tap changer (LTC), size of substation capacitor, local controller settings and voltage amplitude of DGs. DGs, voltage regulators, local controllers, and load tap changer (LTC) are modeled completely and the optimization problem has been solved by using genetic algorithm. Finally the method is tested on IEEE 34 bus radial distribution feeders.

150 citations


Patent
30 May 2003
TL;DR: In this article, a switching voltage regulator with an inductor driven by at least a power switch for delivering current to an output capacitor having a certain parasitic series resistance, connected between the output node of the regulator and ground and to an electric load eventually connected in parallel to the output capacitor is proposed.
Abstract: The method is for regulating the supply voltage of a load via a switching voltage regulator having an inductor driven by at least a power switch for delivering current to an output capacitor having a certain parasitic series resistance, connected between the output node of the regulator and ground and to an electric load eventually connected in parallel to the output capacitor The method includes establishing a reference voltage, generating a comparison signal as the sum of a first voltage signal proportional to the current circulating in the inductor and of a second voltage signal depending on the difference between the output voltage and the reference voltage and on the first voltage signal The comparison signal is compared with at least a threshold for generating a logic signal that switches between an active state and an inactive state and viceversa each time that the threshold is crossed, and the turn on or the turn off of the switch is controlled as a function of the state of the logic signal

136 citations


Patent
05 Nov 2003
TL;DR: In this paper, a method for retaining stored states in a random access memory device generally comprising the steps of programming a memory cell or an array of memory cells by applying a first voltage to the cells and stabilizing the cells, which is less than the first voltage, is provided.
Abstract: A non-volatile memory device, such as a Programmable Conductor Random Access Memory (PCRAM) device, having an exemplary memory stored state retention characteristic is disclosed. There is provided a method for retaining stored states in a random access memory device generally comprising the steps of programming a memory cell or an array of memory cells by applying a first voltage to the cells and stabilizing the cells by applying a second voltage to the cells, which is less than the first voltage. The second voltage, which acts as a stabilizing voltage, may be a read-out voltage. The second voltage may also be continuously applied to the cells. The second voltage may also be provided as a sweep voltage, a pulse voltage, or a step voltage.

133 citations


Journal ArticleDOI
Peng Xu1, Jia Wei2, Fred C. Lee2
TL;DR: In this article, a novel topology named multiphase coupled-buck converter is proposed, which enables the use of a large duty cycle with recovered leakage energy and clamped MOSFET voltage.
Abstract: The most popular VRM topology-multiphase buck converter operates at a very small duty cycle due to a high input voltage and a low output voltage. The performance of the multiphase buck converter suffers from the very small duty cycle. Alternative topologies with an extended duty cycle are explored in order to improve the efficiency without compromising the transient response. A novel topology named multiphase coupled-buck converter is proposed, which enables the use of a large duty cycle with recovered leakage energy and clamped MOSFET voltage. The input filter is further integrated in the proposed circuit to reduce the number of components. A 12 V-to-1.5 V/50 A VRM prototype demonstrates that the multiphase coupled buck converter can have a much better efficiency than the multiphase buck converter with the same transient response.

131 citations


Patent
03 Dec 2003
TL;DR: In this article, a power control circuit is provided containing a switch array, which includes segmented switches, a flying capacitor, an output voltage terminal, a feedback loop, and a digital voltage regulator block.
Abstract: A power control circuit is provided containing a switch array, which includes segmented switches, a flying capacitor, an output voltage terminal, a feedback loop, and a digital voltage regulator block. The digital voltage regulator block includes an A/D converter, an encoder, an add-subtractor, and a gate logic. These power control circuits do not include pass transistors. A method is also provided, where the charge pumps of the power control circuit are operated in two-phase cycles including a charging phase and a pumping phase. The power control circuit is controlled in both of these phases, thereby reducing the ripple of the output voltage.

113 citations


Proceedings ArticleDOI
19 Feb 2003
TL;DR: In this paper, a small-signal model of the active droop control method, which is shown to be a two-loop feedback control system, is discussed, in order to achieve equal crossover frequencies for the two loops so that constant output impedance is realized in the voltage regulator.
Abstract: Use of the active droop control method is a popular way to achieve adaptive voltage position (AVP) for the voltage regulator (VR). This paper discusses the small-signal model of the active droop control method, which is shown to be a two-loop feedback control system. The compensator design impacts both the current and voltage loops, making the design complicated. An optimal design method is proposed in order to achieve equal crossover frequencies for the two loops so that constant output impedance is realized in the VR. Simulation and experimental results prove the good VR transient response and high efficiency.

Journal ArticleDOI
TL;DR: One issue addressed in this paper is the synthesis of practical circuits that can provide power factor correction and output regulation, and four practical minimal configurations that achieve reduced redundant power processing are considered.
Abstract: This paper discusses the circuit theory aspects of power factor correction in switching converter circuits The discussion begins with an examination of the requirement of power factor correction in dc/dc converters Using the concept of zero-order converter circuits, sufficient conditions for a dc/dc converter circuit to provide power factor correction are derived The duality principle is applied to generate new converter circuits that can achieve power factor correction The practical application of power factor correction is considered in conjunction with the requirement of tight output voltage regulation Detailed study of the circuit configuration that can simultaneously provide power factor correction and output regulation is given Based on a general three-port model, the voltage regulator with power factor correction capability is studied in terms of the power flow between the input port, output port and energy storage port A detailed consideration of the power flow among the three ports leads to the derivation of all possible minimal configurations that can achieve power factor correction and voltage regulation The efficiencies of these minimal configurations are studied theoretically, leading to the concept of ‘reduced redundant power processing’ which provides important clue to efficiency improvement Another issue addressed in this paper is the synthesis of practical circuits that can provide power factor correction and output regulation In particular, four practical minimal configurations that achieve reduced redundant power processing are considered A systematic synthesis procedure is derived for creating converter circuits that achieve power factor correction and output voltage regulation The control issue is also investigated in depth, pinpointing the basic requirement on the number of control parameters needed and its relationship with the operating mode Copyright © 2003 John Wiley & Sons, Ltd

Journal ArticleDOI
01 Jun 2003
TL;DR: An analysis of an on-chip buck converter and a model of the parasitic impedances of a buck converter are developed and full integration of a high-efficiency buck converter on the same die with a dual-V/sub DD/ microprocessor is demonstrated to be feasible.
Abstract: An analysis of an on-chip buck converter is presented in this paper. A high switching frequency is the key design parameter that simultaneously permits monolithic integration and high efficiency. A model of the parasitic impedances of a buck converter is developed. With this model, a design space is determined that allows integration of active and passive devices on the same die for a target technology. An efficiency of 88.4% at a switching frequency of 477 MHz is demonstrated for a voltage conversion from 1.2-0.9 volts while supplying 9.5 A average current. The area occupied by the buck converter is 12.6 mm/sup 2/ assuming an 80-nm CMOS technology. An estimate of the efficiency is shown to be within 2.4% of simulation at the target design point. Full integration of a high-efficiency buck converter on the same die with a dual-V/sub DD/ microprocessor is demonstrated to be feasible.

Patent
15 Sep 2003
TL;DR: In this article, an energy supply system consisting of a solar panel to generate an input voltage from solar energy, a battery, an alternating current voltage booster coupled to the solar panel, and a DC regulator coupled with the AC voltage booster to charge the battery is described.
Abstract: An energy supply system includes a solar panel to generate an input voltage from solar energy; a battery; an alternating current (AC) voltage booster coupled to the solar panel to receive the input voltage; and a DC regulator coupled to the AC voltage booster to charge the battery.

Patent
15 Sep 2003
TL;DR: In this paper, an energy supply system includes a solar panel to generate an input voltage from solar energy; a battery; an alternating current (AC) voltage booster coupled to the solar panel, receiving the input voltage; and a DC regulator coupled with the AC voltage booster to charge the battery.
Abstract: A charger includes an alternating current (AC) voltage booster coupled to an input voltage; and a DC regulator coupled to the AC voltage booster to charge a battery. An energy supply system includes a solar panel to generate an input voltage from solar energy; a battery; an alternating current (AC) voltage booster coupled to the solar panel to receive the input voltage; and a DC regulator coupled to the AC voltage booster to charge the battery.

Patent
Einar V. Larsen1
03 Sep 2003
TL;DR: In this paper, a wind turbine generator control system includes relatively fast regulation of voltage near the individual generators with relatively slower overall reactive power regulation at a substation or wind farm level, where the setpoint of the relatively fast voltage regulator is adjusted by the relatively slow reactive power regulator.
Abstract: A wind turbine generator control system includes relatively fast regulation of voltage near the individual generators with relatively slower overall reactive power regulation at a substation or wind farm level. The setpoint of the relatively fast voltage regulator is adjusted by the relatively slow reactive power regulator. The fast voltage regulation can be at the generator terminals or at a synthesized remote point.

Patent
13 Jun 2003
TL;DR: In this article, the frequency of a clock of a processor of a digital system is dynamically changed by a single clock on the processor if the processor is comprised of multiple processing cores with associated clocks.
Abstract: Methods and systems are provided for dynamically managing the power consumption of a digital system. These methods and systems broadly provide for varying the frequency and voltage of one or more clocks of a digital system upon request by an entity of the digital system. An entity may request that the frequency of a clock of the processor of the digital system be changed. After the frequency is changed, the voltage point of the voltage regulator of the digital system is automatically changed to the lowest voltage point required for the new frequency if there is a single clock on the processor. If the processor is comprised of multiple processing cores with associated clocks, the frequency is changed to the lowest voltage point required by all frequencies of all clocks.

Proceedings ArticleDOI
02 Jun 2003
TL;DR: It is proposed that current constraints are the right kind of abstraction to use in order to develop a practical methodology for power grid verification, and it is reported on the results of applying it to a number of test-case power grids.
Abstract: Design verification must be included the power grid. Checking that the voltage on the power grid does not drop by more than some critical threshold is a very difficult problem, for at least two reasons: 1. the obviously large size of the power grids for modern high-performance chips, and 2. the difficulty of setting up the right simulation conditions for the power grid that provide some measure of a realistic worst case voltage drop. The huge number of possible circuit operational modes or workloads makes it impossible to do exhaustive analysis. We propose a static technique for power grid verification, where static is in the sense of static timing analysis, meaning that it does not depend on, nor require, user-specified stimulus to drive a simulation. The verification is posed as an optimization problem under user-supplied current constraints. We propose that current constraints are the right kind of abstraction to use in order to develop a practical methodology for power grid verification. We present our verification approach, and report on the results of applying it to a number of test-case power grids

Journal ArticleDOI
TL;DR: In this article, the negative output super lift technique has been used to enhance the voltage transfer gain in power-law power-converter design, and the output voltage increases in arithmetic progression.
Abstract: The voltage lift technique has been successfully employed in design of DC/DC converters, e.g., four series Luo-converters. However, the output voltage increases in arithmetic progression. Negative output super lift technique in this paper implements the output voltage increasing in geometric progression. It effectively enhances the voltage transfer gain in power-law.

Patent
18 Jun 2003
TL;DR: In this article, a bias current sink is used to produce a voltage drop to compensate the voltage drop of an output rectifying diode as the output load changes, which can enable the PWM controller to regulate the output voltage very precisely without using a secondary feedback circuit.
Abstract: The present invention provides a primary-side regulated PWM controller with improved load regulation. In every PWM cycle, a built-in feedback voltage samples and holds a flyback voltage from the auxiliary winding of the transformer via a sampling switch and generates a feedback voltage accordingly. A bias current sink pulls a bias current that is proportional to the feedback voltage. Via a detection resistor, the bias current will produce a voltage drop to compensate the voltage drop of an output rectifying diode as the output load changes. According to the present invention, the bias current can enable the PWM controller to regulate the output voltage very precisely without using a secondary feedback circuit.

Patent
Jung-Bae Lee1
18 Nov 2003
TL;DR: In this article, an on-die termination (ODT) circuit and ODT method are used to minimize consumption of an onchip DC current, and a memory system which adopts a memory device having the same, where the ODT circuit includes a termination voltage port, data input/output (I/O) port, a first termination resistor, a switch and a termination enable signal generating circuit.
Abstract: Provided are an on-die termination (“ODT”) circuit and ODT method which are capable of minimizing consumption of an on-chip DC current, and a memory system which adopts a memory device having the same, where the ODT circuit includes a termination voltage port, a data input/output (“I/O”) port, a first termination resistor, a switch, and a termination enable signal generating circuit; the termination voltage port receives termination voltage from a voltage regulator or a memory controller which is installed outside the memory device; one end of the first termination resistor is connected to the data I/O port; the switch selectively connects the termination voltage port to the other end of the first termination resistor in response to a termination enable signal; the termination enable signal generating circuit generates the termination enable signal in response to a signal which indicates a valid section of input data or that the present period is not a read period during write operations of the memory device, and may also generate the termination enable signal in response to a signal output from a mode register set (“MRS”); and the ODT circuit may include a second termination resistor, one end of which is connected to the data I/O port and the other end of which is connected to the termination voltage port.

Patent
03 Feb 2003
TL;DR: In this paper, the authors proposed a digitally controlled multi-phase voltage regulator system providing regulated power to electronic components that have variable power requirements, where the voltage and current information is digitized and provided to a control integrated circuit (IC).
Abstract: Disclosed is a digitally controlled multi-phase voltage regulator system providing regulated power to electronic components that have variable power requirements. Power is supplied by one or more power integrated circuits (IC) each having a high side power switch controlled by pulse width modulated signals and a low side power switch. The power IC senses voltage at the load and has an on-chip current mirror for generating a current that is a ratio of current delivered to the load. The power IC also has current limiting and on-chip temperature sensing components. The voltage and current information is digitized and provided to a control integrated circuit (IC). The control IC receives this digitized information as well as user provided parameters and, in the regulation mode of operation, provides digitized pulse width modulated control signals to the power IC. In an active transient response mode of operation, the control IC provides signals to turn either the high side switches or low side switches ON. Fault detection circuitry identifies over voltage, under voltage, and excessive temperatures. All communications between the control IC and the power IC are digital providing high bandwidth, optimal control frequency response, noise immunity and efficient active transient response.

Patent
22 Sep 2003
TL;DR: In this article, a single mode buck/boost charge pump has multiple outputs and is adapted to power a plurality of separate loads, such as light emitting diodes, in a highly efficient manner.
Abstract: A single mode buck/boost charge pump has multiple outputs and is adapted to power a plurality of separate loads, such as light emitting diodes, in a highly efficient manner. The multiple outputs have different voltages. The output current or voltage of at least one of the multiple outputs is regulated by a feedback circuit. The feedback circuit provides a control signal based on a comparison of a reference voltage with a feedback voltage. The feedback voltage is proportional to an output voltage when the charge pump is configured to regulate the output voltage. Alternately, the feedback voltage is a sense voltage across a sense resistor connected in series with a load when the charge pump is configured to regulate output current provided to the load.

Patent
17 Oct 2003
TL;DR: A radio frequency amplification stage comprising an amplifier for receiving an input signal to be amplified and a power supply voltage, comprising an ac amplifier for amplifying a difference between the reference signal and one of the selected supply voltage level or the adjusted selected power supply level, and a summer for summing the amplified difference with the selected power voltage to thereby generate the adjusted supply voltage as mentioned in this paper.
Abstract: A radio frequency amplification stage comprising: an amplifier for receiving an input signal to be amplified and a power supply voltage; and a power supply voltage stage for supplying said power supply voltage, comprising: means for providing a reference signal representing the envelope of the input signal; means for selecting one of a plurality of supply voltage levels in dependence on the reference signal; and means for generating an adjusted selected power supply voltage, comprising an ac amplifier for amplifying a difference between the reference signal and one of the selected supply voltage level or the adjusted selected supply voltage level, and a summer for summing the amplified difference with the selected supply voltage to thereby generate the adjusted supply voltage.

Patent
06 Jan 2003
TL;DR: A dual voltage automotive electrical system includes a generator for generating a first nominal voltage on a first voltage bus and a bi-directional DC/DC converter for converting it to a second nominal voltage in a second voltage bus as discussed by the authors.
Abstract: A dual voltage automotive electrical system includes a generator for generating a first nominal voltage on a first voltage bus and a bi-directional DC/DC converter for converting the first nominal voltage to a second nominal voltage on a second voltage bus, the second nominal voltage being lower than said first nominal voltage. A battery is coupled to the first voltage bus and selectably coupled to the second voltage bus, and is capable of supplying power to loads on both the first voltage bus and the second voltage bus.

Patent
16 Apr 2003
TL;DR: In this article, a gate drive supply circuit with a boost regulator for generating low-level supply voltage and a charge pump doubler for generating the high level supply voltage is presented.
Abstract: A gate drive supply circuit generating a high-level supply voltage and a low-level supply voltage for driving N-type high-side and low-side power MOSFETs in a multiple-output, low-voltage DC-DC converter integrated circuit. The gate drive supply circuit includes a boost regulator for generating the low-level supply voltage and a charge pump doubler for generating the high-level supply voltage. Both the high-level supply voltage and the low-level supply voltage are distributed to one or more regulators, including but not limited to buck or boost type regulators.

Proceedings ArticleDOI
10 Dec 2003
TL;DR: In this article, a high power density 10 kW three-phase 12-pulse rectifier is analyzed for applications in future more electric aircrafts, which shows high efficiency and low input current harmonics for a wide operating range.
Abstract: A high power density 10 kW three-phase 12-pulse rectifier is analyzed for applications in future more electric aircrafts. The experimental results, which are in good accordance with the theory, show high efficiency and low input current harmonics for a wide operating range. Furthermore, two novel rectifier topologies, which are formed by combining the passive 12-pulse rectifier with a boost stage on the DC side are proposed. This allows to guarantee a constant output voltage and/or to overcome the problem of the dependency of output voltage on the mains voltage amplitude and output power level.

Patent
09 Jul 2003
TL;DR: A voltage regulator as mentioned in this paper includes an input terminal adapted for being coupled to an input voltage and an output terminal adapted to a load, and a digital controller which drives the first switch to close the switch when the error voltage is less than a first preset value of voltage.
Abstract: A voltage regulator includes an input terminal adapted for being coupled to an input voltage and an output terminal adapted for being coupled to a load. The voltage regulator includes a first switch adapted for selectively coupling to the input terminal and to the output terminal, a current sensor for measuring an output current flowing towards the output terminal, a voltage sensor for measuring the output voltage from the output terminal, and a digital controller which drives the first switch. The controller closes the first switch when the error voltage is less than a first preset value of voltage and opens the first switch when the output current is greater than a first preset value of current.

Patent
29 Apr 2003
TL;DR: In this paper, a power management system includes a voltage booster in combination with a voltage regulator to provide a regulated output voltage, which is used to selectively enable/disable the doubling functionality of the voltage booster to increase power conversion efficiency.
Abstract: A power management system includes a voltage booster in combination with a voltage regulator to provide a regulated output voltage. The voltage provided to the voltage regulator is used to selectively enable/disable the doubling functionality of the voltage booster to increase power conversion efficiency.

Proceedings ArticleDOI
19 Feb 2003
TL;DR: In this paper, a scalable multiphase synchronous buck converter is presented, which meets the tight requirements of the next generation microprocessors and can be easily expanded or paralleled with other voltage regulator modules through an average current share bus.
Abstract: The paper presents a scalable multiphase synchronous buck converter which meets the tight requirements of the next generation microprocessors. Flexibility in the number of phases (1-16 phases) accommodates requirements of various applications. The converter can be easily expanded or paralleled with other voltage regulator modules (VRM) through an average current share bus. The distributed control IC architecture allows for local phase current signal processing, which minimizes induced noise and facilitates layout while reducing the gate driver to power stage impedance. The experimental results are given to show the advantages of the converter.