Showing papers on "Voltage regulator published in 2006"

Switching power supply circuit

Abstract: The present invention relates to a switching power-supply circuit comprising: rectifying and smoothing means for generating a rectified and smoothed voltage and outputting the rectified and smoothed voltage as a direct-current input voltage; an insulating converter transformer for transferring a primary-side output to a secondary side; switching means for intermittently passing on the direct-current input voltage to a primary winding of the insulating converter transformer; a primary-side resonance circuit for actuating the switching means in a voltage resonance mode; power-factor improvement means for improving a power factor by generating intermittently a rectified current based on the fed-back switching output voltage; a secondary-side resonance circuit on a secondary side of the insulating converter transformer; direct-current output voltage generation means carrying out a rectification operation in order to generate a secondary-side direct-current output voltage; and constant-voltage control means for executing constant-voltage control on the secondary-side direct-current output voltage.

A power system stabilizer for DFIG-based wind generation

Abstract: A power system stabilizer (PSS) for a wind turbine employing a doubly fed induction generator (DFIG) is presented. It is shown that this PSS can significantly influence the contribution that a DFIG-based wind farm can make to network damping. A simple, generic test network that combines synchronous and wind farm generation is used to demonstrate system performance contributions. The results of both eigenvalue analysis and time response simulation studies are presented to illustrate contributions to network dynamic and transient performance that the DFIG controller with its PSS can make. Performance capabilities superior to those provided by synchronous generation with automatic voltage regulator and PSS control are demonstrated.

A unified approach to the design of PWM-based sliding-mode voltage controllers for basic DC-DC converters in continuous conduction mode

Abstract: This paper presents a simple unified approach to the design of fixed-frequency pulsewidth-modulation-based sliding-mode controllers for dc-dc converters operating in the continuous conduction mode. The design methodology is illustrated on the three primary dc-dc converters: buck, boost, and buck-boost converters. To illustrate the feasibility of the scheme, an experimental prototype of the derived boost controller/converter system is developed. Several tests are performed to validate the functionalities of the system

STATCOM-Based Voltage Regulator for Self-Excited Induction Generator Feeding Nonlinear Loads

Abstract: This paper deals with the performance analysis of a static compensator (STATCOM)-based voltage regulator for self-excited induction generators (SEIGs) supplying nonlinear loads. In practice, a number of loads are nonlinear in nature, and therefore, they inject harmonics in the generating systems. The SEIG's performance, being a weak isolated system, is very much affected by these harmonics. The additional drawbacks of the SEIG are poor voltage regulation and that it requires an adjustable reactive power source with varying loads to maintain a constant terminal voltage. A three-phase insulated-gate-bipolar-transistor-based current-controlled voltage source inverter working as STATCOM is used for harmonic elimination, and it provides the required reactive power for the SEIG, with varying loads to maintain a constant terminal voltage. A dynamic model of the SEIG-STATCOM feeding nonlinear loads using stationary d-q axes reference frame is developed for predicting the behavior of the system under transient conditions. The simulated results show that SEIG terminal voltage is maintained constant, even with nonlinear balanced and unbalanced loads, and free from harmonics using STATCOM-based voltage regulator

Operation and control of a dynamic voltage restorer using transformer coupled H-bridge converters

Abstract: The dynamic voltage restorer (DVR) as a means of series compensation for mitigating the effect of voltage sags has become established as a preferred approach for improving power quality at sensitive load locations. Meanwhile, the cascaded multilevel type of power converter topology has also become a workhorse topology in high power applications. This paper presents the detailed design of a closed loop regulator to maintain the load voltage within acceptable levels in a DVR using transformer coupled H-bridge converters. The paper presents system operation and controller design approaches, verified using computer simulations, and a laboratory scale experimental prototype.

Characterization and performance comparison of ripple-based control for voltage regulator modules

Abstract: Three recently developed control methods for voltage regulator modules, namely, V/sup 2/ control, enhanced V/sup 2/ control, and enhanced V/sup 2/ control without output voltage dynamic feedback, are analyzed and compared in this paper. All three methods utilize the output voltage switching ripple for pulse-width modulation (PWM), hence, are collectively referred to as ripple-based control. A general modeling method based on the Krylov-Bogoliubov-Mitropolsky ripple estimation technique is applied to develop averaged models for single-channel as well as multichannel buck converters employing each of the control methods. Unlike existing models that are limited to small-signal operation, the proposed models are valid for large-signal operation and are capable of predicting subharmonic instability without including any sample-and-hold block as used in previous models. The paper also shows that adding parallel, high-quality ceramic capacitors at the output, which are ignored in previous models, can lead to pulse skipping and ripple instability, and a solution based on proper selection of the ceramic capacitors and/or ramp compensation at the PWM is presented. The models are further applied to analyze and compare the performance of the three control methods in terms of ripple stability, effective load current feedforward gain, and output impedance.

Modeling and design of a neutral-point voltage regulator for a three-level diode-clamped inverter using multiple-carrier modulation

Abstract: The three-level diode-clamped multilevel converter commonly called the neutral-point-clamped converter has become established to be a preferred topology for high-power motor drive applications operating at several kilovolts. Although solutions to the problem of maintaining a stable neutral-point voltage in the converter continue to be the topic of research, a simple solution based on a design-oriented dynamic model of the system is not widely known. This paper presents the design, analysis, and implementation of a simple neutral-point voltage regulator for a three-level diode-clamped multilevel inverter, which uses a multiple-carrier sine-triangle modulator in conjunction with a closed-loop controller for neutral-point regulation. Redundant state choices are controlled via a continuous offset voltage that regulates the dc injection into the midpoint of the dc bus. A small-signal transfer function is developed in closed form, for neutral-point regulation, with the voltage offset as the control variable. Besides maintaining dc-bus voltage balance, the use of the approach leads to a significant reduction in the voltage distortion at the neutral point, allowing a definitive reduction in the required dc bus capacitance. Analytical, computer simulation, and experimental results verifying the approach are presented in this paper.

Apparatus and method of wirelessly sharing power by inductive method

Abstract: An apparatus and method of wirelessly sharing power by an inductive method are provided. The apparatus includes a first battery supplying power; a rectifier supplied with an AC voltage, converts the AC voltage into a DC voltage, and outputs the DC voltage; an inverter supplied with the DC voltage, converts the DC voltage into the AC voltage, and outputs the AC voltage; a power control/conversion unit connected to the rectifier or the inverter and supplying power to charge the first battery or a second battery that is provided in an external device as a power supply for the first battery; and a communication unit communicating with the external device.

Replica compensated linear regulators for supply-regulated phase-locked loops

Abstract: Supply-regulated phase-locked loops rely upon the VCO voltage regulator to maintain a low sensitivity to supply noise and hence low overall jitter. By analyzing regulator supply rejection, we show that in order to simultaneously meet the bandwidth and low dropout requirements, previous regulator implementations used in supply-regulated PLLs suffer from unfavorable tradeoffs between power supply rejection and power consumption. We therefore propose a compensation technique that places the regulator's amplifier in a local replica feedback loop, stabilizing the regulator by increasing the amplifier bandwidth while lowering its gain. Even though the forward gain of the amplifier is reduced, supply noise affects the replica output in addition to the actual output, and therefore the amplifier's gain to reject supply noise is effectively restored. Analysis shows that for reasonable mismatch between the replica and actual loads, regulator performance is uncompromised, and experimental results from a 90 nm SOI test chip confirm that with the same power consumption, the proposed regulator achieves at least 4 dB higher supply rejection than the previous regulator design. Furthermore, simulations show that if not for other supply rejection-limiting components in the PLL, the supply rejection improvement of the proposed regulator is greater than 15 dB.

New configuration of UPQC for medium-voltage application

Abstract: This paper proposes a novel configuration of a unified power quality conditioner (UPQC) which can be connected to the distribution system without series injection transformers. The operation of the proposed system was analyzed through simulations with PSCAD/EMTDC and experimental works with a scaled hardware model, assuming that the UPQC is connected with the 22.9-kV distribution line. The proposed UPQC has the ultimate capability of improving power quality at the point of installation on power distribution systems. It has flexibility in expanding the operation voltage by increasing the number of H-bridge modules.

Switching voltage regulator comprising a cycle comparator for dynamic voltage scaling

Abstract: A switching voltage regulator is disclosed for regulating a voltage supplied to system circuitry. The switching voltage regulator comprises an oscillator operable to generate an oscillator signal representing a gate speed of a reference circuit in the system circuitry, and a frequency generator operable to generate a reference signal representing a target gate speed of the reference circuit. A cycle comparator compares at least one cycle of the oscillator signal to at least one cycle of the reference signal, and switching circuitry charges a charging element based at least on part on the comparison.

High Power Density, High Efficiency System Two-stage Power Architecture for Laptop Computers

Abstract: This paper proposes system two-stage power architecture for laptop voltage regulators (VRs). By taking advantage of the Thermal Design Power (TDP) requirement in the laptop, VRs for microprocessor, graphics, DDR memory and main power can share the same first stage with very low design power. The high-efficiency and high-frequency first stage based on switching capacitor technology and second stage design is presented in this paper respectively. Two different designs are illustrated and verified by experiments. One design keeps the similar VR cost as the current single-stage solution and improves VR light load efficiency by 5%. Another design has slightly higher VR efficiency comparing with single-stage solution while reducing the footprint of VR output inductors and capacitors by 25%∼33% and VR total cost by 5%.

Adjusting on-time for a discontinuous switching voltage regulator

Abstract: A discontinuous switching voltage regulator is disclosed including a charging element operable to generate an output voltage, switching circuitry coupled to the charging element, and switch control circuitry to configure the charging element during a cycle, including to charge the charging element for an on-time, discharge the charging element for a discharge time, and tristate the charging element for a tristate time. In operation, the on-time is initialized to a first on-time, and a first switch time is measured comprising the first on-time and a first discharge time of a first cycle. A first tristate time of the first cycle is measured, and a first ratio of the first tristate time to the first switch time is determined. The first ratio is compared to a first ratio threshold, and the on-time is adjusted to a second on-time if the first ratio exceeds the first ratio threshold.

Three-Level Inverter Scheme With Common Mode Voltage Elimination and DC Link Capacitor Voltage Balancing for an Open-End Winding Induction Motor Drive

Abstract: A dc link capacitor voltage balancing scheme along with common mode voltage elimination is proposed for an induction motor drive, with open-end winding structure. The motor is fed from both the ends with three-level inverters generating a five level output voltage space phasor structure. If switching combinations, with zero common mode voltage in the pole voltage, are used, then the resultant voltage space vector combinations are equivalent to that of a three-level inverter. The proposed inverter vector locations exhibit greater multiplicity in the inverter switching combinations which is suitably exploited to arrive at a capacitor voltage balancing scheme. This allows the use of a single dc link power supply for the combined inverter structure. The simultaneous task of common mode voltage elimination with dc link capacitor voltage balancing, using only the switching state redundancies, is experimentally verified on a 1.5-kW induction motor drive

A 110 nA Voltage Regulator System With Dynamic Bandwidth Boosting for RFID Systems

Abstract: This paper describes a voltage regulator system for ultra-low-power RFID tags (also called passive tags) in a 0.15 mum analog CMOS technology. These tags derive their power supply from the incoming RF energy through rectification instead of from a battery. The regulator is functional with just 110 nA current. Owing to the huge variation of the rectified voltage (by as much as tens of volts), voltage limiters and clamps are employed at various points along the regulation path. A limiter at the rectifier output clamps the rectifier voltage to a narrower range of 1.4 V. A fine-regulator, then, regulates the supply voltage close to a bandgap reference value of 1.25 V. The key aspect of this regulator is the dynamic bandwidth boosting that takes place in the regulator by sensing the excess current that is bypassed in the limter (during periods of excess energy) and increasing its bias current and hence bandwidth, accordingly. A higher bandwidth is necessary for quick recovery from line transients due to the burst nature of RF transmission, with a larger energy burst requiring a higher bandwidth to settle quickly without large line transients. The challenge of compensating such a regulator across various load currents and RF energy levels is described in this paper

Multiphase power regulator with load adaptive phase control

Abstract: Disclosed is a power regulator for providing precisely regulated power to a microelectronic device such as a microprocessor. Improved power regulation is accomplished by optimizing the power efficiency of the power regulator. In particular, in a multiphase system, the number of active phases is increased or decreased to achieve optimum power efficiency. The multiphase voltage regulator adapts the operating mode to maximize efficiency as the load current demand of the load device changes by adjusting the number of active phases to maximize efficiency. The total value of current provided by the regulator and the total number of active phases is determined, the total number of active phases is compared with the number of active phases required to provide the total value of current at maximum efficiency; and the number of active phases is adjusted to provide the total value of current at maximum efficiency. A current sense circuit senses the current at each phase, a summing circuit coupled to the output of the current sense circuit provides the total current value of all the measured phases, a circuit coupled to the output of the summing circuit provides the time averaged total current value to a threshold detecting circuit that determines the number of phases at which the voltage regulator should be operating for maximum efficiency, and a circuit for comparing the number of phases that are operating to the number of phases at which the voltage regulator should be operating adjusts the number of active phases to the number of phases at which the voltage regulator should be operating for maximum efficiency.

Hybrid charge pump regulation

Abstract: Techniques for reliably and efficiently generating an output voltage for use within an electronic device, such as a memory system, are disclosed. A voltage generation circuit generates the output voltage. The voltage generation circuit includes regulation circuitry that controls regulation of the output voltage to maintain the output voltage at a substantially constant level. According to one aspect, regulation is provided through use of different feedback circuits. By selectively disabling one of the feedback circuits, power consumption can be reduced and the other of the feedback circuits can support the continued regulation of the output voltage. The voltage generation circuit is therefore able to operate in an accurate, stable and power efficient manner.

Optimal tuning of power systems stabilizers and AVR gains using particle swarm optimization

Abstract: In this paper, the problem of simultaneous and coordinated tuning of stabilizers parameters and automatic voltage regulators (AVRs) gains in multi-machine power systems is considered. This problem is formulated as an optimization problem, which is solved using particle swarm optimization technique. The objective of the parameters optimization is formulated as nonlinear problem with constraints to represent the allowable region of the system parameters. The effectiveness of the proposed technique for tuning of multi-controllers in a large power system is tested by applying it to the well-known New England system. q 2005 Published by Elsevier Ltd.

Load-Line Regulation With Estimated Load-Current Feedforward: Application to Microprocessor Voltage Regulators

Abstract: A consistent framework for load-line regulation design is presented, applicable to microprocessor voltage regulators (VRs) using either electrolytic or ceramic output capacitors. With conventional feedback control, the loop bandwidth is limited by stability constraints linked to the switching frequency. The output capacitor has to be chosen sufficiently large to meet the stability requirement. Load-current feedforward can extend the useful bandwidth beyond that imposed by feedback stability constraints. With load-current feedforward, the size of the output capacitor can be reduced, since it is determined solely by large-signal and switching-ripple considerations which are shown to be less constraining than the feedback stability requirement. This work points to the feasibility of microprocessor VR implementations using only a small number of ceramic output capacitors, while running at sub-megahertz switching frequencies

Multiple output voltage regulator

Abstract: Some embodiments include a die having an output control circuit to interact with an output circuit to convert a source voltage into at least one output voltage. The die may also have a converter circuit to convert the output voltage into at least one additional output voltage.

Dead-zone digital controllers for improved dynamic response of low harmonic rectifiers

Abstract: This paper introduces a simple digital control method that enables fast regulation of the output voltage in low harmonic rectifiers with power factor correction (PFC). The method is based on the use of an insensitive region, i.e., "dead-zone," in analog-to-digital conversion, for elimination of the output capacitor voltage ripple in the feedback loop. The dead-zone can either be fixed and larger than the maximum ripple magnitude, or it can be dynamically adjusted in accordance with the output load. Simple implementations of these two dead-zone controllers are shown on an experimental completely digitally controlled 250-W boost PFC operating at 200-kHz switching frequency. The experimental results show that this control method results in low current harmonics and improved load transient responses, which are significantly faster than in low-harmonic rectifiers with conventional low-bandwidth voltage-loop controllers.

A regulated charge pump with small ripple voltage and fast start-up

Abstract: A regulated charge pump circuit is realized in a 3.3-V 0.13-/spl mu/m CMOS technology. The charge pump exploits an automatic pumping control scheme to provide small ripple output voltage and fast start-up by decoupling output ripple and start-up time. The automatic pumping control scheme is composed of two schemes, an automatic pumping current control scheme and an automatic pumping frequency control scheme. The former automatically adjusts the size of pumping driver to reduce ripple voltage according to output voltage. The latter changes the pumping period by controlling a voltage-controlled oscillator (VCO). The output frequency of the VCO varies from 400 kHz to 600 kHz by controlling the input bias voltage of the VCO. The prototype chip delivers regulated 4.5-V output voltage from a supply voltage of 3.3 V with a flying capacitor of 330 nF, while providing 30 mA of load current. The area is 0.25 mm/sup 2/ and the measured output ripple voltage is less than 33.8 mV with a 2-/spl mu/F load capacitor. The power efficiency is greater than 70% at the range of load current from 1 to 30 mA. An analytical model for ripple voltage and recovery time is proposed demonstrating a reasonable agreement with SPICE simulation results.

A 150mA Low Noise, High PSRR Low-Dropout Linear Regulator in 0.13μm Technology for RF SoC Applications

Abstract: An integrated low-noise, high power supply rejection ratio (PSRR), low-dropout (LDO) linear regulator has been developed in Texas Instruments' (TI) 130nm CMOS technology. The LDO regulator is capable of producing a regulated output voltage of 2.8 V from a Li-ion battery supply, with a dropout voltage of 200 mV while supplying a load current of 150 mA. The LDO regulator features > 65 dB PSRR at 20 kHz, and > 40 dB up to 1 MHz. The LDO regulator also features output noise performance of < 350 nVrms/radicHz at 100Hz. The LDO die area is 0.166 mm2 and the maximum no-load power consumption is 450μW.

Slope compensation for switching regulator

Abstract: In one embodiment, a switching regulator comprises a control circuit that activates and deactivates at least one power switch to control a voltage of a switching node. The system also comprises an inductor that conducts a current from the switching node to an output to generate an output voltage. The system further comprises a PWM comparison circuit that controls an on-time and/or an off-time of the at least one power switch based on a comparison of a feedback voltage and a reference voltage. The PWM comparison circuit comprises a ramp signal generator configured to provide a ramp signal having a non-zero slope that is combined with either the feedback voltage or the reference voltage at a beginning of either the on-time or the off-time. The PWM comparison circuit can be further configured to set the slope of the ramp signal to zero during the off-time in a discontinuous conduction mode.

Dual voltage regulator for a supply voltage controlled power amplifier in a closed power control loop

Abstract: A supply voltage controlled power amplifier that comprises a power amplifier, a closed power control feedback loop configured to generate a power control signal, and a dual voltage regulator coupled to the power control feedback loop, the dual voltage regulator comprising a first regulator stage and a second regulator stage, wherein the closed power control loop minimizes noise generated by the first regulator stage.

Ultra-low voltage nano-scale memories

Abstract: An Introduction to LSI Design.- Ultra-Low Voltage Nano-Scale DRAM Cells.- Ultra-Low Voltage Nano-Scale SRAM Cells.- Leakage Reduction for Logic Circuits in RAMs.- Variability Issue in the Nanometer Era.- Reference Voltage Generators.- Voltage Down-Converters.- Voltage Up-Converters and Negative Voltage Generators.- High-Voltage Tolerant Circuits.

Adaptive pwm pulse positioning for fast transient response

Abstract: An adaptive pulse positioning system for a voltage converter providing an output voltage, the system including a PWM generation circuit, a sensor, and a pulse positioning circuit. The PWM generation circuit generates a PWM signal with PWM pulses for controlling the output voltage of the voltage controller. The sensor senses an output load condition of the voltage converter and provides a load signal indicative thereof. The pulse positioning circuit adaptively positions the PWM pulses based on the load signal. A method of adaptively positioning PWM pulses that are used to control an output voltage of a voltage regulator including generating a series of PWM pulses based on a clock signal, sensing an output load condition, and adaptively shifting the series of PWM pulses based on the output load condition.

Drive device of color led backlight

Abstract: Disclosed herein is a drive device of a color light emitting diode (LED) backlight, which is capable of precisely adjusting the forward voltages of color LED arrays for each channel. The drive device for driving the color light emitting diode (LED) backlight which includes a plurality of color LED arrays includes an I/O interface for inputting/outputting a signal, a control unit for controlling a driving voltage and driving current according to a brightness control signal output from the I/O interface, a DC/DC converter for converting an operation voltage into the driving voltage according to the driving voltage control of the control unit, a voltage regulator for regulating the driving voltage output from the DC/DC converter to a reference voltage without ripple, a multi-channel driving unit for converting the reference voltage output from the voltage regulator into forward voltages of the plurality of color LED arrays according to a plurality of control signals, and a current source for adjusting the amount of the driving current flowing in the color LED backlight according to the driving current control of the control unit.

Digital implementation of power factor correction

Abstract: A circuit for providing power factor correction in accordance with an embodiment of the present application may include a boost converter circuit and a control circuit receiving as inputs a rectified AC input voltage from a rectifier, a signal proportional to current through the boost inductor and the DC bus voltage across the capacitor of the boost converter. The control circuit provides a pulse width modulated signal to control the on time of a PFC switch. The control circuit further includes a voltage regulator and a current regulator. The current regulator includes a difference device operable to subtract a signal proportional to the inductor current from the current reference signal, a PI controller adapted to receive the output of the difference device and provide a first control signal, a feed forward device operable to receive the rectified AC input voltage and to provide a second control signal with a smaller dynamic range than the AC input voltage, and an adder operable to add the first control signal to the second control signal to provide a PWM reference signal for generating the pulse width modulated signal. A zero crossing detector and vector rotator may be provided to provide a clean sinusoidal reference to the current regulator. A partial PFC regulator may be provide to provide partial mode PFC if desired.

High efficiency power supply for led lighting applications

Abstract: A power supply for plural loads coupled in parallel comprises a voltage regulator, a plurality of current regulators, and an error control circuit. The voltage regulator provides a common output voltage to the plural loads. The voltage regulator comprises a sensor circuit providing a voltage sense signal corresponding to the output voltage, which provides feedback to regulate the output voltage at a selected level. The plurality of current regulators are coupled to respective ones of the plural loads. Each of the plurality of current regulators regulates current drawn by respective ones of the plural loads to within a desired regulation range. The plurality of current regulators each further provide a respective error signal corresponding to an ability to remain within the desired regulation range. The error control circuit is operatively coupled to the voltage regulator and to the plurality of current regulators. The error control circuit receives the error signals from the plurality of current regulators and provides a common error signal to the voltage regulator. The voltage regulator thereby changes the selected level of the output voltage in response to the common error signal. Accordingly, the selected level of the output voltage remains at a minimum voltage necessary to keep the plural loads in the desired regulation range.