O
Oleg Gluschenkov
Researcher at IBM
Publications - 248
Citations - 4174
Oleg Gluschenkov is an academic researcher from IBM. The author has contributed to research in topics: Layer (electronics) & Transistor. The author has an hindex of 37, co-authored 245 publications receiving 4076 citations. Previous affiliations of Oleg Gluschenkov include Google & GlobalFoundries.
Papers
More filters
Journal ArticleDOI
Performance dependence of CMOS on silicon substrate orientation for ultrathin oxynitride and HfO 2 gate dielectrics
Min Yang,Evgeni Gusev,Meikei Ieong,Oleg Gluschenkov,Diane C. Boyd,K.K. Chan,P. Kozlowski,Christopher P. D'Emic,Raymond M. Sicina,Paul C. Jamison,A.I. Chou +10 more
TL;DR: In this article, the authors investigated the dependence of CMOS performance on silicon crystal orientation of [100], [111], and [110] with the equivalent gate dielectric thickness less than 3 nm.
Patent
Vertical MOSFET SRAM cell
TL;DR: In this article, a method of forming an SRAM cell device includes the following steps: form pass gate FET transistors and form a pair of vertical pull-down FETtransistors with a first common body and a first source in a silicon layer patterned into parallel islands formed on a planar insulator.
Patent
Structure and method to improve channel mobility by gate electrode stress modification
TL;DR: In this paper, the authors propose to react the material of the gate electrode with a metal to produce a stressed alloy (preferably CoSi 2, NiSi, or PdSi) within a transistor gate.
Patent
Strained finFETs and method of manufacture
TL;DR: In this paper, a semiconductor structure and method of manufacturing is provided, which includes forming shallow trench isolation (STI) in a substrate and providing a first material and a second material on the substrate.
Proceedings ArticleDOI
A 7nm FinFET technology featuring EUV patterning and dual strained high mobility channels
Ruilong Xie,Pietro Montanini,Kerem Akarvardar,Neeraj Tripathi,Balasubramanian S. Pranatharthi Haran,Scott C. Johnson,Terence B. Hook,Bassem Hamieh,D. Corliss,Junli Wang,Xin Miao,John R. Sporre,Jody A. Fronheiser,Nicolas Loubet,Min Gyu Sung,Stuart A. Sieg,Shogo Mochizuki,Christopher Prindle,Soon-Cheon Seo,Andrew M. Greene,Jeffrey C. Shearer,Andre Labonte,Su Chen Fan,Lars W. Liebmann,Robin Chao,Abraham Arceo,Kisup Chung,K. Cheon,Praneet Adusumilli,H. P. Amanapu,Zhenxing Bi,Jungho Cha,H. Chen,Richard A. Conti,Rohit Galatage,Oleg Gluschenkov,Vimal Kamineni,Ki-chul Kim,Lee Choonghyun,F. Lie,Zuoguang Liu,Sanjay Mehta,Eric R. Miller,Hiroaki Niimi,Chengyu Niu,Chanro Park,D. Park,Mark Raymond,Bhagawan Sahu,Muthumanickam Sankarapandian,Shariq Siddiqui,Richard G. Southwick,Lei Sun,Charan V. V. S. Surisetty,Stan D. Tsai,S. Whang,Peng Xu,Y. Xu,C.-C. Yeh,Peter Zeitzoff,J. Zhang,James Chingwei Li,James J. Demarest,John C. Arnold,Donald F. Canaperi,Derren N. Dunn,Nelson Felix,Dinesh Gupta,Hemanth Jagannathan,S. Kanakasabapathy,Walter Kleemeier,C. Labelle,M. Mottura,P. Oldiges,Spyridon Skordas,Theodorus E. Standaert,Tenko Yamashita,Matthew E. Colburn,Myung-Hee Na,Vamsi Paruchuri,S. Lian,R. Divakaruni,T. Gow,Seng Luan Lee,Andreas Knorr,Huiming Bu,Mukesh Khare +86 more
TL;DR: In this paper, the authors present a 7nm technology with the tightest contacted poly pitch (CPP) of 44/48nm and metallization pitch of 36nm ever reported in FinFET technology.