Kongu Engineering College

About: Kongu Engineering College is a based out in . It is known for research contribution in the topics: Computer science & Cluster analysis. The organization has 2001 authors who have published 1978 publications receiving 16923 citations.

Investigating the Efficacy of Adhesive Tape for Drilling Carbon Fibre Reinforced Polymers

Abstract: In the present research work, an effort has been made to explore the potential of using the adhesive tapes while drilling CFRPs. The input parameters, such as drill bit diameter, point angle, Scotch tape layers, spindle speed, and feed rate have been studied in response to thrust force, torque, circularity, diameter error, surface roughness, and delamination occurring during drilling. It has been found that the increase in point angle increased the delamination, while increase in Scotch tape layers reduced delamination. The surface roughness decreased with the increase in drill diameter and point angle, while it increased with the speed, feed rate, and tape layer. The best low roughness was obtained at 6 mm diameter, 130° point angle, 0.11 mm/rev feed rate, and 2250 rpm speed at three layers of Scotch tape. The circularity error initially increased with drill bit diameter and point angle, but then decreased sharply with further increase in the drill bit diameter. Further, the circularity error has non-linear behavior with the speed, feed rate, and tape layer. Low circularity error has been obtained at 4 mm diameter, 118° point angle, 0.1 mm/rev feed rate, and 2500 RPM speed at three layers of Scotch tape. The low diameter error has been obtained at 6 mm diameter, 130° point angle, 0.12 mm/rev feed rate, and 2500 rpm speed at three layer Scotch tape. From the optical micro-graphs of drilled holes, it has been found that the point angle is one of the most effective process parameters that significantly affects the delamination mechanism, followed by Scotch tape layers as compared to other parameters such as drill bit diameter, spindle speed, and feed rate.

Algorithms to improve scheduling techniques in IaaS cloud

Abstract: Optimal resource scheduling has been a great challenge in IaaS cloud computing environment. Haizea is a VM resource management component that takes lease requests and makes scheduling decisions based on user requests. There are four types of leases in Haizea. They are immediate, BestEffort(BE), Advance Reservation(AR) and DeadLine Sensitive(DLS) leases. Immediate lease requires immediate attention. BE lease can be allocated when resources are available. AR lease requires the exact requested slot. DLS leases are BE leases with deadline. In BE leases, the starvation of resources may occur if the lease gets suspended for more number of times since it is considered as least priority and also preemptible. Immediate and AR leases will get rejected if the leases are not schedulable at that particular requested time. This will considerably increase the lease request rejection rate. For immediate, AR and DLS leases, the next free available slots are intimated to the user. Based upon the user's wish, the leases will be scheduled. This will increase the resource request acceptance rate and the system utilization rate will also increase. The cancellation of leases after submission also can be implemented.

Design of inductively degenerated common source RF CMOS Low Noise Amplifier

Abstract: The Low Noise Amplifier (LNA) is the first stage in RF CMOS receivers. The Common Gate (CG) LNA and Inductively Degenerated Common Source (CS) LNA are one of the widely used topologies for realizing RF CMOS receivers. The present work emphasizes a simple and exhaustive search procedure for the synthesis and analysis of CMOS CG and Inductively Degenerated CS LNA circuits. The width (W), gate source voltage ( $$ V_{gs} $$ ) and drain source voltage ( $$ V_{ds} $$ ) of the transistors constitute the design space in the circuit design. The design first involves the use of a circuit simulator (HSPICE) to obtain the small signal parameters of the circuit for various W, $$ V_{gs}$$ , and $$ V_{ds} $$ of the transistors and then to generate a Look-Up Table (LUT) for all design points using the obtained values. This LUT is used to meet the target performance specifications along with appropriate analytical expressions derived from the circuit in a numerical simulator (MATLAB). This will enable one to explore the whole design space quickly and fastly for arriving at the optimal values for the device dimensions, bias voltages and bias currents of the two LNA circuits. The design methodology is demonstrated by designing CG and Inductively Degenerated CS LNA circuits using 90 nm CMOS technology library in which Inductively Degenerated CS LNA gets high gain and low noise figure than CG LNA.

Predicting the wear of soft-on-hard bearing couples for human hip prosthesis using finite element concepts

Abstract: Wear of bearing couples is one of the major concerns in artificial hip implantation. To minimize the wear of hip bearing surfaces, several new materials have been introduced and tested including metal-on-metal, ceramic-on-ceramic and hard-on-hard combinations. The present study involves prediction of wear on ultra-high molecular weight polyethylene (UHMWPE) cup against Co–Cr, alumina and zirconia femoral head by applying the three-dimensional (3D) physiological loads as well as angular motions on these bearing couples to calculate the contact pressure using finite element concepts. The linear and volumetric wear of bearing surfaces increase with increase in gait cycles. Overall, the Zirconia–UHMWPE combination showed least wear, when compared with Alumina–UHMWPE and Co–Cr–UHMWPE combinations. The present study also revealed that the Zirconia–UHMWPE combinations showed less volumetric wear than the Alumina–Alumina bearing which is at present used in artificial hip resurfacements.