Proceedings ArticleDOI
A 500 MHz, 68% efficient, fully on-die digitally controlled buck Voltage Regulator on 22nm Tri-Gate CMOS
Harish K. Krishnamurthy,Vaibhav Vaidya,Pavan Kumar,George E. Matthew,Sheldon Weng,Bharani Thiruvengadam,Wayne L. Proefrock,Krishnan Ravichandran,Vivek De +8 more
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TLDR
A fully on-die, digitally controlled, 500MHz switching, 250mA rated output buck Voltage Regulator (VR) implemented in 22nm Tri-Gate CMOS is presented.Abstract:
A fully on-die, digitally controlled, 500MHz switching, 250mA rated output buck Voltage Regulator (VR) implemented in 22nm Tri-Gate CMOS is presented. The silicon measured a peak efficiency of 68% and consumed an area of 0.6mm
2
(without output decoupling) with a power density of about 410 mW/mm
2
. The paper also demonstrates a controller bandwidth of 43MHz; the highest reported to date for any digital controller, resulting in output voltage ramp rates as high as 10V/μsec.read more
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Journal ArticleDOI
A Digitally Controlled Fully Integrated Voltage Regulator With On-Die Solenoid Inductor With Planar Magnetic Core in 14-nm Tri-Gate CMOS
Harish K. Krishnamurthy,Vaibhav Vaidya,Pavan Kumar,Rinkle Jain,Sheldon Weng,Stephen Kim,George E. Matthew,Nachiket Desai,Xiaosen Liu,Krishnan Ravichandran,James W. Tschanz,Vivek De +11 more
TL;DR: A fully integrated digitally controlled two-phase buck voltage regulator with on-die solenoid inductors with a planar magnetic core is demonstrated in 14-nm tri-gate CMOS for fine-grained power delivery/management domains of high power density in system-on-chips while enabling ultra-thin (z-height) packages.
Journal ArticleDOI
A RISC-V Vector Processor With Simultaneous-Switching Switched-Capacitor DC–DC Converters in 28 nm FDSOI
Brian Zimmer,Yunsup Lee,Alberto Puggelli,Jaehwa Kwak,Ruzica Jevtic,Ben Keller,Steven Bailey,Milovan Blagojevic,Pi-Feng Chiu,Hanh-Phuc Le,Po-Hung Chen,Nicholas Sutardja,Rimas Avizienis,Andrew Waterman,Brian Richards,Philippe Flatresse,Elad Alon,Krste Asanovic,Borivoje Nikolic +18 more
TL;DR: This work demonstrates a RISC-V vector microprocessor implemented in 28 nm FDSOI with fully integrated simultaneous-switching switched-capacitor DC-DC converters and adaptive clocking that generates four on-chip voltages using only 1.0 V core and 1.8 V IO voltage inputs.
Journal ArticleDOI
High Frequency Buck Converter Design Using Time-Based Control Techniques
Seong Joong Kim,Qadeer A. Khan,Mrunmay Talegaonkar,Amr Elshazly,Arun Rao,Nathanael Griesert,Greg Winter,William J. McIntyre,Pavan Kumar Hanumolu +8 more
TL;DR: Time-based control techniques for the design of high switching frequency buck converters are presented and eliminates the need for wide bandwidth error amplifier, pulse-width modulator (PWM) in analog controllers or high resolution analog-to-digital converter (ADC) and digital PWM in digital controllers.
Journal ArticleDOI
A 10-MHz 2–800-mA 0.5–1.5-V 90% Peak Efficiency Time-Based Buck Converter With Seamless Transition Between PWM/PFM Modes
TL;DR: This work explores pulse frequency modulation (PFM) that is commonly used to improve light load efficiency in voltage-mode controllers and extends its operation to time-based controllers to maintain high efficiency even in the presence of dynamic load variations.
Journal ArticleDOI
Reducing Power Side-Channel Information Leakage of AES Engines Using Fully Integrated Inductive Voltage Regulator
TL;DR: An integrated inductive voltage regulator (IVR) for improving power side-channel-attack resistance of 128-bit Advanced Encryption Standard (AES-128) engines and an all-digital circuit block, referred to as the loop-randomizer, is introduced to randomize the IVR transformations.
References
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A High-Efficiency DC–DC Converter Using 2 nH Integrated Inductors
Joshua Wibben,Ramesh Harjani +1 more
TL;DR: The measured conversion efficiency for the prototype circuit, implemented in a 130-nm CMOS technology, shows more than a 15% efficiency improvement over a linear converter for low output voltages rising to a peak efficiency of 77.9 % for a 0.9 V output.
Journal ArticleDOI
Fully-Integrated On-Chip DC-DC Converter With a 450X Output Range
Sudhir S. Kudva,Ramesh Harjani +1 more
TL;DR: The design, implemented in IBM 130 nm CMOS technology, achieves a peak efficiency of 77% at reduced temperature of 8°C and has a maximum efficiency of 74.5% under normal operating conditions.
Proceedings ArticleDOI
Fully integrated on-chip DC-DC converter with a 450x output range
Sudhir S. Kudva,Ramesh Harjani +1 more
TL;DR: The design, implemented in the IBM 130nm CMOS technology achieves a peak efficiency of 74.5% and can operate over a 450X power range, which represents the best reported power range for a high-efficiency fully integrated on-chip power converter.
Proceedings ArticleDOI
Automated Digital Controller Design for Switching Converters
TL;DR: An approach to automated digital controller design for switching power converters is presented, starting from an experimentally identified frequency response, and parameters of the converter transfer function are estimated using a least logarithmic squares method.
Journal ArticleDOI
A Fully Integrated CMOS 800-mW Four-Phase Semiconstant ON/OFF-Time Step-Down Converter
Mike Wens,Michiel Steyaert +1 more
TL;DR: In this paper, a fully integrated dc-dc four-phase stepdown converter in a 130-nm 1.2-V CMOS technology is realized with integrated metal-track inductors and integrated MOS and MIM capacitors.