UC Berkeley
UC Berkeley Previously Published Works
Title
A Minimally Invasive 64-Channel Wireless μeCoG Implant
Permalink
https://escholarship.org/uc/item/1rb9m5f5
Journal
IEEE Journal of Solid-State Circuits, 50(1)
ISSN
0018-9200
Authors
Muller, R
Le, HP
Li, W
et al.
Publication Date
2015
DOI
10.1109/JSSC.2014.2364824
Copyright Information
This work is made available under the terms of a Creative Commons Attribution-
NonCommercial-NoDerivatives License, availalbe at
https://creativecommons.org/licenses/by-nc-nd/4.0/
Peer reviewed
eScholarship.org Powered by the California Digital Library
University of California
This article has been accepted for inclusion in a future issue of this journal. Content is final as presented, with the exception of pagination.
IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 5 0, NO. 1, JANUARY 2015 1
A Minimally Invasive 64-Channel Wireless
μECoG Implant
Rikky Muller, Member, IEEE, Hanh-Phuc Le, Member, IEEE,WenLi, Student Member, IEEE,
Peter Ledochowitsch, Member, IEEE, Simone Gambini, Member, IEEE, Toni Bjorninen, Member, IEEE,
Aaron Koralek, Student Member, IEEE, Jose M. Carmena, Senior Member, IEEE,
Michel M. Maharbiz, Senior Member, IEEE, Elad Alon, Senior Member, IEEE, and Jan M. Rabaey, Fellow, IEEE
Abstract—Emerging applica
tions in brain–machine interface
systems require high-resolution, chronic mu l tisite cortical record-
ings, which cannot be obtained with existing tech nologies du e
to high power consumpt
ion, high invasiveness, or inability to
transmit data wirelessly. In this paper, we describe a microsystem
based on electrocorticography (ECoG) that overcomes these dif-
ficulties, enabling
chronic recording and wireless transmission of
neural signals from the surface of the cerebral cortex. The d evice
is comprised of a highly flexible, high-density, polymer-based
64-channel ele
ctrode array and a flexible antenna, bonded to
2.4 mm × 2.4 mm CMOS integrated circuit (IC) that performs
64-channel acquisition, wireless pow er and data transmission. The
IC digitizes
the signal from each electrode at 1 kS/s w ith 1.2 μV
input referred noise, and transmits the serialized data using a
1 Mb/s backscattering modulator. A dual-mode power-receiving
rectifier r
educes data-dependent supply ripple, enabling the inte-
gration of small decoupling capacitors on chip and eliminating the
need for external components. Design tech niqu es in the wireless
and base
band circuits result in over 16× reduction in die area with
a simultaneous 3× improvement in power efficiency over the state
of the art. The IC consumes 225 μW and can be powered by an
exter
nal reader transmitting 12 mW at 300 MHz, which is over 3×
lower than IEEE and FCC regulations.
Manuscript received April 28, 2014; revised August 03, 2014, September 12,
2014; accepted October 14, 2014. This paper was approved by Guest Editor
David Stoppa.
R. Muller is with the Departm ent of Electrical Engine ering and Computer Sci-
ence, University of Califor ni a, Berkeley, CA 94720 USA, and also with Cortera
Neurotechnologies Inc., Berkeley, CA 94704 USA.
H.-P. Le is with the Depa rtm ent of Electrical Engineering an d Computer Sc i-
ence, University of California, Berkeley, C A 94720 USA, and also with Lion
Semiconductor Inc., Berkeley, CA 94720 USA.
W. Li is with the Dep artment of Ele ctrical Engineering and Computer Sci-
ence, University of California, Berkeley, CA 94720 USA.
P. Ledo chowitsch is with the Department of Bio en gin eer ing , University of
California, Berkeley, CA 94720 USA and University of San Francisco, San
Francisco, CA 94143 USA, and also w ith the Allen Institute for B r ain Science,
Seattle, WA 981 03 USA.
S. Gambini is with San Francisco, CA 94103 USA.
T. Bjorninen is with Tampere University of Technology, FI-33101 Tampere,
Finland.
A. Koralek is w ith the Hellen Wills Neuroscience Institute, University of Ca l-
ifornia, Berkeley, CA 94720 USA.
J. Carmena is with the Department of Electrical Engineering and Com p ut er
Science and th e Hellen Wills Neuroscience Institute, University of California,
Berkeley, CA 9 4720 USA.
M. Maharbiz is with the Department of Electric al Engin eering and Computer
Science, University of California, Berkeley, CA USA, and also with the D epart-
ment of Bioengineering, University of California, Berkeley, CA 94720 USA and
University of San Francisco, San Francisco, CA 94143 USA.
E. Alon, and J. Rabaey are with the Department of Electrical Engineering and
Computer Science, University of California, Berkeley, CA 94720 USA.
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/JSSC.2014.2364824
Index Terms—Brain, ECoG, EE
G, implant, in vivo,lowpower,
neural, recording, rectifier, wireless.
I. INTRODUCTION
I
N ORDER to realize the vision of fully autonomous
brain–machine interface (BMI) systems, neural implant
devices must no t only be effective in their function, but should
also meet clinical constraints such as ease of implantation,
longevity, safety, and small size. Substantial improvements in
neural implant safety, longevity, and form factor are needed
to translate existing multisite neural recording systems into
technology suitable for l ong -t erm use in patients.
Table I shows the tradeoffs in commonly used neural
recording modalities, particularly highlighting issues that affect
clinical viability and information content relevant to the design
of neural prosthetics. Until recently, the neuroscience commu-
nity has largely focused on action potential (AP) recording as
the modality of choice for BMI. Today, AP recording remains
the highest resoluti on recording mod alit y but comes at the price
of tissue scarring in the br a in, resulting in signal degradation
over the course of several m onths [1]. The least invasive
solution, electroencephalography (EEG), does not provide
sufficient resolution for most BMI applications [2]. Electro-
corticography (ECoG) is an electrophysiological technique
where electrical potentials are recorded from the surface of the
cerebral cortex. Since the implant does not pierce the cortex,
ECoG has the potential for longer signal stability than AP
recording [2]–[4] and provides a higher resolution signal than
EEG. Furthermore, ECoG is commonly used in neurosurgical
procedures to perform functional cortical mapping. Because of
its lower invasiveness and higher longev ity, ECoG is gaining
popularity in a variety of BMI applications. However, today’s
clinical ECoG implants are large, have l ow spatial resolution
(0.4–1 cm)
1
and offer only cumbersome wired operation.
In this pap er, we describe a minimally invasive, 64-channel
wireless ECoG microsystem [5] that overcomes these lim ita-
tions and enables chronic and stable neural recording. All im-
plantable components are placed at the surface of the cortex,
reducing surgical complexity and enabling complete closure of
the surgical site, gr eatl y reducin g the risk of infection. Wireless
1
[Online]. Available: ww w.adtechmedical.com
0018-9200 © 2014 IEEE. Personal use is permitted, but republication/redistribution requ i res IEEE permissio n .
See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for inclusion in a future issue of this journal. Content is final as presented, with the exception of pagination.
2 IEEE JOURNA L OF SOLID-STATE CIRCU ITS , VOL. 50, NO. 1, JANUARY 2015
TABLE I
N
EURAL SIGNAL COMPARISON
powering and readou t are com bined with a microfabricated an-
tenna and electrode grid that has
higher electro de density
than clinical ECoG arrays, providing spatial sampling of cor-
tical function and volitional decoupli ng in BMI [4] approaching
today’s penetrating electrodes. Area and power reduction tech-
niques in the baseband and wireless subsystem result in over an
order o f magnitude in integrated circuit (IC) area reduction with
a simultaneous
improvement in power efficiency over the
state of the art. The low power consumption o f the IC, together
with the antenna integration strategy, enables remote powering
at a power level three times lower than established safety lim its
[6], while the small size and flex ibi lit y of the implant minimizes
the foreign body response.
This paper describes the design, fabrication, and characteri-
zation of the complete ECoG m icrosystem and focuses in detail
on the design of the IC. The rest of this paper is organized as fol-
lows. In Section II, we introduce the
ECoG system concept and
discuss the advantages, challenges, and technologies involved
in the realization of the system. Section III details the design
of the IC, emphasizing designs that are key to miniaturization
and power efficiency. E lectronic and in vivo measurement re-
sults are described in Sections IV and V, respectively. Finally,
conclusions will be given in Section VI.
II. S
YSTEM ARCH ITECTURE
A. ECoG System Concept
The wireless
ECoG device pictured in Fig. 1 has four main
components, given here.
1) A microfabricated, sub-m m resolution E CoG grid for
neural recordings. The electrode grid is manufactured
using only materials that hav e been approved by the
FDA for chronic implantation, specifically, Parylene C
(a class-IV bioimplantable polymer) and platinum. The
10
m thin Parylene C substrate has a Young’s modulus
GPa, and is comparable in flexibility to 3.5 m
thin Polyimide (
GPa). The grid is sufficiently
flexible to conform to the highly folded cortical surface.
2) A n IC capable of digitizing the voltage present on the elec-
trodes and that integrates circuitry to receive power and
Fig. 1. (a) ECoG system concept. (b) Pho tograph of microfabricated
components.
transmit the recorded signals wirelessly across the skull,
removing the need for percutaneous plugs and cables.
3) An antenna that is monolithically integrated with the
ECoG sensor grid and is used to co uple w ireless power
and transmit data wirelessly across the skull.
4) A n external reader that provides power to the imp lant and
receives backscattered signals that are decoded into a data
stream.
B. System Consideration: Microfabricated High-Density
Electrodes
In the last decade, high-density micron-scale ECoG (
ECoG)
grids have gain ed increased traction among neurosurgeons for
more precise mapping of s eizure onset zones, eloquent cortex,
and for clinical research [7], [8]. For a clinically relevant
ECoG device, the overall form factor should meet the fol-
lowing conditions: 1 ) higher density than any
ECoG available
for c linical use (400
m electrode pitch, 8 8channels);
2) sufficiently large area to be interesting for use in humans,
e.g., for comm unication BMI [9 ] (4 mm
4 mm total area
of the sensor array); and 3) sufficiently small that it can still
be tested on the cortex of a rat (6.5 mm
6.5 mm total head
size, including antenna). Fabrication of these
ECoG grids
using traditional manufacturing techniques has p ro ven difficult.
For example, Ad-tech Medical, the current market leader in
clinical ECoG electrodes, had to recall
ECoG arrays manu-
factured using microwires embedded in silastic pillars because
of adverse reactions including seizures and hemorrhaging.
2
Informed by pioneering c ontribution s [10 ] and [11], in 2011,
we reported a multilayer large-area high-density
ECoG (256
channels, 500
m electrode spacing) [12]. Parylene C was used
as both substrate and insulator b etween conductive layers and
employed a thermocompression-bonding paradigm to simp lify
interconnection. This technology is also used to realize the
sensors used in this work.
1) Wafer-Level
ECoG Fabricatio n: Fig. 2 shows cross-sec-
tional diagrams of the individual processing. Parylene C (poly-
para-chloro-xylelene, 5
m/layer) wa s conformally deposited
onto a silicon carrier w afer. A stack of Pt-Au-Pt was electron-
beam evaporated and patterned by lift-off. A second layer of
parylene was deposited and vias were patterned in the parylene
by oxygen plasma reactive ion etching (RIE). The above process
2
See Class 1 recall notice: http ://www.fda.gov/medicaldevices/safety/
listofrecalls/ucm3427 97 .htm
This article has been accepted for inclusion in a future issue of this journal. Content is final as presented, with the exception of pagination.
MULLER et al.: MINIMALLY INVASIVE 64-CHANNEL WIRELESS ECOG IMPLANT 3
Fig. 2. Sensor and antenna fabrication in a cross section.
flow allows for devices that comprise mul tiple conductor layers.
For device simplicity and r obustness, the
ECoG electrodes and
antenna were patterned in a sing le layer by followin g steps 1)–5)
in Fig. 2. Steps 6)–8) can be executed to achieve devices with
more conductor layers at the expense of com plexity. As a final
step, a h igh-temperature (200
C) anneal was performed in a ni-
trogen atmosphere to improve device lifetime [13], [14].
2) Interconnection: Bonding of metalized Parylene C de-
vices to rigid structures can be a formidable challenge. Conven-
tional sold er bonds very po orly to platinum, and ev en if gold was
patterned as the top layer of the metal stack, the metal-Parylene
adhesion is not sufficient to robustly support the mechanical
load. A s a result, a ni sotr opic condu ctive fi lm (ACF) bonding
utilizing a bench-top bonder was adap ted t o con nect high-den -
sity ECoG grids with printed circuit boards (PCBs). A similar
process can be adapted to perform direct chip-to-flex bo nding.
The
ECoG system uses a 4 mm 4 mm, 64-channel array.
The electrodes have diameter 260
m and an electrode trace
spacing of 20
m as shown on the right-hand side of Fig. 3.
Platinum black is electrochemically deposited onto the elec-
trodes, lo wering their impedance and thermal noise contribu-
tion by approximately 1000 times resulting in an average elec-
trode impedance of 10 k
at 100 Hz. The electrodes were sized
as large as possible, allowing space for routing. Two reference
electrodes are pattern ed on either side of the array to provide
a good spatial average reference, and are sized with 64 times
the area of a n in dividual electrode in order to balance the elec-
trode impedances and mitigate 60 Hz noise. In a dd ition, the
electrode diameter
and the electrode edge-to-edge spacing
d obey the “Spatial Nyquist” condition
, acting as
a spatial anti-aliasing filter [7] necessary for consistent spatial
(spectral) pattern analysis of ECoG activity.
C. System Consideration: Microfabricated Antenna and
Power Transfer
Athinfilm loop antenna is monolithically integrated with an
array of neural recording electrodes on the parylene substrate.
The antenna and electrodes were patterned in the same micro-
fabrication process, on the same conductor layer. This integra-
tion strategy allows the system to utilize an antenna diameter
that is significantly larger than the IC, but with the micr on- scale
thinness that provides a high degree of mechanical flexibility o f
Fig. 3. Antenna/electrode diagram and simulation model [17].
the structure, thus keeping the volume o f implanted rigid st ruc-
tures to a minimum. This is a s ignificant advantage with respect
to current state-of-the-art, which utilizes either small-diameter
and inefficient on-chip loops [1 5] or large, rigid off-chip loops
[16].
A single-loop antenna w as chosen for the implant geometry
for ease of fabrication with the electrodes in a single mask
process. As described in [17], the ohmic loss in a 250 nm
sub-skin-depth conductor is significant, making it favorable
to use a sing le-turn geometry where the cond uctor length is
minimal. The electrode grid dimensions determined the loop
inner diameter of 5.8 m m. A gap is left on one anten na ed ge
for m icrochip placement or routing of the electrode leads,
as shown in Fig. 3. The loop trace width was optimized to
minimize ohmic loss in the sub-skin-depth conductor due to
current crowding. A width of 0.7 mm degrades the link gain by
only 0.5 dB and was t herefore chosen for th is desig n. The loss
can be reduced to 0.1 dB by increasing the width to 1.2 mm at
the expense of met a lli zatio n and implant area.
Simulations of t he antenna pair were conduct ed with ANSYS
HFSS to predict overall link power transfer efficiency. The
simulation model is illustrated in Fig. 3. It consists of a layered
tissue m odel of th e human head with frequency-dependent
dielectric properties given in [18], a single-turn loop im -
planted antenna enclosing the array of 64 electrodes, and
an external transmit antenna. The external antenna utilizes a
segmented-loop structure with series capacitors connecting
each loop segment. This geometry forces the current in-phase
and reduce electric-field hot spots that violate regulated limits
on the Specific Absorption Rate (SAR) of human tissue, as
described in [19]. Simulations show that a 15 mm external
antenna diameter optimizes link gain betw een the antenna
pair. The simulated link g ain of the antenn a pair is shown at
the top of Fig . 4, with a local maximum at 300 MHz corre-
sponding to a
15.5 dB unidirectional gain. Measured link
gain versus simulated link gain is detailed in [17] and exhibits
good agreement. At 300 MHz, the maximum RF power that
can be transmitted safely into tissue (Fig. 4, center) is 35 mW,
which is limited by the SAR of tissue and is regulated by the
IEEE [6]. The corresponding maximum power available from
the implant an tenn a is 800
W, which over 3 times greater
than the power demands of the IC, leaving a safe m argin to
compensate the any additional loss due biological variability or
implant misalignment by increasing the transmission power.
This article has been accepted for inclusion in a future issue of this journal. Content is final as presented, with the exception of pagination.
4 IEEE JOURNA L OF SOLID-STATE CIRCU ITS , VOL. 50, NO. 1, JANUARY 2015
Fig. 4. Top: simulated link gain. Center: maximum allowable transmit power,
Bottom: corresponding received power versus frequency.
III. INTEGRATED CIRCUIT
A. Chip Architecture
The IC is the core of the microsystem. This IC should be
optimized fo r b oth low power consumption (to minimize the
power transmitted by the reader and p rolong its battery life) and
area occupation. Since the IC is the only rigid component of the
system, low area occupation is particularly critical. In addition,
no external components other the antenna and electrodes should
be utilized, demanding innovative power conversion techniques
to minimize the u se of energy-storage devices.
A block diagram of the IC is show n in Fig. 5. The baseband
signal acquisition consists of a 64-channel front-end array.
Digital outputs of 1 kS/s, 16 bit are serialized into a 1 Mbps
data stream. Wireless transmission is p e rformed b y mo dulatin g
the impedance of an on-chip matching network in order to
backscatter the incident RF to the external reader. The data
stream is Miller-encoded prior to backscattering to m inim ize
the effect of carrier leakage on bit-error rate (BER) in the
interrogator. The power management unit (PMU) consists of
RF-to-dc conversion, a low-d ro pou t linear regu lato r ( LD O) and
a dc-to-dc converter [20], that provide 0.5 V a nd 1 .0 V to the
chip, respectively. Clock recovery and division are also imple-
mented as part of the wireless subsystem. Design techniques
in the front-end signal acquisition circuits and in the codesign
of the power management/co mm un ication subunit are key to
miniaturization and power efficiency and will be discussed in
detail in this section.
Fig. 5. Integrated circuit block diagram.
B. Neu r al Sig nal Acquisition
ECoG signals have low amplitudes of tens t o hundred s of
Vs
and occupy a low frequency of ap pro xim a tely 1–5 00 Hz. The
power spectrum of the signal e x hibits a low-pass
,
profile. ECoG signals are commonly analyzed in the frequency
domain. Higher frequency bands such as the high-
(above
65 Hz) have low signal power, but are often the signals of
interest when monitoring awake, sensorimotor activity [21].
In addition, a large dc offset of up to tens of mV, caused by
electrochemical processes at the electrode/brain interface, can
be present at the input. The front-end mu st amplify and digitize
the small in -band s ignal i n the presence of a large offset,
while only introducing
1 Vrms additional noise. Due to the
low-frequency nature of the signals, mitigation of
noise is
vital to this end .
1) State-o f-the-Art and Proposed Architecture: Several
low-noise EE G /E CoG amplifiers have been reported in recent
literature [22]–[25]. While good p ower efficiencies have been
achieved [22], the resulting die area per amplifier in even the
smallest implem entatio ns [24] makes arrays of more than eight
amplifiers impractical, thus necessitating substantial reduction
in die area. The state of the art has utilized chopped neura l in-
strumentation amplifiers for this purpose, which can suffer from
large area occupation for two reasons. In one implementation,
the chopper switches are placed between the ac coupling capac-
itors and the input d evices of the amplifier core. This causes the
switched capacitor resistance introduced by chopping to realize
ahigh-passfilter with the ac coupling capacitors themselves,
demanding prohibitively large values of capacitance and area
[25]. For example, for 10 kHz chopping f requency
and 100 fF parasitic capacitance, input capacitors on the order
of 1 nF/side are requ ired to keep the high-pass pole belo w
1 Hz. In a second implemen tation, the chopper switches are
placed before the input capacitors thereby upm odulating the
offset together with th e input signal. The upmodulated offset is
