A quasi-static technique for MOS C-V and surface state measurements

TLDR: In this paper, a quasi-static technique is proposed to obtain the thermal equilibrium MOS capacitance-voltage characteristics. The method is based on a measurement of the MOS charging current in response to a linear voltage ramp, so that the charging current is directly proportional to the incremental MOS capacity.

Abstract: A quasi-static technique is discussed for obtaining the ‘low frequency’ thermal equilibrium MOS capacitance-voltage characteristics The method is based on a measurement of the MOS charging current in response to a linear voltage ramp, so that the charging current is directly proportional to the incremental MOS capacitance With this technique, surface potential and the surface state density can be obtained relatively simply and over a large part of the energy gap on a single sample, while also providing a direct test for the presence of gross nonuniformities in MOS structures This method has been used to determine the surface state distribution at the interface of a bias grown steam oxide and 10 ω-cm n -type silicon, and the results are compared with composite measurements using the conductance technique for a similar interface The sensitivity for surface state density measurements is estimated to be of the order of 10 10 states per cm 2 eV near mid-gap for 10 ω-cm silicon and improves with decreasing doping density Some applications and limitations are also briefly discussed