Journal ArticleDOI
A theory of transistor cutoff frequency (f T ) falloff at high current densities
TLDR
In this paper, it was shown that the observed falloff in the f T of a transistor at high currents is due to the spreading of the neutral base layer into the collector region of the device at high current densities.Abstract:
It is shown that the observed falloff in the f T of a transistor at high currents is due to the spreading of the neutral base layer into the collector region of the device at high current densities. The base layer spreading mechanism derives from an analysis of the effect of the current-dependent buildup of the mobile-carrier space-charge density in the collector transition layer. Calculations show that at sufficiently high collector current levels, the mobile space-charge density in the collector transition layer cannot be considered negligible in comparison to the fixed charge density of that region. The over-all effect of taking the mobile space charge into account in analyzing the collector transition region is that, at high current densities, the transition region boundary adjacent to the neutral base layer is displaced toward the collector metal contact with increasing collector current. The attendant widening of the neutral base layer results in the observed, high-current falloff in f T . The application of this theory to transistor structures of both the alloy and mesa variety yields, in each case, calculated curves of f T vs I c which are in reasonably good agreement with experiment.read more
Citations
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Book
Fundamentals of Modern VLSI Devices
Yuan Taur,Tak H. Ning +1 more
TL;DR: In this article, the authors highlight the intricate interdependencies and subtle tradeoffs between various practically important device parameters, and also provide an in-depth discussion of device scaling and scaling limits of CMOS and bipolar devices.
Journal ArticleDOI
A self-consistent iterative scheme for one-dimensional steady state transistor calculations
TL;DR: In this paper, a self-consistent iterative scheme for the numerical calculation of dc potentials and currents in a one-dimensional transistor model is presented, where boundary conditions are applied only at points representing contacts.
Journal ArticleDOI
An integral charge control model of bipolar transistors
H.K. Gummel,H. C. Poon +1 more
TL;DR: A compact model of bipolar transistors suitable for network analysis computer programs is presented, through the use of a new charge control relation linking junction voltages, collector current, and base charge, which substantially exceeds that of existing models of comparable complexity.
Journal ArticleDOI
Design considerations for very-high-speed Si-bipolar IC's operating up to 50 Gb/s
Hans-Martin Rein,M. Moller +1 more
TL;DR: In this paper, design aspects of high-speed digital and analog IC's are discussed which allow the designer to exhaust the high speed potential of advanced Si-bipolar technologies, starting from the most promising circuit concepts and an adequate resistance level, the dimensions of individual transistors in the IC's must be optimized very carefully using advanced transistor models.
Journal ArticleDOI
Computer-aided two-dimensional analysis of bipolar transistors
TL;DR: In this article, a method for solving numerically the two-dimensional (2D) semiconductor steady-state transport equations is described, where Poisson's equation and the two continuity equations are discretized on two networks of different rectangular meshes.
References
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Journal ArticleDOI
P-N-I-P and N-P-I-N junction transistor triodes
TL;DR: The p-n-i-p structure as discussed by the authors uses a collector depletion layer of intrinsic (i-type) semiconductor to reduce collector capacitance and increase the collector breakdown voltage.
Journal ArticleDOI
Two-Dimensional Current Flow in Junction Transistors at High Frequencies
TL;DR: In this paper, the effect of two-dimensional current flow in a junction transistor at high frequencies is analyzed, with particular emphasis on the rectangular geometry employed for grown-junction transistors.
Journal ArticleDOI
Maximum rapidly-switchable power density in junction triodes
TL;DR: In this paper, the authors derived a lower bound of 105-4 × 105watts/cm2 for p-n-p germanium transistors for junction triodes in which the collector depletion layer at peak reverse voltage lies largely in a collector body of conductivity type opposite to that of the base.
Power Transistors
TL;DR: In this article, the objectives of power transistor design are expressed in general terms which make evident the reason for certain trends in the development, and the design theory is discussed in terms of the physical phenomena which are believed to be important at high current densities and high voltages.
Journal ArticleDOI
An analysis of switching effects in high power diffused base silicon transistors
TL;DR: In this article, the authors investigated the switching speed of double diffused silicon transistors in saturating circuits and found that the effective base width was much wider when the transistor was in saturation than when it was under normal operating conditions.