Journal ArticleDOI
Design of an Energy-Efficient CMOS-Compatible NoC Architecture with Millimeter-Wave Wireless Interconnects
Sujay Deb,Kevin Chang,Xinmin Yu,Suman P. Sah,Miralem Cosic,Amlan Ganguly,Partha Pratim Pande,Benjamin J. Belzer,Deukhyoun Heo +8 more
TLDR
The proposed mm-wave wireless NoC (mWNoC) outperforms the corresponding conventional wireline counterpart in terms of achievable bandwidth and is significantly more energy efficient.Abstract:
The Network-on-chip (NoC) is an enabling technology to integrate large numbers of embedded cores on a single die. The existing methods of implementing a NoC with planar metal interconnects are deficient due to high latency and significant power consumption arising out of multihop links used in data exchange. To address these problems, we propose design of a hierarchical small-world wireless NoC architecture where the multihop wire interconnects are replaced with high-bandwidth and single-hop long-range wireless shortcuts operating in the millimeter (mm)-wave frequency range. The proposed mm-wave wireless NoC (mWNoC) outperforms the corresponding conventional wireline counterpart in terms of achievable bandwidth and is significantly more energy efficient. The performance improvement is achieved through efficient data routing and optimum placement of wireless hubs. Multiple wireless shortcuts operating simultaneously further enhance the performance, and provide an energy-efficient solution for design of communication infrastructures for multicore chips.read more
Citations
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Journal ArticleDOI
Cycle-Accurate Network on Chip Simulation with Noxim
TL;DR: Noxim is presented, an open, configurable, extendible, cycle-accurate NoC simulator developed in SystemC, which allows to analyze the performance and power figures of both conventional wired NoC and emerging WiNoC architectures.
Journal ArticleDOI
Architecture and Design of Multichannel Millimeter-Wave Wireless NoC
TL;DR: This paper introduces design methodology for a wireless NoC with multiple nonoverlapping channels and presents both the physical layer design and the overall interconnection architecture.
Journal ArticleDOI
A-WiNoC: Adaptive Wireless Network-on-Chip Architecture for Chip Multiprocessors
TL;DR: This paper proposes A-WiNoC, a scalable, adaptable wireless Network-on-Chip architecture that uses energy efficient wireless transceivers and improves network throughput by dynamically re-assigning channels in response to bandwidth demands from different cores.
Journal ArticleDOI
A 1.2-pJ/bit 16-Gb/s 60-GHz OOK Transmitter in 65-nm CMOS for Wireless Network-On-Chip
TL;DR: In this paper, a 60 GHz on-off keying (OOK) transmitter for wireless network-on-chip (WiNoC) applications is presented, which consists of a drive amplifier (DA), a high-speed OOK modulator, and a transformer-coupled voltage-controlled oscillator.
Journal ArticleDOI
On-Chip Communication Network for Efficient Training of Deep Convolutional Networks on Heterogeneous Manycore Systems
Wonje Choi,Karthi Duraisamy,Ryan Gary Kim,Janardhan Rao Doppa,Partha Pratim Pande,Diana Marculescu,Radu Marculescu +6 more
TL;DR: In this paper, a hybrid Network-on-Chip (NoC) architecture was proposed for energy-efficient training of CNNs on heterogeneous manycore platforms. But, the NoC architecture is not suitable for large-scale CNN architectures.
References
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Related Papers (5)
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