790 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 34, NO. 6, JUNE 1999
Jitter and Phase Noise in Ring Oscillators
Ali Hajimiri, Sotirios Limotyrakis, and Thomas H. Lee, Member, IEEE
Abstract—A companion analysis of clock jitter and phase noise
of single-ended and differential ring oscillators is presented. The
impulse sensitivity functions are used to derive expressions for the
jitter and phase noise of ring oscillators. The effect of the number
of stages, power dissipation, frequency of oscillation, and short-
channel effects on the jitter and phase noise of ring oscillators is
analyzed. Jitter and phase noise due to substrate and supply noise
is discussed, and the effect of symmetry on the upconversion of
1/
f
noise is demonstrated. Several new design insights are given
for low jitter/phase-noise design. Good agreement between theory
and measurements is observed.
Index Terms—Design methodology, jitter, noise measurement,
oscillator noise, oscillator stability, phase jitter, phase-locked
loops, phase noise, ring oscillators, voltage-controlled oscillators.
I. INTRODUCTION
D
UE to their integrated nature, ring oscillators have be-
come an essential building block in many digital and
communication systems. They are used as voltage-controlled
oscillators (VCO’s) in applications such as clock recovery
circuits for serial data communications [1]–[4], disk-drive read
channels [5], [6], on-chip clock distribution [7]–[10], and
integrated frequency synthesizers [10], [11]. Although they
have not found many applications in radio frequency (RF),
they can be used for some low-tier RF systems.
Recently, there has been some work on modeling jitter
and phase noise in ring oscillators. References [12] and [13]
develop models for the clock jitter based on time-domain
treatments for MOS and bipolar differential ring oscillators,
respectively. Reference [14] proposes a frequency-domain
approach to find the phase noise based on an linear time-
invariant model for differential ring oscillators with a small
number of stages.
In this paper, we develop a parallel treatment of frequency-
domain phase noise [15] and time-domain clock jitter for ring
oscillators. We apply the phase-noise model presented in [16]
to obtain general expressions for jitter and phase noise of the
ring oscillators.
The next section briefly reviews the phase-noise model
presented in [16]. In Section III, we apply the model to timing
jitter and develop an expression for the timing jitter of oscilla-
tors, while Section IV provides the derivation of a closed-form
expression to calculate the rms value of the impulse sensitivity
function (ISF). Section V introduces expressions for jitter and
phase noise in single-ended and differential ring oscillators
Manuscript received April 8, 1998; revised November 2, 1998.
A. Hajimiri is with the California Institute of Technology, Pasadena, CA
91125 USA.
S. Limotyrakis and T. H. Lee are with the Center for Integrated Systems,
Stanford University, Stanford, CA 94305 USA.
Publisher Item Identifier S 0018-9200(99)04200-6.
in long- and short-channel regimes of operation. Section VI
describes the effect of substrate and supply noise as well as
the noise due to the tail-current source in differential struc-
tures. Section VII explains the design insights obtained from
this treatment for low jitter/phase-noise design. Section VIII
summarizes the measurement results.
II. P
HASE NOISE
The output of a practical oscillator can be written as
(1)
where the function
is periodic in 2 and and
model fluctuations in amplitude and phase due to internal
and external noise sources. The amplitude fluctuations are
significantly attenuated by the amplitude limiting mechanism,
which is present in any practical stable oscillator and is
particularly strong in ring oscillators. Therefore, we will
focus on phase variations, which are not quenched by such
a restoring mechanism.
As an example, consider the single-ended ring oscillator
with a single current source on one of the nodes shown in
Fig. 1. Suppose that the current source consists of an impulse
of current with area
(in coulombs) occurring at time
This will cause an instantaneous change in the voltage of that
node, given by
(2)
where
is the effective capacitance on that node at
the time of charge injection. This produces a shift in the
transition time. For small
the change in the phase is
proportional to the injected charge
(3)
where
is the voltage swing across the capacitor and
The dimensionless function is
the time-varying proportionality constant and is periodic in 2
It is large when a given perturbation causes a large phase shift
and small where it has a small effect [16]. Since
thus
represents the sensitivity of every point of the waveform to a
perturbation,
is called the impulse sensitivity function.
The time dependence of the ISF can be demonstrated by
considering two extreme cases. The first is when the impulse
is injected during a transition; this will result in a large phase
shift. As the other case, consider injecting an impulse while
the output is saturated to either the supply or the ground.
This impulse will have a minimal effect on the phase of the
oscillator, as shown in Fig. 2.
0018–9200/99$10.00 1999 IEEE
HAJIMIRI et al.: JITTER AND PHASE NOISE IN RING OSCILLATORS 791
Fig. 1. Five-stage inverter-chain ring oscillator.
Fig. 2. Effect of impulses injected during transition and peak.
Being interested in its phase we can treat an oscillator
as a system that converts voltages and currents to phase. As
is evident from the discussion leading to (3), this system is
linear for small perturbations. It is also time variant, no matter
how small the perturbations are.
Unlike amplitude changes, phase shifts persist indefinitely,
since subsequent transitions are shifted by the same amount.
Thus, the phase impulse response of an oscillator is a time-
varying step. Also note that as long as the introduced change
in the voltage due to the current impulse is small, the resultant
phase shift is linearly proportional to the injected charge, and
hence the transfer function from current to phase is linear.
The unit impulse response of the system is defined as the
amount of phase shift per unit current impulse [16]. Based
on the foregoing argument, we obtain the following time-
dependent impulse response:
(4)
where
is a unit step.
Knowing the response to an impulse, we can calculate
in response to any injected current using the superposition
integral
(5)
792 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 34, NO. 6, JUNE 1999
where represents the noise current injected into the node
of interest. Note that the integration arises from the closed-
loop nature of the oscillator. The single-sideband phase-noise
spectrum due to a white-noise current source is given by [16]
1
(6)
where
is the rms value of the ISF, is the single-
sideband power spectral density of the noise current source,
and
is the frequency offset from the carrier. In the case
of multiple noise sources injecting into the same node,
represents the total current noise due to all the sources and is
given by the sum of individual noise power spectral densities
[17]. If the noise sources on different nodes are uncorrelated,
the waveform (and hence the ISF) of all the nodes are the same
except for a phase shift, assuming identical stages. Therefore,
the total phase noise due to all
noise sources is times
the value given by (6) (or 2
times for a differential ring
oscillator).
From (5), it follows that the upconversion of low-frequency
noise, such as 1
noise, is governed by the dc value of the
ISF. The corner frequency between 1
and 1 regions in
the spectrum of the phase noise is called
and is related to
the 1
noise corner through the following equation [16]:
(7)
where
is the dc value of the ISF. Since the height of the
positive and negative lobes of the ISF is determined by the
slope of the rising and falling edges of the output waveform,
respectively, symmetry of the rising and falling edges can
reduce
and hence the upconversion of 1 noise.
III. J
ITTER
In an ideal oscillator, the spacing between transitions is
constant. In practice, however, the transition spacing will
be variable. This uncertainty is known as clock jitter and
increases with measurement interval
(i.e., the time de-
lay between the reference and the observed transitions), as
illustrated in Fig. 3. This variability accumulation (i.e., “jitter
accumulation”) occurs because any uncertainty in an earlier
transition affects all the following transitions, and its effect
persists indefinitely. Therefore, the timing uncertainty when
seconds have elapsed is the sum of the uncertainties
associated with each transition.
The statistics of the timing jitter depend on the correlations
among the noise sources involved. The case of each transi-
tion’s being affected by independent noise sources has been
considered in [12] and [13]. The jitter introduced by each stage
is assumed to be totally independent of the jitter introduced
by other stages, and therefore the total variance of the jitter is
given by the sum of the variances introduced at each stage. For
ring oscillators with identical stages, the variance will be given
by
where is the number of transitions during and
1
A more accurate treatment [17] shows that the phase noise does not grow
without bound as
f
o
approaches zero (it becomes flat for small values of
f
o
)
:
However, this makes no practical difference in this discussion.
Fig. 3. Clock jitter increasing with time.
Fig. 4. RMS jitter versus measurement time on a log–log plot.
is the variance of the uncertainty introduced by one stage
during one transition. Noting that
is proportional to
the standard deviation of the jitter after seconds is [13]
(8)
where
is a proportionality constant determined by circuit
parameters.
Another instructive special case that is not usually consid-
ered is when the noise sources are totally correlated with one
another. Substrate and supply noise are examples of such noise
sources. Low-frequency noise sources, such as 1
noise, can
also result in a correlation between induced jitter on transitions
over multiple cycles. In this case, the standard deviations rather
than the variances add. Therefore, the standard deviation of the
jitter after
seconds is proportional to
(9)
where
is another proportionality constant. Noise sources
such as thermal noise of devices are usually modeled as
uncorrelated, while substrate and supply-noise sources, as
well as low-frequency noise, are approximated as partially
or fully correlated sources. In practice, both correlated and
uncorrelated sources exist in a circuit, and hence a log–log
plot of the timing jitter
versus the measurement delay
for an open-loop oscillator will demonstrate regions with
slopes of 1/2 and 1, as shown in Fig. 4.
HAJIMIRI et al.: JITTER AND PHASE NOISE IN RING OSCILLATORS 793
Fig. 5. ISF for ring oscillators of the same frequency with different number of stages.
In most digital applications, it is desirable for to
decrease at the same rate as the period
In practice, we wish
to keep constant the ratio of the timing jitter to the period.
Therefore, in many applications, phase jitter, defined as
(10)
is a more useful measure.
An expression for
can be obtained using (5). As shown
in Appendix A, for
or where is an
integer, the phase jitter due to a single white noise source is
given by
(11)
Using (10) and (11), the proportionality constant
in (8) is
calculated to be
(12)
IV. C
ALCULATION OF THE ISF FOR RING OSCILLATORS
To calculate phase noise and jitter using (6) and (12), one
needs to know the rms value of the ISF. Although one can
always find the ISF through simulation, we obtain a closed-
form approximate equation for the rms value of the ISF of ring
oscillators, which usually makes such simulations unnecessary.
It is instructive to look at the actual ISF of ring oscillators to
gain insight into what constitutes a good approximation. Fig. 5
shows the shape of the ISF for a group of single-ended CMOS
ring oscillators. The frequency of oscillation is kept constant
(through adjustment of channel length), while the number of
stages is varied from 3 to 15 (in odd numbers). To calculate the
ISF, a narrow current pulse is injected into one of the nodes
of the oscillator, and the resulting phase shift is measured a
few cycles later in simulation.
As can be seen, increasing the number of stages reduces the
peak value of the ISF. The reason is that the transitions of the
normalized waveform become faster for larger
Since the
sensitivity during the transition is inversely proportional to the
slope, the peak of the ISF drops. It should be noted that only
the peak of the ISF is inversely proportional to the slope, and
Fig. 6. Approximate waveform and ISF for ring oscillator.
Fig. 7. Relationship between rise time and delay.
this relation should not be generalized to other points in time.
Also, the widths of the lobes of the ISF decrease as
becomes
larger, since each transition occupies a smaller fraction of the
period. Based on these observations, we approximate the ISF
as triangular in shape and with symmetric rising and falling
edges, as shown in Fig. 6. The case of nonsymmetric rising
and falling edges is considered in Appendix B.
The ISF has a maximum of 1
where is the
maximum slope of the normalized waveform
in (1). Also, the
width of the triangles is approximately 2
, and hence the
slopes of the sides of the triangles are
1. Therefore, assuming
equality of rise and fall times,
can be estimated as
(13)
794 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 34, NO. 6, JUNE 1999
Fig. 8. RMS values of the ISF’s for various single-ended ring oscillators versus number of stages.
On the other hand, stage delay is proportional to the rise time
(14)
where
is the normalized stage delay and is a proportion-
ality constant, which is typically close to one, as can be seen
in Fig. 7.
The period is 2
times longer than a single stage delay
(15)
Using (13) and (15), the following approximate expression for
is obtained:
(16)
Note that the 1
dependence of is independent of
the value of
Fig. 8 illustrates for the ISF shown in
Fig. 5 with plus signs on log–log axes. The solid line shows
the line of
which is obtained from (16) for
To verify the generality of (16), we maintain a
fixed channel length for all the devices in the inverters while
varying the number of stages to allow different frequencies of
oscillation. Again,
is calculated, and is shown in Fig. 8
with circles. We also repeat the first experiment with a different
supply voltage (3 V as opposed to 5 V), and the result is shown
with crosses. As can be seen, the values of
are almost
identical for these three cases.
It should not be surprising that
is primarily a function
of
because the effect of variations in other parameters,
such as
and device noise, have already been decoupled
from
, and thus the ISF is a unitless, frequency- and
amplitude-independent function.
Equation (16) is valid for differential ring oscillators as
well, since in its derivation no assumption specific to single-
ended oscillators was made. Fig. 9 shows the
for three
sets of differential ring oscillators, with a varying number of
stages (4–16). The data shown with plus signs correspond to
oscillators in which the total power dissipation and the drain
voltage swing are kept constant by scaling the tail-current
sources and load resistors as
changes. Members of the
second set of oscillators have a fixed total power dissipation
and fixed load resistors, which result in variable swings and
for whom data are shown with circles. The third case is
that of a fixed tail current for each stage and constant load
resistors, whose data are illustrated using crosses. Again, in
spite of the diverse variations of the frequency and other
circuit parameters, the 1
dependency of and its
independence from other circuit parameters still holds. In the
case of a differential ring oscillator,
which
corresponds to
is the best fit approximation for
This is shown with the solid line in Fig. 9. A similar result
can be obtained for bipolar differential ring oscillators.
Although
decreases as the number of stages increases,
one should not prematurely conclude that the phase noise can
be reduced using a larger number of stages because the number
of noise sources, as well as their magnitudes, also increases for
a given total power dissipation and frequency of oscillation.
In the case of asymmetric rising and falling edges, both
and will change. As shown in Appendix B, the 1
corner of the phase-noise spectrum is inversely proportional
to the number of stages. Therefore, the 1
corner can be
reduced either by making the transitions more symmetric in
terms of rise and fall times or by increasing the number of
stages. Although the former always helps, the latter has other
implications on the phase noise in the 1
region, as will be
shown in the following section.
