Patent
Method for fabricating a transistor configuration including trench transistor cells having a field electrode, trench transistor, and trench configuration
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TLDR
In this article, a method for fabricating a transistor configuration including at least one trench transistor cell has a gate electrode and a field electrode disposed in a trench below the gate electrode, and the trenches are formed in a semiconductor substrate.Abstract:
A method for fabricating a transistor configuration including at least one trench transistor cell has a gate electrode and a field electrode disposed in a trench below the gate electrode. The trenches are formed in a semiconductor substrate. A drift zone, a channel zone, and a source zone are in each case provided in the semiconductor substrate. According to the invention, the source zone and/or the channel zone are formed at the earliest after the introduction of the trenches into the semiconductor substrate by implantation and diffusion.read more
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Power semiconductor devices and methods of manufacture
Ashok Challa,Alan Elbanhawy,Thomas E. Grebs,Nathan Kraft,Dean E. Probst,Rodney S. Ridley,Steven Sapp,Qi Wang,Chongman Yun,J.G. Lee,Peter H. Wilson,Joseph A. Yedinak,J.Y. Jung,Hocheol Jang,Babak S. Sani,Richard Stokes,Gary M. Dolny,John Mytych,Becky Losee,Adam Selsley,Robert Herrick,James J. Murphy,Gordon K. Madson,Bruce D. Marchant,Christopher L. Rexer,Christopher Boguslaw Kocon,Debra S. Woolsey +26 more
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References
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Power semiconductor devices having improved high frequency switching and breakdown characteristics
TL;DR: The use of the trench-based source electrode instead of a larger gate electrode reduces the gate-to-drain capacitance (CGD) of the UMOSFET and improves switching speed by reducing the amount of gate charging and discharging current that is needed during high frequency operation.
Patent
Process of manufacturing Trench gate semiconductor device having gate oxide layer with multiple thicknesses
TL;DR: In this paper, a keyhole-shaped gate electrode was proposed for a power MOSFET, where the high electric field at the corner of the trench is diminished by increasing the thickness of the gate oxide layer at the bottom of the hole.
Patent
MOS-gated power device having extended trench and doping zone and process for forming same
TL;DR: In this paper, an MOS-gated device consisting of an extended trench in an upper layer of a doped monocrystalline semiconductor substrate of a first conduction type, and substantially filling the trench with a dielectric material was constructed.
Patent
Self-aligned power MOSFET device with recessed gate and source
TL;DR: In this paper, a recessed gate power MOSFET is formed on a substrate (20) including a P-body layer (26), N-drain layer (24), and optional P+ layer (22) for IGBT.
Patent
Trench DMOS transistor having a double gate structure
TL;DR: In this article, a trench DMOS transistor cell is provided, which is formed on a substrate of a first conductivity type, and a body region is located on the substrate. At least one trench extends through the body region and the substrate and an insulating layer lines the trench.
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