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Journal ArticleDOI

Modeling the Combined Effects of Transmission Media and Ground Bounce on Power Supply Induced Jitter

Jai Narayan Tripathi, +2 more
- 01 Aug 2019 - 
- Vol. 61, Iss: 4, pp 1183-1190
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TLDR
An efficient method is presented for estimation of power supply induced jitter (PSIJ) based on advancing the recently proposed EMPSIJ method and developing analytical relationships to handle the combined effect of both the differential transmission lines as well as the ground bounce.
Abstract: 
An efficient method is presented for estimation of power supply induced jitter (PSIJ). The proposed method is based on advancing the recently proposed EMPSIJ method and developing analytical relationships to handle the combined effect of both the differential transmission lines as well as the ground bounce. Practical case studies are presented demonstrating the impact of the ground bounce as well as the transmission media on the PSIJ. The proposed method provides significant speed-up compared to the conventional PSIJ estimation approaches.

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Citations
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Journal ArticleDOI

A Review on Power Supply Induced Jitter

Jai Narayan Tripathi, +2 more
- 01 Mar 2019 - 
TL;DR: The primary focus of this paper is to discuss the modeling of jitter caused by power supply noise (PSN), named power supply induced jitter (PSIJ).
Proceedings ArticleDOI

Analysis of Timing Error Due to Supply and Substrate Noise in an Inverter Based High-Speed Comparator

Vijender Kumar Sharma, +5 more
TL;DR: The closed-form transfer function of the comparator including biasing circuitry, used in PSIJ analysis, is derived using symbolic admittance method and the mathematical model shows an agreement with the simulation and exhibits 7.4% of mean percentage error (MPE).
Proceedings ArticleDOI

Analysing the Impact of Various Deterministic Noise Sources on Jitter in a CMOS Inverter

Muhammed Suhail Illikkal, +2 more
TL;DR: The results obtained from the semi-analytical jitter estimation approach presented in the paper are compared with the results obtained with full SPICE based simulations.
Proceedings ArticleDOI

Extension of EMPSIJ for Estimating the Impact of Substrate Noise on Jitter in a CMOS Inverter

Vijender Kumar Sharma, +2 more
TL;DR: In this article, the authors present an analysis of jitter in a CMOS inverter due to power supply, ground bounce and substrate noise, and the results match reasonably well with mean percentage error (MPE) not exceeding 10%.
DOI

Modeling Power Supply Induced Jitter in a Voltage-Mode Driver with Long Transmission Lines

Diksha Singh, +2 more
TL;DR: In this paper, a semi-analytical approach considering both the spatial and temporal components of the long lines is used and the corresponding equations are derived for a voltage-mode driver circuit, which is validated by comparing the proposed methodology with the conventional approach to estimate PSIJ while inducing different types of noise on power supply.
References
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Journal ArticleDOI

Simulation of high-speed interconnects

Ramachandra Achar, +1 more
TL;DR: In this review paper various high-speed interconnect effects are briefly discussed, recent advances in transmission line macromodeling techniques are presented, and simulation of high- speed interconnects using model-reduction-based algorithms is discussed in detail.
Book

Jitter, Noise, and Signal Integrity at High-Speed

Mike Li
TL;DR: The fundamental terminology, definitions, and concepts associated with JNB and SI, as well as their sources and root causes are introduced, and Dr. Li provides powerful new tools for solving these problems quickly, efficiently, and reliably.
BookDOI

Advanced Flip Chip Packaging

Ho-Ming Tong, +2 more
Proceedings ArticleDOI

Investigating the Impact of Supply Noise on the Jitter in Gigabit I/O Interfaces

R. Schmitt, +3 more
TL;DR: In this article, a detailed analysis of supply noise induced jitter in a high-speed interface is presented, where the sensitivity of the interface circuits to noise is measured as a function of noise frequency.
Journal ArticleDOI

Propagation Delay-Based Expression of Power Supply-Induced Jitter Sensitivity for CMOS Buffer Chain

Xin Jie Wang, +1 more
- 25 Jan 2016 - 
TL;DR: This paper demonstrates a very simple and highly accurate expression of power supply-induced jitter sensitivity transfer function for CMOS buffer chain.