Journal ArticleDOI
Noise-Shaping Gain-Filtering Techniques for Integrated Receivers
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TLDR
A programmable noise-shaped post-mixer gain-filtering circuit for a CMOS Mobile-TV tuner relax the noise-linearity tradeoff in the receiver chain by providing blocker rejection following the mixer outputs.Abstract:
In this paper, a new technique for realizing area-efficient, low-noise filters is introduced. The proposed filter topologies utilize noise shaping techniques to shift the noise of the passive and active filter components out of the passband of the filter. This is illustrated by implementing a programmable noise-shaped post-mixer gain-filtering circuit for a CMOS Mobile-TV tuner. The proposed circuits relax the noise-linearity tradeoff in the receiver chain by providing blocker rejection following the mixer outputs. The filter provides an in-band input referred noise density as low as 7.5 nV/sqrt(Hz). The measured out-of-band IIP3 values are 30 dBV and 31.5 dBV for the 3.8-MHz (DVB-H) and 750-kHz (ISDB-T) modes, respectively. Total current consumption is 5.5 mA from a 1.2-V supply. The gain of the block is programmable to be 0 dB, 8ndB, 14 dB, or 20 dB. The design occupies a die area of 0.28 mm2 in a 65-nm CMOS process covering a frequency band of 700 kHz to 5.2 MHz as a universal mobile-TV integrated baseband gain-filtering solution.read more
Citations
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Journal ArticleDOI
Current-Mode, WCDMA Channel Filter With In-Band Noise Shaping
TL;DR: A novel class of filters (called pipe filters) that features in-band noise reduction is presented and a current mode biquad cell based on cross-connected cascoded devices is introduced that gives in- band high-pass noise shaping and passive pre-filtering of out-of-band blockers.
Journal ArticleDOI
Design Techniques to Improve Blocker Tolerance of Continuous-Time $\Delta\Sigma$ ADCs
Hemasundar Mohan Geddada,Chang-Joon Park,Hyung-Joon Jeon,Jose Silva-Martinez,Aydin Ilker Karsilayan,Douglas A. Garrity +5 more
TL;DR: Design techniques to provide robustness against loop saturation due to blockers in ΣA modulators are presented and a minimally invasive integrated low-pass filter that reduces the most critical adjacent/alternate channel blockers is implemented.
Proceedings ArticleDOI
High speed fully differential second generation current conveyor
TL;DR: In this article, a high speed fully differential second generation current conveyor (FDCCII+) is presented based on using fully differential buffer and class AB push-pull output stage with a new standby current control circuitry.
Patent
Pumped distributed wave oscillator system
Ahmet Tekin,Ahmed Emira +1 more
TL;DR: A Pumped Distributed Wave Oscillator (PDWO) as discussed by the authors provides a high purity accurate signal source with multiple oscillation phases, which opens paths to high performance phased-array transceiver design.
Journal ArticleDOI
Low-Power Channel Select Filters for DVB-H Receivers
Hussain Alzaher,Mohamad Sawan +1 more
TL;DR: The proposed filters are based on the current amplifier and the transresistance amplifier offering alternatives for current-mode and voltage-mode signal processing, respectively, and adoptting one active element per biquad allows optimization of the power consumption.
References
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Book
Understanding Delta-Sigma Data Converters
TL;DR: This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.
Journal ArticleDOI
A 4-MHz CMOS continuous-time filter with on-chip automatic tuning
Francois Krummenacher,N. Joehl +1 more
TL;DR: This paper presents a 3rd order low-pass continuous-time filter with 4 MHz cut-off frequency, integrated in a 3 μm CMOS process, based on the direct simulation of a doubly-terminated LC ladder using capacitors and fully-balanced, current-controlled transconductance amplifiers with extended linear range.
Proceedings Article
A 4-MHz CMOS Continuous-Time Filter with On-Chip Automatic Tuning
Francois Krummenacher,N. Joehl +1 more
TL;DR: In this article, a 3rd order low-pass continuous-time filter with 4 MHz cut-off frequency, integrated in a 3?m CMOS process, is presented, based on direct simulation of a doublyterminated LC ladder using capacitors and fully-balanced, current-controlled transconductance amplifiers with extended linear range.
Journal ArticleDOI
Realisation of gyrators using operational amplifiers, and their use in RC-active-network synthesis
TL;DR: The realisation of negative-impedance convertors and invertors using the bridge-type circuit using the nullor to infinite-gain controlled sources is briefly surveyed and a relevant theorem concerning passivity is proved.