Showing papers in "IEEE Transactions on Circuits and Systems Ii-express Briefs in 2017"

Fast Fixed-time Nonsingular Terminal Sliding Mode Control and its Application to Chaos Suppression in Power System

Abstract: This brief presents a novel control scheme to achieve fast fixed-time system stabilization. Based on fixed-time stability theory, a novel fixed-time stable system is presented. Using the proposed fixed-time stable system, a fast fixed-time nonsingular terminal sliding mode control method is derived. Our control scheme achieves system stabilization within bounded time independent of the initial condition and has an advantage in convergence rate over the existing result of the fixed-time stable control method. The proposed control strategy is applied to suppress chaotic oscillation in power systems, and its effectiveness as well as superiority is verified through numerical simulation. The proposed control strategy can be applied to address the control and synchronization problem for other complex systems.

Robust Sliding Mode Control: An Event-Triggering Approach

Abstract: Event-triggered sliding mode control (SMC) achieves robust performance in the presence of external disturbances. However, this triggering scheme for SMC does not have a global property even for linear time-invariant systems. Here, “global” means that the triggering scheme ensures the stability of the system globally in the state space. Therefore, in this brief, a global event-triggering realization of SMC is proposed. In this proposed scheme, it is established that the system trajectory is attracted toward the sliding manifold and remains within a band thereafter in the presence of uncertainties. The simulation result is given to show the effectiveness of the result.

A Novel CH5 Inverter for Single-Phase Transformerless Photovoltaic System Applications

Abstract: Versatile single-phase voltage source inverters with unipolar voltage pulse and leakage current elimination capability have been extensively investigated for transformerless PV systems in the literature. However, the innovative current source inverters with leakage current elimination capability are not well explored. In this brief, a novel single-phase current source H5 (CH5) inverter is proposed. Only one extra IGBT is needed, but the leakage current can be significantly suppressed with a novel space vector modulation. Finally, the experimental tests are carried out on a single-phase CH5 inverter and the experimental results verify the effectiveness of the proposed topology and space vector modulation.

Memristive Model for Synaptic Circuits

Abstract: As a promising alternative for next-generation memory, memristors provide several useful features such as high density, nonvolatility, low power, and good scalability as compared with conventional CMOS-based memories. In this brief, a voltage-controlled threshold memristive model is proposed, which is based on experimental data of memristive devices. Moreover, the model is more suitable for the design of memristor-based synaptic circuits as compared with other memristive models. The effects of memristance variations are considered in the proposed model to evaluate the behavior of memristive synapses within memristor-based neural networks.

A Wide Input Range Dual-Path CMOS Rectifier for RF Energy Harvesting

Abstract: This brief presents a dual-path CMOS rectifier with adaptive control for ultrahigh-frequency (UHF) RF energy harvesters. The input power range with high power conversion efficiency (high PCE) of the rectifier is extended by the proposed architecture, which includes a low-power path and a high-power path. The dual-path rectifier with an adaptive control circuit is fabricated in a 65-nm CMOS process. Operating at 900 MHz and driving a 147-kΩ load resistor, the measured PCE of this work can be maintained above 20% with an 11-dB input range from -16 to -5 dBm, while only an 8-dB input range can be achieved with traditional single-path rectifiers. A sensitivity of -17.7 dBm is measured with 1-V output voltage across a capacitive load.

Resilient Sampled-Data Control for Markovian Jump Systems With an Adaptive Fault-Tolerant Mechanism

Abstract: This brief investigates the problem of passivity-based resilient sampled-data control for Markovian jump systems subject to actuator faults via an adaptive fault-tolerant mechanism. By constructing a proper Lyapunov function, a set of sufficient conditions is obtained in terms of linear matrix inequalities (LMIs), which ensures that the closed-loop system is stochastically passive. In order to reflect the imprecision in controller, the additive gain variations is considered. Then, the resilient sampled-data control parameters can be determined by solving the obtained LMIs. Finally, an illustrative example is presented to show the validity and applicability of the proposed design technique.

Disturbance-Observer-Based Robust Synchronization Control for a Class of Fractional-Order Chaotic Systems

Abstract: This brief studies the synchronization control for the fractional-order chaotic system subject to input saturation and external unknown disturbances. To handle unknown disturbances, a disturbance observer is designed for the fractional-order chaotic system. A disturbance-observer-based synchronization control scheme is then developed. Under the synchronization control, the asymptotically convergent synchronization errors between two fractional-order chaotic systems can be achieved. The simulation results are presented to show the effectiveness of the proposed new design approach.

Maximum Versoria Criterion-Based Robust Adaptive Filtering Algorithm

Abstract: Using the generalized Gaussian probability density function as the kernel, a generalized correntropy has been proposed. A generalized maximum correntropy criterion (GMCC) algorithm is then developed by maximizing the generalized correntropy. However, the GMCC algorithm has a high steady-state misalignment and involves a high calculation cost of the exponential term (generalized Gaussian kernel). In this brief, we propose a maximum Versoria criterion (MVC) algorithm, which is derived by maximizing the generalized Versoria function, to reduce steady-state misalignment and computational effort as compared to the GMCC algorithm. The MVC algorithm is then tested in system identification and acoustic echo cancellation scenarios, which have demonstrated that the proposed algorithm is robust against non-Gaussian impulsive noises and performs much better than the LMP and GMCC algorithms.

A Simple Third-Order Memristive Band Pass Filter Chaotic Circuit

Abstract: This brief presents a simple third-order inductor-free memristive chaotic circuit, which is derived from a second-order active band pass filter (BPF) by replacing a resistor with an improved memristor and has only three op-amps, two multipliers, three capacitors, and six resistors. The circuit has three unstable saddle-foci and exhibits complex dynamical behaviors, including period, chaos, period doubling bifurcation, coexisting bifurcation modes, and constant Lyapunov exponents (CLEs). Especially, the property of CLEs leads to that the amplitudes of the chaotic signals are linearly controlled by a potentiometer without changing system’s essences. Moreover, hardware circuit using less discrete components is fabricated and experimental verifications are performed, from which the existence of chaos is validated. Compared with other memristive chaotic circuits reported before, the proposed memristive BPF chaotic circuit is inductor-free and topologically simplified, which is only third-order, and much simpler and more intuitive in practical realization.

High-Efficiency Wireless Power Transfer System for Electric Vehicle Applications

Abstract: In this brief, a high-efficiency wireless power transfer (WPT) system for electric vehicle charging application is studied and implemented. Series–series resonant topology with RF feedback design is adopted as the WPT dc–dc stage due to the advantages of circuit simplicity, easy analysis, and control. A 500-W laboratory prototype is built and tested to verify the feasibility of the proposed design. According to the experimental results, high wall-to-battery efficiency and unity power factor can be achieved over an air gap of 15 cm and maximum sliding distance of 10 cm under various power conditions and universal input voltage from 90VAC to 264VAC.

Continuous Class-B/J Power Amplifier Using a Nonlinear Embedding Technique

Abstract: This brief explores the design space for realizable solution of a broadband class-B/J continuous mode of power amplifier (PA). The PA is initially designed at the current-source reference plane with the correct voltage and current waveforms. The intrinsic impedances are then projected to the package reference plane using the model-based nonlinear-embedding technique. An insight is provided into engineering the extrinsic harmonic impedance to rotate clockwise on the Smith chart to be able to match it using a Foster circuit. It is concluded that decreasing the empirical parameter $ {\alpha }$ of a general class-B/J voltage equation with increasing frequency leads to a clockwise trajectory on the Smith chart of the second harmonic at the package plane. In order to validate the advantage of this analysis, the PA is implemented using a 15 W gallium nitride high electron mobility transistor in the frequency range of 1.3 to 2.4 GHz and drain efficiency between 63% and 72% in measurement was achieved over the entire bandwidth.

MAD Gates—Memristor Logic Design Using Driver Circuitry

Abstract: Memristors have recently begun to be explored in arithmetic applications. However, all prior designs for memristor-based gates have had shortcomings in terms of scalability, applicability, completeness, and performance. In this brief, a new low-power gate design, i.e., memristors-as-drivers gates, is proposed, which overcomes each of these issues by combining sense circuitry with the IMPLY operation. By sensing the values of the input memristors as the driver for the output memristor, the delay is reduced to a single step for any Boolean operation, including xor. The area is reduced to at most three memristors for each gate and consumes only 30 fJ. An ${N}$-bit ripple carry adder implementation is proposed, which uses these gates to achieve a total delay of ${N}+1$ with an area of 8${N}$ memristors and their drivers. The individual bits of the proposed adder can be also pipelined, reducing the latency to four steps per addition.

High-Selectivity Tunable Balanced Bandpass Filter With Constant Absolute Bandwidth

Abstract: This brief presents a new and effective approach for designing a high-selectivity tunable balanced bandpass filter (BPF) with constant absolute bandwidth (ABW). The filter is composed of two open-loop resonators with a pair of symmetrically loaded varactor diodes to obtain tunable responses. The major design concept relies on choosing the particular position on the resonator for loading the varactor diodes. The desired variation slopes of the external quality factor and coupling coefficient can be easily obtained for realizing the constant ABW of the tunable BPF. Frequency-dependent source-load coupling between the feed lines are introduced for realizing two adaptive transmission zeros (TZs) on both sides of the tunable passband. Thus, during the frequency-tuning process, high selectivity of the proposed filter can be kept. Meanwhile, the common-mode suppression is optimized to an acceptable level in the frequency-agile range of the differential-mode passband by loading the stub and resistor in the series at the center of the resonator. For demonstration, a tunable balanced BPF with the constant ABW and two TZs is designed and implemented. The simulated and measured results are presented, showing good agreement.

A Novel Approach to Reliable Control of Piecewise Affine Systems With Actuator Faults

Abstract: This brief is devoted to the reliable piecewise affine (PWA) $\mathscr {H}_{\infty }$ static output feedback control problem for PWA systems with actuator faults. The actuator faults are characterized by a Markov process. Specifically, by adopting a state-input augmentation technique, the original closed-loop system is first reformulated into a descriptor PWA system. On the basis of a piecewise-Markovian Lyapunov function, and by exploiting advantage of the redundancy of descriptor system formulation, together with a linearization procedure, the PWA controller synthesis is then presented. It is shown that the desired PWA controller parameters can be attained via solving a linear matrix inequality-based optimization problem. Finally, a simulation example is carried out to confirm the effectiveness and less conservatism of the developed approach.

High Selectivity Wideband Balanced Filters With Multiple Transmission Zeros

Abstract: Two novel high selectivity wideband balanced filters based on open/shorted stubs with multiple transmission zeros are proposed in this brief. Two and four transmission zeros near each passband for the differential mode (DM) can be easily achieved for two balanced filters. In addition, the common mode can be suppressed with three and five transmission zeros with an insertion loss greater than 15 dB/20 dB over a wide frequency band. Two prototypes with 3-dB fractional bandwidths of 67.6% and 37.8% for the DM with an insertion loss greater than 15 dB (7.0–12.7 GHz) are designed and fabricated. A good agreement can be observed between the measured results and the theoretical expectations.

Tunable Dual-Band Filter and Diplexer Based on Folded Open Loop Ring Resonators

Abstract: Tunable dual-band filter and diplexer based on folded open loop ring resonators (OLRRs) are proposed in this brief. Two pairs of OLRRs of different center frequencies are utilized to couple with microstrip transmission lines in these two devices, and there is no extra matching network in the diplexer structure. Maximal magnetic coupling and high isolation can be obtained by placing the resonators at proper positions along the feeding lines. The passband/channel frequencies of the dual-band filter/diplexer can be tuned independently by varying dc bias voltages applied to the varactors loaded at one end of the resonators. In addition, a broad harmonic suppression can be obtained by choosing appropriate lumped elements adding to the OLRRs. The performances of the proposed devices can be verified by the simulated and measured results.

Load Disaggregation Based on Aided Linear Integer Programming

Abstract: Load disaggregation based on aided linear integer programming (ALIP) is proposed. We start with a conventional linear integer programming (IP)-based disaggregation and enhance it in several ways. The enhancements include additional constraints, correction based on a state diagram, median filtering, and linear-programming-based refinement. With the aid of these enhancements, the performance of IP-based disaggregation is significantly improved. The proposed ALIP system relies only on the instantaneous load samples instead of waveform signatures and, hence, works well on low-frequency data. Experimental results show that the proposed ALIP system performs better than conventional IP-based load disaggregation.

Adaptive Filtering Under a Variable Kernel Width Maximum Correntropy Criterion

Abstract: The maximum correntropy criterion (MCC) algorithm with constant kernel width leads to a tradeoff problem in terms of convergence rate and steady-state misalignment. Thus, this brief proposes a variable kernel width (VKW) MCC algorithm to overcome this problem. The optimal kernel width of the proposed VKW-MCC algorithm is calculated at each iteration by maximizing ${{\rm exp}(-e_{k}^{2}/2\sigma _{k}^{2})}$ with respect to the kernel width ${ \sigma _{k}}$ , wherein the kernel width is a function of the error, to make the error with greatest attenuation along the direction of the gradient ascent. Simulations in the contexts of system identification and echo cancellation have demonstrated that the proposed VKW-MCC algorithm yields a superior performance.

An Ultralow-Voltage Energy-Efficient Level Shifter

Abstract: This brief presents an energy-efficient level shifter (LS) able to convert extremely low level input voltages to the nominal voltage domain. To obtain low static power consumption, the proposed architecture is based on the single-stage differential-cascode-voltage-switch scheme. Moreover, it exploits self-adapting pull-up networks to increase the switching speed and to reduce the dynamic energy consumption, while a split input inverting buffer is used as the output stage to further improve energy efficiency. When implemented in a commercial 180-nm CMOS process, the proposed design can up-convert from the deep subthreshold regime (sub-100 mV) to the nominal supply voltage (1.8 V). For the target voltage level conversion from 0.4 to 1.8 V, our LS exhibits an average propagation delay of 31.7 ns, an average static power of less than 60 pW, and an energy per transition of 173 fJ, as experimentally measured across the test chips.

Bandpass Class-F Power Amplifier Based on Multifunction Hybrid Cavity–Microstrip Filter

Abstract: This brief presents a filter-integrated high-efficiency class-F power amplifier (PA). The hybrid cavity–microstrip filtering circuit is employed not only to realize output impedance matching and the third-harmonic manipulation but also to provide high-selectivity bandpass responses. To fulfill the requirements of high-efficiency class-F PAs, cavity resonators and microstrip feeding structures are involved, and their benefits are fully exploited. The metal cavity resonator features a high $Q$ value and, thus, low loss in the passband, resulting in high efficiency. Moreover, metal walls of cavities act as heat sink for the transistor. The microstrip feeding structures are used to improve the skirt selectivity and manipulate the third harmonic. Moreover, it features easy integration with the transistor, and thus, the transition between cavity and microstrip lines is eliminated. The hybrid filter is characterized based on filter synthesis theory. Complex impedance conversion analysis is carried out to guide the impedance transformation from 50 $\Omega$ to a complex one desired by the transistor. For demonstration, a filtering PA operating at 2.4 GHz is designed and measured. It exhibits both high-selectivity bandpass responses and good PA performance with maximum power-added efficiency of 70.9% at 40.8-dBm output power.

Carrier Index Differential Chaos Shift Keying Modulation

Abstract: A new carrier index differential chaos shift keying (DCSK) modulation method combining index modulation (IM) with multicarrier DCSK (MC-DCSK) is proposed. Two schemes employing two different index selectors and detectors to implement IM and demodulation are introduced. The new designed index selectors are one-to-one mappings between the index symbols and the carrier activation patterns, which can avoid the disaster caused by the previous designed selectors. Analytical bit error rate expressions of the two systems are derived over the additive white Gaussian noise as well as multipath Rayleigh fading channels. Simulation results verify the superiority of one scheme in energy efficiency and another scheme in spectral efficiency, respectively, compared with MC-DCSK.

An Improved DCM-Based Tunable True Random Number Generator for Xilinx FPGA

Abstract: True random number generators (TRNGs) play a very important role in modern cryptographic systems. Field-programmable gate arrays (FPGAs) form an ideal platform for hardware implementations of many of these security algorithms. In this brief, we present a highly efficient and tunable TRNG based on the principle of beat frequency detection , specifically for Xilinx -FPGA-based applications. The main advantages of the proposed TRNG are its on-the-fly tunability through dynamic partial reconfiguration to improve randomness qualities. We describe the mathematical model of the TRNG operations and experimental results for the circuit implemented on a Xilinx Virtex-V FPGA. The proposed TRNG has low hardware footprint and built-in bias elimination capabilities. The random bitstreams generated from it pass all tests in the NIST statistical testsuite.

A Resource-Limited Hardware Accelerator for Convolutional Neural Networks in Embedded Vision Applications

Abstract: In this brief, we introduce an architecture for accelerating convolution stages in convolutional neural networks (CNNs) implemented in embedded vision systems. The purpose of the architecture is to exploit the inherent parallelism in CNNs to reduce the required bandwidth, resource usage, and power consumption of highly computationally complex convolution operations as required by real-time embedded applications. We also implement the proposed architecture using fixed-point arithmetic on a ZC706 evaluation board that features a Xilinx Zynq-7000 system on-chip, where the embedded ARM processor with high clocking speed is used as the main controller to increase the flexibility and speed. The proposed architecture runs under a frequency of 150 MHz, which leads to 19.2 Giga multiply accumulation operations per second while consuming less than 10 W in power. This is done using only 391 DSP48 modules, which shows significant utilization improvement compared to the state-of-the-art architectures.

Consensus of Linear Multiagent Systems With Actuator Saturation and External Disturbances

Abstract: This brief considers the leader-following consensus problem for linear multiagent systems with actuator saturation and external disturbances. By enlarging the contractively invariant set to estimate the domain of consensus attraction (DOCA) of the origin, this brief derives a condition to estimate the DOCA under the actuator saturation and magnitude-bounded disturbances. For the energy-bounded disturbance case, a sufficient condition is obtained under which trajectories starting from an ellipsoid will remain inside an outer ellipsoid. Moreover, all the optimization problems are transformed into the corresponding convex optimization algorithms with linear-matrix-inequality constraints. Finally, a simulation example is given to illustrate the effectiveness of the proposed control scheme.

Design of Fixed-Frequency Pulsewidth-Modulation-Based Sliding-Mode Controllers for the Quadratic Boost Converter

Abstract: The steady-state regulation error in power converters that use the pulsewidth-modulation (PWM)-based sliding-mode (SM) controllers can be alleviated via the use of a double-integral term of the state variables in the sliding surface. However, this not only increases the order of the controller but may also require more variables like two currents in feedback. Ideally, the controller should be of a lower order to reduce the cost and for ease of implementation. The main objective of this brief is to design a fixed-frequency PWM-based SM controller for the quadratic boost converter using a reduced number of state variables. The SM controller used in this brief requires only one current for its implementation while enjoying the advantages offered by both fixed-frequency and double-integral approaches. Apart from this, two SM controllers using the input and output inductor currents of the converter are separately designed to find the most suitable inductor current for the controller design. Such study is especially required for the higher order converters wherein more than one inductor currents are available for feedback purposes. It is shown that the controller using the input inductor current is preferred over the controller using the output inductor current. Some simulation and experimental results are also provided to validate the theoretical conclusions.

Fixed-Time Connectivity-Preserving Distributed Average Tracking for Multiagent Systems

Abstract: This brief studies the fixed-time average tracking problem for multiagent systems under communication constraints, in which each agent has a limited sensing range. A distributed nonlinear control protocol is proposed to make a team of agents track the average of multiple time-varying reference signals with bounded derivatives. Furthermore, the initial interaction patterns can be preserved under the designed protocol and the average tracking can be achieved within fixed time, where the bound of settling time is independent of the initial conditions. Thus, the fixed convergence time can be flexibly adjusted. Finally, some numerical examples are provided to illustrate the performance and effectiveness of the theoretical results.

Optimal Control and Stabilization for Networked Control Systems With Packet Dropout and Input Delay

Abstract: This brief is concerned with the control problem for discrete-time networked control systems. It is assumed that state and control signals transmit through an unreliable communication channel, where packet dropout and input delay occur simultaneously. The main contributions are twofold. First, we obtain the optimal LQR controller, which is a linear function of the optimal state estimator, with the feedback gain based on a standard difference Riccati equation. It is noted that the state estimator and the controller can be calculated separately. Second, a necessary and sufficient condition for the mean-square stabilization is derived. It should be stressed that the eigenvalues of the system matrix and the packet dropout probability determine the stabilizing condition, which is uncorrelated with input delay.

Heterogeneous Strategy Particle Swarm Optimization

Abstract: Particle swarm optimization (PSO) is a widely recognized optimization algorithm inspired by social swarm. In this brief, we present a heterogeneous strategy PSO (HSPSO), in which a proportion of particles adopts a fully informed strategy to enhance the converging speed while the rest is singly informed to maintain the diversity. Our extensive numerical experiments show that the HSPSO algorithm is able to obtain satisfactory solutions, outperforming both PSO and the fully informed PSO. The evolution process is examined from both structural and microscopic points of view. We find that the cooperation between two types of particles can facilitate a good balance between exploration and exploitation, yielding better performance. We demonstrate the applicability of HSPSO on the filter design problem.

The Virtual Trackpad: An Electromyography-Based, Wireless, Real-Time, Low-Power, Embedded Hand-Gesture-Recognition System Using an Event-Driven Artificial Neural Network

Abstract: This brief presents a wireless, low-power embedded system that recognizes hand gestures by decoding surface electromyography (EMG) signals. Ten hand gestures used on commercial trackpads, including pinch, stretch, swipe left, swipe right, scroll up, scroll down, single click, double click, pat, and ok, can be recognized in real time. Features from four differential EMG channels are extracted in multiple time windows. Unlike traditional data segmentation methods, an event-driven method is proposed, with the gesture event detected in the hardware. Feature extraction is triggered only when an event is detected, minimizing computation, memory, and system power. A time-delayed artificial neural network (ANN) is used to predict the gesture from the transient EMG features instead of traditional steady-state features. The ANN is implemented in the microcontroller with a processing time less than 0.2 ms. The detection results are sent wirelessly to a computer. The device weights 15.2 g. A 4.6 g battery supports up to 40 h continuous operation. To our knowledge, this brief shows the first real-time, embedded hand-gesture-recognition system using only transient EMG signals. Experiments with four subjects show that the device can achieve a recognition of ten gestures with an average accuracy of 94%.

Sliding-Mode Control of Memristive Chua's Systems via the Event-Based Method

Abstract: This brief studies the sliding-mode control (SMC) scheme of uncertain memristive Chua's circuits via the event-based method. The sliding-mode controller possesses the advantage of its strong robustness and fast response over other control techniques. However, this controller is generally required to be executed in a continuous manner in order to make the trajectories of augmented systems drive onto the sliding surface in a finite time. In practice, these control methods are performed in a digital form. Thus, this brief proposes the event-based SMC which is executed only when necessary. Meanwhile, the existence of the lower bound for interexecution time is derived in this brief. Finally, a case study is conducted to illustrate the effectiveness of the derived results.