Proceedings ArticleDOI
Power integrity analysis for high performance design
M. Chandana,Mervin J,David Selvakumar +2 more
- pp 48-53
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TLDR
In this paper, the authors have discussed AC and DC analysis methodology to achieve better power integrity (PI) in deep sub-micrometer technology design, which includes estimation of plane dimension, plane resistance/inductance, via resistance, via dimension, appropriate layer for routing, target impedance, decoupling capacitor requirements and capacitor mounting inductance.Abstract:
Power Integrity and its influence on system performance have become very important in deep sub-micrometer technology design. A robust power distribution network (PDN) is required to provide power within specified tolerance to ensure reliable operation of circuits in a system. Modeling a good PDN and performing power integrity analysis is very essential with low voltage, high transient current, high speed and high density designs. In this paper, we have discussed AC and DC analysis methodology to achieve better Power Integrity (PI). This analysis methodology provides emphasis on pre-route PI analysis. The pre-route PI analysis includes estimation of plane dimension, plane resistance/inductance, via resistance, via dimension, appropriate layer for routing, target impedance, decoupling capacitor requirements and capacitor mounting inductance. The parameters of PDN elements derived analytically are modeled as an equivalent circuit in SPICE to analyze the PDN response. The post route PI analysis performed using PI simulation matches closely with the results obtained during pre-route analysis. This analysis has been validated using actual measurement in the system in terms of DC voltage drop, ripple and transient response.read more
Citations
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Proceedings Article
Power distribution system design methodology and capacitor selection for modern CMOS technology
TL;DR: The impedance versus frequency profiles of the power distribution system components including the voltage regulator module, bulk decoupling capacitors and high frequency ceramic capacitors are defined and reduced to simulation program with integrated circuit emphasis (SPICE) models.
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Power integrity analysis for solid state drive PCB
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Power Analysis Methodology for Energy Harvesting System on Chip
TL;DR: In this article , a power analysis methodology for fully integrated energy harvesting SoCs is proposed, aiming to successful simulation and accurate power drop analysis of fully integrated EH SoCs, which exploits the PySPICE open-source Python module and the NgSPICE simulator, enabling full-chip rapid power analysis and large signal transient results extraction.
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Power Analysis Methodology for Energy Harvesting System on Chip
C. Panagiotopoulou,A. D. Michailidis,Vasiliki Gogolou,T. Noulis,Konstantinos Siozios,Stylianos Siskos +5 more
TL;DR: In this article , a power analysis methodology for fully integrated energy harvesting SoCs is proposed, aiming to successful simulation and accurate power drop analysis of fully integrated EH SoCs, which exploits the PySPICE open-source Python module and the NgSPICE simulator, enabling full-chip rapid power analysis and large signal transient results extraction.
Journal ArticleDOI
Design procedure of 25.8 Gbps/lane re-timer IC regarding power integrity
TL;DR: A decoupling-capacitors (Decaps) placement technique to reduce power distribution network impedance (Zpdn) and a circuit design procedure regarding power supply fluctuation and a bit error rate lower than 1 × 10−12 on backplane transmission.
References
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Journal ArticleDOI
Power distribution system design methodology and capacitor selection for modern CMOS technology
TL;DR: In this paper, the impedance versus frequency profiles of the power distribution system components including the voltage regulator module, bulk decoupling capacitors and high frequency ceramic capacitors are defined and reduced to simulation program with integrated circuit emphasis (SPICE) models.
Book
Signal and Power Integrity - Simplified
TL;DR: This book brings together up-to-the-minute techniques for finding, fixing, and avoiding signal integrity problems in your design and will be an invaluable resource for getting signal integrity designs right the first time, every time.
Proceedings ArticleDOI
Design and analysis of power distribution networks in PowerPC/sup TM/ microprocessors
Abhijit Dharchoudhury,Rajendran Panda,David Blaauw,Ravi Vaidyanathan,Bogdan Tutuianu,David Bearden +5 more
TL;DR: A methodology for the design and analysis of power grids in the PowerPC™ microprocessors covering the need for power grid analysis across all stages of the design process is presented.
Journal ArticleDOI
Resonant free power network design using extended adaptive voltage positioning (EAVP) methodology
A. Waizman,Chee-Yee Chung +1 more
TL;DR: Extended adaptive voltage positioning (EAVP) is a new robust methodology for the design and analysis of a low impedance resonant free power delivery network, which utilizes and extends the theory of AVP that is commonly used in voltage regulator module (VRM) design and operation.
Proceedings ArticleDOI
Power distribution in high-performance design
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