Journal ArticleDOI
The Recycling Folded Cascode: A General Enhancement of the Folded Cascode Amplifier
R. Assaad,Jose Silva-Martinez +1 more
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TLDR
A recycling amplifier architecture based on the folded cascode transconductance amplifier is described, which delivers an appreciably enhanced performance over that of the conventional folded by using previously idle devices in the signal path, which results in an enhanced transc conductance, gain, and slew rate.Abstract:
A recycling amplifier architecture based on the folded cascode transconductance amplifier is described. The proposed amplifier delivers an appreciably enhanced performance over that of the conventional folded. This is achieved by using previously idle devices in the signal path, which results in an enhanced transconductance, gain, and slew rate. Moreover, the input referred noise and offset analyses are included to demonstrate that the proposed modifications have no adverse effects on these design metrics. Transistor-level simulations and experimental results in TSMC 0.18 mum CMOS process confirm the theoretical results. When compared to the conventional folded cascode, and for the same area and power budgets, the proposed amplifier has almost twice the bandwidth (134.2 MHz versus 70.7 MHz) and better than twice the slew rate (94.1 V/mus versus 42.1 V/mus) while driving the same 5.6 pF load. Also a gain enhancement of 7.6 dB is observed.read more
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Journal ArticleDOI
Transconductance enhancement method for operational transconductance amplifiers
TL;DR: In this paper, an improved recycling structure for an operational transconductance amplifier is proposed, which separates the AC path from the DC path, and achieves a significant boost in transconductances under the same power and area budget.
Journal ArticleDOI
A Two-Stage Fully Differential Inverter-Based Self-Biased CMOS Amplifier With High Efficiency
TL;DR: A two-stage fully differential CMOS amplifier comprising inverters as input structures and employing self-biasing techniques is presented, which achieves the highest efficiency of its class and although it relies on a quasi-class-A topology, it is comparable to class-AB amplifiers.
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A Real-Time QRS Detection System With PR/RT Interval and ST Segment Measurements for Wearable ECG Sensors Using Parallel Delta Modulators
Xiaochen Tang,Qisong Hu,Wei Tang +2 more
TL;DR: The system is based on the proposed parallel delta modulator architecture with local maximum point and local minimum point algorithms to detect QRS and PT waves and has the potential to be applied in future long-term wearable ECG recording devices.
Journal ArticleDOI
A Multichannel Integrated Circuit for Electrical Recording of Neural Activity, With Independent Channel Programmability
Carolina Mora Lopez,Dimiter Prodanov,Dries Braeken,Ivan Gligorijevic,Wolfgang Eberle,Carmen Bartic,Robert Puers,Georges Gielen +7 more
TL;DR: An integrated acquisition system for in vitro and in vivo recording of neural activity, achieving simultaneous multichannel recordings of cell activity with satisfactory signal-to-noise ratios is presented.
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Variable-Mirror Amplifier: A New Family of Process-Independent Class-AB Single-Stage OTAs for Low-Power SC Circuits
TL;DR: This paper presents a new family of Class-AB operational transconductance amplifier (OTA) circuits based on single-stage topologies with non-linear current amplifiers that are well-suited for low-power switched-capacitor circuits and specifically optimized for switched-OpAmp fast on-off operation and multi-decade load-Capacitance specifications.
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