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Showing papers on "Capacitor published in 1986"


Patent
02 Apr 1986
TL;DR: In this article, an implantable automatic defibrillation system for automatically generating a multiphasic pulse waveform in response to sensed fibrillation has been proposed, which is suitable for use in an implantedable automatic-defibrillation (ADR) system.
Abstract: An apparatus suitable for use in an implantable automatic defibrillation system for automatically generating a multiphasic defibrillation pulse waveform in response to sensed fibrillation has first and second series charge-storing capacitors having a common terminal and two other terminals each at different potentials. A controller senses cardiac fibrillation and generates a control signal which causes a charging circuit to charge the capacitors to selected voltage levels in sequentially alternating charge generation and charge coupling cycles. A voltage level detector senses the stored voltage level, disables the charging circuit when the sensed voltage reaches a predetermined level, and informs the controller that the capacitors are fully charged. The controller then communicates control signals indicative of pulse magnitude, duration, and polarity to a multiphasic pulse generator having a number of high-power switches and corresponding switch drivers interposed in circuit between the heart and the terminals of the charge-storing capacitors. The drivers control the conduction states of the switches according to the control signals to establish selected circuit paths between the three terminals and the heart, and to thereby deliver to the heart a multiphasic waveform having pulses with the selected parameters of magnitude, duration, and polarity.

345 citations


Journal ArticleDOI
TL;DR: An accurate method is presented for simulating the power dissipation with use of a dependent current source and a parallel RC circuit for CMOS circuits.
Abstract: It becomes increasingly more important to reduce the power dissipation as the number of devices in VLSI increases. Accurate simulation of power dissipation is desirable while circuits are analyzed with circuit simulators such as SPICE. An accurate method is presented for simulating the power dissipation with use of a dependent current source and a parallel RC circuit. The steady-state voltage across the capacitor reads the average power drawn from the supply voltage source. Simulation results are shown for CMOS circuits.

233 citations


Patent
26 Mar 1986
TL;DR: In this article, a combination of a transmitter and implantable receiver is disclosed wherein data is conveyed from transmitter to receiver utilizing a data format in which each channel to be stimulated is adapted to convey information in monopolar, bipolar or analog form.
Abstract: A combination of a transmitter and implantable receiver are disclosed wherein data is conveyed from transmitter to receiver utilizing a data format in which each channel to be stimulated is adapted to convey information in monopolar, bipolar or analog form. The data format includes two types of code words: transition words in which one bit is assigned to each channel and can be used to create monopolar pulsatile or bipolar pulsatile waveforms; and amplitude words that can create analog waveforms one channel at a time. An essential element of the output system is a current source digital to analog converter which responds to the code words to form the appropriate output on each channel. Each output is composed of a set of eight current sources, four with one polarity of current and the other four with the opposite polarity of current. In each group of four, the current sources are binarily related, I, 21, 41 and 8I. In this arrangement each channel can supply 16 amplitudes times two polarities of current; meaning 32 current levels. This channel is simply a 5-bit digit to analog converter. The output circuitry contains charge balance switches. These switches are designed to recover residual charge when the current sources are off. They are also designed to current limit during charge recovery if the excess charge is too great so that they do not cause neural damage. each channel charge balances (will not pass DC current or charge) and charge limits to prevent electrode damage and bone growth. The charge balancing is performed by the charge balancing switches and by the blocking capacitor. The charge limiting is performed by the blocking capacitor only. The charge level on each channel is defined using a switch network ladder which combines a plurality of parallel connected switches; clcosure of each switch doubles the current level handed off from the previous switch.

159 citations


Journal ArticleDOI
01 Sep 1986
TL;DR: In this paper, a drift-dominated conduction model is used to describe measured space-charge effects, which shows that the dielectric constant, breakdown strength, and relaxation time are the primary properties of interest to the pulse power engineer.
Abstract: One class of modern pulse power generators use deionized water as an energy storage, switching and transmission dielectric. Water is chosen for its high dielectric constant and relatively high resistivity, which allows reasonably sized and efficient low-impedance high-voltage pulse lines where pulse durations are less than 100 µs. Water/ethylene glycol mixtures are being researched, so that rotating machinery, rather than the usual Marx generator, can be used as the primary energy store. The high resistivity and high dielectric constant of these mixtures at low temperature permit low-loss operation on millisecond time scales. Simple design criteria linking load parameters and charging circuit characteristics to the liquid dielectric are developed which show that the dielectric constant, breakdown strength, and relaxation time are the primary properties of interest to the pulse power engineer. On time scales greater than 100 µs, injection of space charge, with density q and mobility µ, affects the charging and discharging circuit characteristics, introduces the time constant of the time of flight for injected charge to migrate between electrodes, and increases the effective ohmic conductivity σ to σ + qµ. A drift-dominated conduction model is used to describe measured space-charge effects. Kerr electrooptic field mapping measurements show strong space-charge effects with significant distortions in the electric field distribution a few hundred microseconds after high voltage is applied. The injected charge magnitude and sign depends on the electrode material. Thus by appropriate choice of electrode material combinations and voltage polarity, it is possible to have uncharged liquid, unipolar-charged negative or positive, or bipolar-charged liquid. An important case is that of bipolar injection, which has allowed up to a 40 percent higher applied voltage without breakdown than with no charge injection, and thus a doubling of stored energy due to the space-charge shielding which lowers the electric field strengths at both electrodes. Although injected space charge increases the stored electric energy over the capacitive space-charge-free energy, (1/2)CV2, more energy is required from a source during charging and the energy delivered to a resistive load is reduced because of internal dissipation in the capacitor as the charge is conducted to the electrodes. However, it appears that this extra dissipation due to injected charge can be made negligibly small and well worth the price if the space charge allows higher voltage operation for long charging time or repetitively operated machines.

146 citations


Journal ArticleDOI
TL;DR: In this paper, hole-trapping effects at doses to 15 Mrad(SiO2) were examined in MOS field effect transistors (MOSFET's) and MOS capacitors with 11-to 27-nm gate oxides.
Abstract: We present the results of an investigation into the buildup of trapped positive oxide charge responsible for a negative component of radiation-induced threshold voltage shift in both hard and soft metaloxide semiconductor (MOS) gate oxides and the processes which limit this buildup. Hole-trapping effects at doses to 15 Mrad(SiO2) were examined in MOS field-effect transistors (MOSFET's) and MOS capacitors with 11- to 27-nm gate oxides. The observed saturation of threshold voltage shift was modeled with the aid of a computer simulation of charge buildup in an MOS structure and was found to be caused by a complex interaction between trap filling and recombination of radiation-generated free electrons with trapped holes, modulated by trapped-hole-induced distortion of the oxide electric field. A supplemental measurement of 10-keV x-ray-induced currents in MOS capacitors produced no evidence for radiation-generated hot electron injection from the Si substrate into SiO2 layers of various thicknesses and also yielded data on x-ray-induced charge generation in the SiO2.

131 citations


Patent
Takayuki Matsukawa1
27 Jan 1986
TL;DR: In this paper, a semiconductor device comprising a capacitor of a laminated structure and a method of manufacturing thereof is presented, in which first conductive layer and second conductive layers of different materials or different compositions are stacked alternately with dielectric films interposed therebetween and the firstconductive layers and the second conductives layers are interconnected respectively at a time by suitably combining a selective etching method and an anisotropic etch method.
Abstract: A semiconductor device comprising a capacitor of a laminated structure and a method of manufacturing thereof, in which first conductive layer and second conductive layer of different materials or different compositions are stacked alternately with dielectric films interposed therebetween and the first conductive layers and the second conductive layers are interconnected respectively at a time by suitably combining a selective etching method and an anisotropic etching method.

130 citations


Patent
15 Jul 1986
TL;DR: In this article, a high efficiency RF capacitive spark plug with a projecting antenna tip was used for forming very large spark gaps to the plug shell and piston face as well as for coupling high electric fields to the local initial flame plasma, which was used in combination with shielded high voltage cable including series inductive choke elements and a Capacitive Discharge ignition system incorporating an input capacitor, a SCR switch, an ignition coil with an optimized high current and high output voltage, and preferably a synchronous DC-DC power converter providing "boost power" during ignition so that substantial
Abstract: An Electromagnetic Ignition system suitable for adaptation to standard automobile engines including diesel engines, which has been improved by means of a high efficiency RF capacitive spark plug with a projecting antenna tip used for forming very large spark gaps to the plug shell and piston face as well as for coupling high electric fields to the local initial flame plasma, preferably used in combination with shielded high voltage cable including series inductive choke elements and a Capacitive Discharge ignition system incorporating an input capacitor, a SCR switch, an ignition coil with an optimized high current and high output voltage, and preferably a synchronous DC-DC power converter providing "boost power" during ignition so that substantial capacitive, inductive, and electromagnetic energy is supplied to the air-fuel mixture. Preferably the coil has a turns ratio of 50 with the input capacitor having a capacitance between 5 and 10 microfarads and a 400 volts rating. Large output capacitance is provided naturally by existing coil and shielded cable capacitance, supplemented with large plug capacitance of 50 to 250 picofarads, which are charged up to between 15 and 30 Kilovolts prior to breakdown of the wide variable spark gap producing: high frequency capacitive sparks, large inductive spark of several amps; and high pulsed local EM electric field strength of thousands of volts/cm providing a practical, highly efficient ignition system capable of igniting very lean air-fuel mixtures for reducing exhaust emissions and increased engine efficiency.

130 citations


Journal ArticleDOI
David E. Rice1
TL;DR: The use of the electrochemical rectifiers and the increasing application of ac and dc adjustable speed drives dictates that the effect of harmonic "pollution" on other equipment in the power system be considered as discussed by the authors.
Abstract: The use of the electrochemical rectifiers and the increasing application of ac and dc adjustable speed drives dictates that the effect of harmonic "pollution" on other equipment in the power system be considered An example power system is examined, and the necessary calculations are performed to show the effect harmonics have and investigate the probability of a harmonic resonance situation occurring The tolerances that various power system components have to harmonic currents and voltages are examined These components include transformers, reactors, capacitors, cable, switchgear, relaying, generators, and motors

120 citations


Journal ArticleDOI
TL;DR: By periodically modifying the reference voltage to compensate for the nonideal signal-transfer-loop gain, it is possible in principle to build A/D and D/A converters whose linearity is independent of component ratios and that occupy only a small die area.
Abstract: A method of cyclic analog-to-digital (A/D) and digital-to-analog (D/A) conversion using switched-capacitor techniques is described. By periodically modifying the reference voltage to compensate for the nonideal signal-transfer-loop gain, it is possible in principle to build A/D and D/A converters whose linearity is independent of component ratios and that occupy only a small die area. These converters require two moderate-gain MOS operational amplifiers, one comparator, and a few capacitors. A test chip for A/D conversion was built and evaluated. The test data show that the A/D performs as a monotonic 13-bit converter with maximum 1-LSB differential and 2-LSB integral nonlinearity.

117 citations


Patent
26 Mar 1986
TL;DR: In this article, a pair of coils, one beneath the skin and one outside the skin, each connected to a capacitor, are selected to provide a stagger-tuned link, where the poles of one filter above the operating frequency and the pole of the other filter below the operational frequency of the link are moved as the coupling coefficient changes, desensitizing the link to the coupling.
Abstract: The present invention utilizes a pair of coils, one beneath the skin and one outside the skin, each connected to a capacitor. The values of the capacitor and coil inductance are selected to provide a stagger-tuned link. That is, the values of the components are selected to place the pole of one filter above the operating frequency, and the pole of the other filter below the operating frequency of the link. The poles will move as the coupling coefficient changes, desensitizing the link to the coupling so that the coils can be misaligned in any manner with little effect on the output. A fully active driver or class D amplifier is preferably utilized to effectively drive the link with a square wave signal. This signal can be modulated to convey data information to the implanted receiver coil beneath the skin.

116 citations


Journal ArticleDOI
TL;DR: In this article, a universal second-order active filter network employing CCII-type current conveyors is reported, which offers wide bandwidth, high input impedance and independent control of?0, Q and voltage gain with separate grounded resistors.
Abstract: A universal second-order active filter network employing CCII-type current conveyors is reported. The circuit offers wide bandwidth, high input impedance and independent control of ?0, Q and voltage gain with separate grounded resistors. The circuit also uses grounded capacitors and is therefore ideal for integration.

Patent
Yasunori Tanaka1
08 Aug 1986
TL;DR: In this article, the first and second type MOS transistors have a first threshold voltage level, and the output potential of the second and third MOS transistor in the second circuit is connected to the first power supply.
Abstract: An output circuit device according to the present invention comprises first circuit means (1) having a first type MOS transistor and a second type MOS transistor connected in parallel to each other, second circuit means (3) having at least a first type MOS transistor and a second type MOS transistor connected in parallel to each other, and a load capacitor means (13) connected between the output terminal and the ground potential for charging and discharging electric charge of an output signal. The source of said first type MOS transistor is connected to a first power supply and the source of said second type MOS transistor being connected to a second power supply. The second circuit means is connected between the output of said first circuit means and an output terminal. The source of the first type MOS transistor in the second circuit means is connected to the first power supply. The source of the second type MOS transistor is connected to the second power supply. The first and second type MOS transistors have a first threshold voltage level. Thereby, undershoot and overshoot phenomena are suppressed when the output potential of the first and second type MOS transistors in the second circuit means reaches the threshold voltage level.

Patent
Shinichiro Kimura1, Hideo Sunami1
01 Dec 1986
TL;DR: In this paper, a process for producing a memory cell having a stacked capacitor is described, where projections and recesses are provided on the surface of a capacitance electrode to increase the storage capacitance.
Abstract: A process for producing a memory cell having a stacked capacitor. As the reduction in device size of memory cells progresses, it becomes difficult to obtain a satisfactorily large capacitance even with a stacked capacitor structure. To enable a larger capacitance to be obtained for the same occupied area, projections and recesses are provided on the surface of a capacitor electrode. It is possible, according to the process, to readily produce projections and recesses for increasing the storage capacitance.

Patent
28 Apr 1986
TL;DR: In this article, a family of quasi-resonant converters is described, comprising a voltage source, a transformer having primary and secondary windings, and a switch for periodically coupling the voltage source to the primary winding, whereby a charging current appears on the secondary winding.
Abstract: A family of quasi-resonant converters is disclosed as comprising a voltage source, a transformer having primary and secondary windings, and a switch for periodically coupling the voltage source to the primary winding, whereby a charging current appears on the secondary winding. The transformer exhibits a characteristic leakage inductance. A capacitor exhibiting a characteristic capacitance is coupled to the secondary winding to form a resonant circuit including the leakage inductance and the capacitor. The secondary winding is coupled to apply the charging current to the capacitor. A rectifying circuit couples the capacitor to a load, whereby the voltage stored in the capacitor is delivered to the load. The capacitor is directly connected to the secondary winding and to the rectifying circuit to permit positive and negative going voltages to be stored therein, whereby magnetic flux within the core of the transformer is dissipated and the transformer magnetically reset.

Patent
09 Dec 1986
TL;DR: In this article, a level detecting capacitance is used to detect the level of the oil or transmission fluid in both normal and extreme temperature conditions, where the only active components of the sensor have input and leakage currents substantially lower than those of diodes and current sources under high temperature conditions.
Abstract: A sensor for sensing the level of oil or transmission fluid under both normal and extreme temperature conditions. The only active components of the sensor have input and leakage currents substantially lower than those of diodes and current sources under high temperature conditions. The sensor has a probe, including a pair of electrodes forming a level detecting capacitor, adapted to extend in the vessel to detect the level of the liquid. A reference capacitor is included which has a capacitance substantially the same as the capacitance of the level detecting capacitor when no dielectric liquid is present between the electrodes of the level detecting capacitor. Circuitry is provided for measuring the capacitance of each capacitor and for deriving from the capacitance measurements a signal proportional to the level of the dielectric liquid at the sensor. Circuitry is also provided for testing whether the reference capacitor is operating properly. One of the electrodes of the level detecting capacitor is insulated to render the output of the sensor independent of high temperature conductivity effects. Structure and a method are provided for compensating for varying dielectric constants of the oil or transmission fluid in which the sensor is immersed.

Patent
25 Sep 1986
TL;DR: In this paper, a high efficiency power converter is achieved utilizing a resonant DC link between a DC source, such as a converter rectifying power from an AC power system, to a variable frequency voltage source inverter.
Abstract: A high efficiency power converter is achieved utilizing a resonant DC link between a DC source, such as a converter rectifying power from an AC power system, to a variable frequency voltage source inverter. A resonant circuit composed of an inductor and capacitor is connected to the DC power supply and to a DC bus supplying the inverter and is caused to oscillate stably at a high frequency to provide a uni-directional voltage across the DC bus which reaches zero volts during each cycle of oscillation of the resonant circuit. The switching devices of the inverter are controlled to switch on and off only at times when the DC bus voltage is zero, thereby eliminating switching losses in the inverter. The resonant circuit can be caused to oscillate utilizing pairs of switching devices in the inverter or a separate switching device across the capacitor, which again are caused to switch on and off only at times of zero voltage on the DC bus. For AC to AC conversion, enabling bi-directional power flow, the switching devices of the power source which converts AC power to DC power may have switching devices which are also switched only at the times of zero voltage so that switching losses in these devices is also minimized.

Patent
13 May 1986
TL;DR: An implantable cardioverting system is a system where a cardioverting or defibrillating voltage is automatically applied across implantable electrodes associated with the heart of a patient as discussed by the authors.
Abstract: An implantable cardioverting system wherein a cardioverting or defibrillating voltage is automatically applied across implantable electrodes associated with the heart of a patient. The cardioverting voltage is an exponentially-decaying voltage pulse that is chopped, or broken, at high frequencies to provide a voltage wave packet formed of a plurality of high-frequency cardioverting pulses. The voltage is provided by an internal storage capacitor coupled across implantable electrode leads that is charged to a predetermined voltage level. Upon discharge, an electronic switch is clocked at frequencies preferably in excess of 1 KHz to open and close the circuit formed of the storage capacitor and electrodes.

Patent
06 Nov 1986
TL;DR: In this paper, an automatic head retract system for a disk drive is described, which operates in response to electric power turn off to retract the heads to a landing zone on the disk surface.
Abstract: An automatic head retract system for a disk drive is disclosed which operates in response to electric power turn off to retract the heads to a landing zone on the disk surface. The heads are retracted by operating a positioner motor under the control of logic internal to the disk drive unit without intervention by a host computer. The positioner motor comprises a multiphase DC brushless motor which, after power loss, is supplied with current from a capacitor charged during normal drive usage and by the back EMF of a spindle motor. A latch mechanically locks the heads in the landing zone.

Journal ArticleDOI
TL;DR: In this paper, a feedback charge measurement circuit is used to reduce the effect of several significant error terms, which has the advantages of higher signal-to-noise ratio at the frequencies of interest, independence of signal size from measurement time, and ease of distinction of signal charge from error currents at the time of measurement.
Abstract: A method is described for the measurement of quasistatic CV characteristics in semiconductors which offers significant advantages over previous methods. Using a small voltage step across the device under test, a displacement charge is stimulated and measured. A feedback charge measurement circuit is used, reducing the effect of several significant error terms. This technique has the advantages of higher signal‐to‐noise ratio at the frequencies of interest, independence of signal size from measurement time, and ease of distinction of signal charge from error currents at the time of measurement. Results consistent with those of previous techniques have been obtained on silicon MOS capacitors and other devices using steps from 10 to 100 mV and delays between step and measurement of up to 200 s. Furthermore, the method has been extended to provide additional information useful in determining whether an equilibrium measurement is obtained and in diagnosing and correcting for errors due to dc leakage currents. ...

Patent
Shinichi Sato1, Fumio Takeda1
19 Feb 1986
TL;DR: In this article, the resonance frequency of an antenna can be changed in a wide range by connecting constant elements such as coils and capacitors between a circular conductor plate and a grounding conductor plate.
Abstract: Between a circular conductor plate and a grounding conductor plate, lumped constant elements such as coils and capacitors are connected. As a result, the resonance frequency of an antenna can be changed in a wide range.

Journal ArticleDOI
TL;DR: In this paper, a nonvolatile MIS memory device using a ferroelectric polymer thin film in the gate insulator is proposed, which virtually self-aligns the effective gate area to the source/drain.
Abstract: A nonvolatile MIS memory device using a ferroelectric polymer thin film in the gate insulator is proposed. In the gate electrode of the device, a ferroelectric polymer thin film is sandwiched between two insulator films to prevent carrier injection into the polymer thin film. Al-SiO2-P (VDF/TrFE)-SiO2-Si capacitors were fabricated to evaluate the basic characteristics of the device by C-V measurement, and ferroelectric polarization reversal was observed in the capacitors. Based on the C-V measurements, MIS transistors were fabricated using a process which virtually self-aligns the effective gate area to the source/drain. It was shown that the MIS transistor could be electrically programmed and erased. The on/off ratio of the transistor was greater than 106.

Patent
16 Dec 1986
TL;DR: In this paper, a bridge configuration of four switches S1, S2, S3 and S4 is used to switch a superconductive coil to a switch S5 to break the current flow path through the coil.
Abstract: A switched coil arrangement is connected in a bridge configuration of four switches S1, S2, S3 and S4 which are each shunted by diodes D,, D2, D3 and D4 so that current can flow in either direction through a coil L depending on the setting of the switches. A capacitor C is connected across the bridge through a switch S5 to receive the inductive energy stored in coil L on breaking the current flow path through the coil. The electrostatic energy stored in capacitor C can then be used to supply current through the coil in the reverse direction either immediately or after a time delay. Coil L may be a superconductive coil. Losses in the circuit can be made up by a trickle charge of capacitor C from a separate supply V2.

Patent
Yoshihiro Takemae1
23 May 1986
TL;DR: In this paper, a DRAM device consisting of an FET and a capacitor is described, and the substrate is biased with a voltage at an intermediate level between a first storage voltage and a second storage voltage.
Abstract: A semiconductor memory (DRAM) device comprises memory cells, each of which is composed of an FET and a capacitor. The FET has an SOI structure. The capacitor is composed of a dielectric layer as an insulating layer for the SOI structure, an upper capacitor electrode as a semiconductor layer for the SOI structure, and a lower capacitor electrode as a semiconductor substrate. The substrate is biased with a voltage at an intermediate level between a first storage voltage and a second storage voltage.

Journal ArticleDOI
TL;DR: In this article, thin ZrO 2 layers were used to realize MOS capacitors with aluminum, polysilicon, and molybdenum gate electrodes, and the effects of various high-temperature treatments and gate material deposition conditions on the MOS capacitor properties were studied.
Abstract: Thin ZrO 2 layers were used to realize MOS capacitors with aluminum, polysilicon, and molybdenum gate electrodes. The layers, 300-600 A in thickness, were obtained by metal organic chemical vapor deposition. The effects of various high-temperature treatments as well as gate material deposition conditions on the MOS capacitor properties were studied. Processing conditions compatible with standard silicon technology were established to obtain capacitors suitable for advanced DRAM application. Relative dielectric constant ∈ ≥ 16, breakdown field E_{B} \ge 3 MV/cm, and leakage currents at applied voltage of 5V around 10-8A/cm2enable the realization of capacitors with dielectric layer equivalent to 35 A of SiO 2 .

Patent
08 Aug 1986
TL;DR: In this article, an extended life capacitor is described in which an enclosing body is made from a tantalum can and tantalum cap and enclosing a plurality of double layer capacitor cells each of the capacitor cells includes a conductive material, such as activated carbon, with dilute sulfuric acid.
Abstract: An extended life capacitor is disclosed in which an enclosing body is made from a tantalum can and tantalum cap and enclosing a plurality of double layer capacitor cells Each of the capacitor cells includes a conductive material, such as activated carbon, with an aqueous electrolyte therein such as dilute sulfuric acid In the preferred embodiment, this is about 38% by weight of sulfuric acid, and the remainder water Lead-ins are provided to make electronic connection to the two ends of the capacitor cell stack as anode and cathode electrodes The entire unit is hermetically sealed to inhibit the loss of electrolyte from the capacitor body to less than 2% per year, and the electrodes are at least partly coated with a noble metal such as gold to limit the establishment of a spurious capacitor which would be in series with the stack of plurality cells, which would otherwise greatly decrease the capacity of the entire unit

PatentDOI
TL;DR: An accelerometer is provided using at least one sensor with flat pendular structure formed by micro-machining a fine monocrystal wafer and comprising a flat mobile mass suspended from the rest of the structure by means of two thin parallel strips situated on each side of the mass as discussed by the authors.
Abstract: An accelerometer is provided using at least one sensor with flat pendular structure formed by micro-machining a fine monocrystal wafer and comprising a flat mobile mass suspended from the rest of the structure by means of two thin parallel strips situated on each side of the mass. The mass comprises at least one mobile capacitor plate disposed between two fixed capacitor plates provided on the fixed part of the structure. The mobile plate is brought to a voltage V O , whereas the fixed plates are respectively brought to voltages V 1 and V 2 which are capable of generating an electrostatic return force on the mobile mass.

Patent
19 Dec 1986
TL;DR: In this paper, a level selectable FET voltage generation system is described, which includes a single charge pump controlled by multiple feedback paths and a powerdown circuit, each feedback path contains a capacitor divider network, a sense amplifier with a compensating voltage reference and a timer which periodically resets the capacitor dividers network to insure sensing accuracy.
Abstract: A level selectable FET voltage generation system is described. The system includes a single charge pump controlled by multiple feedback paths and a powerdown circuit. Each feedback path contains a capacitor divider network, a sense amplifier with a compensating voltage reference and a timer which periodically resets the capacitor divider network to insure sensing accuracy. The powerdown circuit and a selected feedback path provides a desired voltage level at the output of the charge pump.

Patent
27 Jan 1986
TL;DR: In this article, an integrated circuit comprises a node (38) that is boosted by one or more boost capacitors depending on the level of the power supply voltage, and when the level is below a given threshold, a first boost capacitor (30) is activated.
Abstract: An integrated circuit comprises a node (38) that is boosted by one or more boost capacitors depending on the level of the power supply voltage. When the level is below a given threshold, a first boost capacitor (30) is activated. Additional boost capacitors (C31, C33) may be provided for activation at still lower thresholds. The boost capacitors are deactivated when the power supply level exceeds the corresponding thresholds. In this manner, a more constant boosted voltage is obtained. This provides for an adequate boosted voltage at low power supply levels, while avoiding excessive boost at high power supply voltages that could damage devices. The technique may be used for boosted row conductors in dynamic random access memories, among other applications.

Proceedings ArticleDOI
01 Dec 1986
TL;DR: In this article, the link between hole generation/trapping and oxide breakdown was demonstrated by correlating oxide breakdown with the hole current generated in the oxide Both exhibit the same oxide thickness and field dependences Charge-to-breakdown (Q BD ), time-to breakdown (t BD ), and breakdown-field (E BD ) increase dramatically as oxide thickness is reduced below 80 A due to reduced rate of hole generation, which is modeled by an average electron energy analysis.
Abstract: The link between hole generation/trapping and oxide breakdown is demonstrated by correlating oxide breakdown with the hole current generated in the oxide Both exhibit the same oxide thickness and field dependences Charge-to-breakdown (Q BD ), time-to-breakdown (t BD ), and breakdown-field (E BD ) increase dramatically as oxide thickness is reduced below 80 A due to reduced rate of hole generation, which is modeled by an average electron energy analysis Time-dependent-dielectric-breakdown (TDDB) tests show that, for as-grown oxide capacitors, defect densities may decrease with decreasing oxide thickness down to 60 A

Journal ArticleDOI
TL;DR: In this paper, the particular component values which result in the smallest component stresses are determined, and a simple design strategy is developed, which is illustrated for an off-line 200 W, 5 V application.
Abstract: For a given output voltage and power, the peak resonant capacitor voltage and peak inductor and switch currents of the series resonant converter depend strongly on the choice of transformer turns ratio and of tank inductance and capacitance. In this paper the particular component values which result in the smallest component stresses are determined, and a simple design strategy is developed. The procedure is illustrated for an off-line 200 W, 5 V application, and it is shown that an incorrect choice of component values can result in significantly higher component stresses than are necessary.