Showing papers on "Low-pass filter published in 1997"

A novel channel estimation method for OFDM mobile communication systems based on pilot signals and transform-domain processing

Abstract: A method of estimating the channel transfer function is presented for orthogonal frequency division multiplexing (OFDM) mobile communication systems working under time-variant radio channel conditions. The proposed method employs lowpass filtering in a transform domain so that intercarrier interference and additive white Gaussian noise components in the received pilot signals are significantly reduced. The cutoff frequency of the transform-domain filter is dynamically selected by tracking the received pilot signals. The channel transfer function for all the subcarriers is obtained by a high-resolution interpolation realized by zero-padding and DFT/IDFT. The proposed method is applicable for all linear modulation OFDM systems. It is demonstrated with a 16QAM-OFDM system which includes both amplitude and phase modulations.

Hybrid solutions for improving passive filter performance in high power applications

Abstract: This paper presents a new control scheme for a parallel hybrid active filter system intended for harmonic compensation of large nonlinear loads up to 50 MVA, to meet IEEE 519 recommended harmonic standards. The active filter is small rated, 2%-3% of load kilovoltampere rating. The control scheme is based on the concept of synthesizing a dynamically variable inductance, and its usefulness is demonstrated for an active filtering application. A synchronous reference frame (SRF) controller implements the dynamically varying negative or positive inductance by generating active filter inverter voltage commands. This variable inductance controller parallel hybrid active filter system can selectively synthesize multiple "active inductances" at dominant harmonic frequencies without affecting passive filter impedances at all other frequencies. This controller also provides a "current limiting" function to prevent passive filter overloading under ambient harmonic loads and/or supply voltage distortions. Three implementation variations of a parallel hybrid active filter system are presented. This paper also proposes the use of power factor correction capacitors as low cost passive filters for a parallel hybrid active filter system, which are controlled to provide either single or multiple tuned harmonic sinks and to increase cost effectiveness for high power applications. Simulation results validate the proposed variable inductance controller operation for mistuned passive filters.

Design considerations for an inverter output filter to mitigate the effects of long motor leads in ASD applications

Abstract: Design considerations for an inverter output filter to mitigate the effects of long motor leads in adjustable-speed drive (ASD) applications are presented. It is shown by analysis that, for a given length of cable, reducing the dv/dt of the pulsewidth modulated (PWM) inverter output voltage applied to the cable below a critical value will eliminate overvoltages due to voltage reflections. Design issues for a low-pass filter at the inverter output terminals to reduce the dv/dt of the inverter output pulse are examined in detail. The filter operation is verified for the entire variable frequency range of the inverter. The performance of the filter is evaluated through simulations and experimentally on a 460 V commercially available AC motor drive (PWM insulated gate bipolar transistor (IGBT)). The proposed inverter output filter is then compared with a motor terminal shunt filter also designed to reduce overvoltages and ringing at the motor terminals.

DC to DC converter with high efficiency for light loads

Abstract: A DC to DC converter which maintains high efficiency over broad current ranges in a current mode switching regulator circuit without changing operational mode. A low ripple voltage is maintained over the entire load range and good voltage regulation is maintained with high efficiency. This is possible because the switching frequency is adjusted in accordance with the load without changing operational states, thus making it unnecessary to define plural states of operation. The timing of turning on the switch(es) varies since the switch(es) is (are) turned on when two set (ready) signals both become ready. For fixed frequency switching applications, switching pulses from a fixed frequency oscillator as a first set signal are skipped when a second set signal is not ready. On the other hand, for a variable frequency switching scheme which is implemented by driving the switching with a one-shot having a constant OFF time, the switching pulse is created after both set signals become active. A low pass filter is also used to dynamically adjust the minimum peak inductor current and to minimize ripple voltage for low load conditions so that a smaller output capacitor may be used.

Clutter rejection filters in color flow imaging: a theoretical approach

Abstract: A general class of linear clutter rejection filters is described, covering the commonly used filter types including FIR/IIR filters with linear initialization, as well as regression filters, where the clutter component is estimated by least square curve fitting. The filter can be described by a complex valued matrix, and a frequency response is defined. However, in contrast to a time invariant filter, the general linear filter may create frequency components which are not present in the input signal. This produces bias in the velocity and velocity spread estimates. It is shown that the clutter filter effect on the autocorrelation estimates can be described by a frequency domain transfer function, but unlike time invariant filters, the transfer function is different for each temporal lag of the autocorrelation function. Using a two dimensional (axial and temporal dimension) model of the received signal, the bias in velocity and velocity spread is quantified, both for the autocorrelation algorithm and the time shift cross-correlation estimator. Theoretical expressions, as well as numerical examples are given.

A nonlinear filter for estimating a sinusoidal signal and its parameters in white noise: on the case of a single sinusoid

Abstract: A nonlinear filter is proposed for estimating a complex sinusoidal signal and its parameters (frequency, amplitude, and phase) from measurements corrupted by white noise. This filter is derived by applying an extended complex Kalman filter (ECKF) to a nonlinear stochastic system whose state variables are a function of its frequency and a sample of an original signal, and then, proof of the stability is given in the case of a single complex sinusoid. Simulations demonstrate that the proposed nonlinear filter is effective as a method for estimating a single complex sinusoid and its frequency under a low signal-to-noise ratio (SNR). In addition, the effect of the initial condition in the filter on frequency estimation is also discussed.

A programmable cascaded low-pass filter-based flux synthesis for a stator flux-oriented vector-controlled induction motor drive

Abstract: The concept of a programmable cascaded low-pass filter method of flux vector synthesis has been introduced in the literature. In this paper, the idea is expanded, analyzed, improved, and then applied to a stator flux oriented 100-kW electric vehicle drive. It was verified that the flux estimation works well at zero speed finite torque start-up mode and low- and high-speed field weakening regions, thus completely eliminating the need of a speed sensor.

A transfer function approach to harmonic filter design

Abstract: This article details a new transfer function approach in passive harmonic filter design for industrial and commercial power system applications Filter placement along with six common filter configurations are presented Harmonic impedance, voltage division and current division transfer functions are derived and used in a practical filter design procedure that incorporates IEEE-519 distortion limits directly into the design and component specification process A simple four-step filter design procedure is outlined and used in a variable speed motor drive pumping plant application

Design of recursive 1-D variable filters with guaranteed stability

Abstract: The digital filters with adjustable frequency-domain characteristics are called variable filters. Variable filters are used in many signal processing fields, but the recursive variable filters are extremely difficult to design due to the stability problem. This paper proposes a new method for designing recursive one-dimensional (1-D) variable filters whose stability is guaranteed. The method finds the coefficients of the transfer function of a variable digital filter as the multidimensional (M-D) polynomials of a few variables. The variables specify different frequency-domain characteristics, thus, we call the variables the spectral parameters. In applying the resulting variable filters, substituting different values of the spectral parameters into the M-D polynomials will obtain different filter coefficients and, thus, obtain different frequency-domain characteristics. To guarantee the stability, we first perform coefficient substitutions on the denominator coefficients such that they satisfy the stability conditions. Then both denominator and numerator coefficients are determined as M-D polynomials. In determining the M-D polynomials, we also propose an efficient least-squares approximation method that requires only solving simultaneous linear equations. Two examples are given to show the effectiveness of the proposed variable filter design technique.

A CMOS channel-select filter for a direct-conversion wireless receiver

Abstract: A highly selective and linear switched-capacitor channel-select filter is fabricated in 1-/spl mu/m CMOS for a direct-conversion wireless receiver operating in the 902-928 MHz ISM band. The filter selects a 230-kHz wide channel and attenuates by at least 50 dB from 320 kHz to 57 MHz. The input IP3 is +30 dBm, the input-referred noise in the passband is 70 nV//spl radic/Hz, and the circuit takes 4.6 mA from a 3.3 V supply. Direct subsampling of the 915 MHz RF input signal by the filter front-end is also demonstrated with only a small degradation in linearity. The input noise voltage is halved in a redesign while keeping the current drain unchanged.

Digital algorithms for measurement of voltage flicker

Abstract: The fluctuation of utility voltage often becomes so serious that the flicker of electrical lighting equipment is visible and sometimes irritable. In order to solve the problems related to voltage fluctuation, many definitions and meters had been proposed and developed. In this paper, these meter principles are categorised, and the digital algorithms used to calculate voltage flicker are discussed. Special attention is focused on the pitfalls of the fast Fourier transform, which is the spectrum of voltage fluctuation signals. Since the trivial system frequency deviation may cause serious leakage under proper frequency resolution, the directly digital demodulation method is not suggested. In order to reduce aliasing, a low-pass filter (LPF) is necessary, and the sampling frequency of the analog to digital converter (ADC) must be not less than two multiples of the cut-off frequency of the LPF. The frequency resolution must be raised as much as possible to lower the inherent picket-fence effect, owing to the approximately continuous spectrum distribution of the voltage fluctuation. Based on the above considerations, a developed microcomputer-based instrument system prototype was used to validate the operation of the proposed algorithm, by the voltage-flicker measurement of a voltage-flicker generator and an arc-furnace feeder.

A linear fully balanced CMOS OTA for VHF filtering applications

Abstract: A linear, fully balanced, voltage-tunable CMOS operational transconductance amplifier (OTA) with large dc gain and wide bandwidth is described. The approach uses a two-differential-pair transconductor with a cross-coupled input stage together with a negative resistance load for compensating the parasitic output resistance of the OTA. Since no additional internal nodes are generated, dc gain enhancement is obtained without bandwidth limitation. SPICE simulations show that total harmonic distortion at 1.42 V/sub p-p/ is less than 1% with dynamic range equal to 66 dB at a power consumption of 2.7 mW from a single 5-V supply. As an example, the OTA is used to design a third-order elliptic lowpass filter in the very-high-frequency range, simulated in a standard 2 /spl mu/m CMOS process (MOSIS). The cutoff frequency of the filter is tunable in the range of 12-50 MHz.

A simple design method for near-perfect-reconstruction nonuniform filter banks

Abstract: In this correspondence, we propose a simple design method for nonuniform integer-decimated filter banks based on a uniform cosine-modulated filter bank. The resulting distortion and aliasing are comparable to the stopband attenuation of the prototype filter. Examples are given to demonstrate the proposed method.

A programmable 36-mhz digital filter bank for radio science

Abstract: We have designed and constructed an agile 8-channel digital filter bank on a 9U VME board that operates at a maximum clock rate of 36 MHz. A set of these boards have been employed to create 100-200 MHz, 50-100 channel spectrometers. Our applications involve detection of weak signals in a background of noise--pulsar radio astronomy and the search for narrow-band radio emissions from extraterrestrial civilizations. The agility factors include total bandwidth, spacing of filter channels, selection of filter response and choice of output data format (voltage or detected power). The input is a complex analog voltage centered on zero frequency which is passed to the board via coaxial ports on the front panel. The computational kernels on this board are Harris HSP 43168 Finite Impulse Response (FIR) filter devices. We can also operate the board in a 16-channel output mode. The 2-4 bit format digital output is presented to a custom backplane. Along with our development we have written a suite of simulation software tasks both to determine the sensitivity loss and non-linear gain response that result from quantization and to optimize filter responses.

A family of pulse-shaping filters with ISI-free matched and unmatched filter properties

Abstract: The raised-cosine pulse-shaping filter plays an important role in digital communications due to its intersymbol interference (ISI)-free property. The ISI-free property holds after matched filtering is performed. In this letter, we propose a new family of pulse-shaping filters. These filters are ISI free with or without matched filtering. Using these new pulse-shaping filters, the computational load, and therefore the hardware cost in demodulation for modem design, might be reduced in some applications.

Sample rate converter

Abstract: A sample rate converter for converting a digital signal having a particular sample rate frequency into a signal having a different, specified sample rate frequency. The converter includes an interpolation function for increasing the sample rate frequency of the input signal by an interpolation factor (L), so as to produce an intermediate signal having an intermediate sample rate frequency. The intermediate signal is then filtered with a predefined single-stage, low-pass filter to eliminate high frequency noise introduced as a result of the interpolation. The filtered intermediate signal is then supplied to a decimation function, which extracts samples from the intermediate signal in accordance with a decimation factor (M), thereby producing an output signal having the desired sample rate frequency. The filter is configured so as to be optimized to provide the best conversion results for a plurality of critical input/output sample rate conversion pairs, which are used to define the filter cutoff frequency. The converter can be equipped with a single predefined filter, which is then used for all conversions, or the converter can be equipped with a plurality of predefined filters, and the most appropriate filter selected based on the desired level of quality for the conversion. Since the filter is predefined and fixed, there is no need to recalculate the filter every time the converter is executed or when a different input/output rate is specified. In operation, the input signal is interpolated to an intermediate sample rate by inserting L-1 zero value data points between the existing data points. This intermediate signal is then low pass filtered, but the filter skips all of the intervening zero value data points, thereby greatly enhancing the efficiency of the converter. The filtered signal is then decimated, by removing every M-1 out of every M data samples.

Dual-band filter network

Abstract: A dual band filter network for a radio communication apparatus is provided. The network has an antenna (212) for receiving and transmitting signals from a first frequency band and a second frequency band. The network has a first duplex pair (202) including a first transmit filter (204) including a first passband and stopband. The first duplex pair (202) also includes a second receive filter (206). The first filter (204) presents a consistent phase in the second passband due to the wide frequency separation between the first filter (204) and the second filter (206). The network has a second duplex pair (202') with similar characteristics as the first duplex pair (202). The network also has a switching circuitry (210) controlled by a switch control voltage (214) for selecting the appropriate filter circuitry. The network can be provided in a small sized, low cost package that also offers improved insertion loss performance.

A low-voltage, low-power CMOS fifth-order elliptic GM-C filter for baseband mobile, wireless communication

Abstract: The design and performance of a rail-to-rail low-voltage CMOS fifth-order elliptic low-pass GM-C filter for baseband mobile communication are presented. The operational transconductance amplifier (OTA) used in this filter is a low-voltage rail-to-rail voltage-to-current converter (V-I converter). In this V-I converter, an N-type V-I converter cell is connected in parallel with its counterpart, a P-type V-I converter cell, to achieve common-mode (CM) rail-to-rail operation. Two maximum-current selecting circuits and an output current subtraction circuit are utilized to generate constant-g/sub m/ output currents for this OTA. This fifth-order elliptic low-pass GM-C filter operates at a supply voltage of 3 V and has a cutoff frequency of 280 to 405 kHz. It provides up to 700 mV/sub pp/ output with 1% total harmonic distortion (THD), dissipates 2.48 mW at V/sub cm/=1.5 V, and occupies 1.62 mm/sup 2/ in a 1.2-/spl mu/m CMOS technology.

Universal current-mode filter with reduced number of active and passive components

Abstract: A new current-mode (CM) universal active filter with single-input and three-outputs (SITO) employing only four CCIIs and a minimum number of passive components is presented. The proposed filter based on an RLC shunt circuit, has a good sensitivity performance and achieves the desired filter characteristics without any component matching.

Video line rate vertical scaler

Abstract: For conversion of component (VGA) video to television, a hardware efficient process implements line rate vertical scaling within a single integrated circuit without the support of external memory. Scaling and filtering are combined into a single process which is a polyphase filter. The polyphase filter is a low pass filter with a fixed cut off frequency and a programmable delay. By changing the coefficients of the kernel of the polyphase filter, the scaled video signal is time shifted by fractions of the pixel clock. In one example, for every nine incoming horizontal video scan lines, eight lines are outputted thus accomplishing the vertical scaling. The vertical scaling may include a field buffer memory for accommodating a range of incoming video refresh rates, or in concert with special timing of incoming video, may omit the field buffer memory and instead use a one or two line FIFO memory.

Power line harmonic reduction by hybrid parallel active/passive filter system with square wave inverter and DC bus control

Abstract: A hybrid parallel active/passive filter system (30) is provided which provides line power harmonic isolation and compensation for power systems connected to high power non-linear loads (38). The hybrid filter (30) includes a passive filter (50, 52) connected in series with an active filter inverter (54, 56). The active filter inverter (54, 56) is controlled to generate inverter voltages such that the filter terminal voltage tracks the supply voltage harmonics at a selected dominant harmonic frequency to regulate the supply current harmonics to zero. A synchronous reference frame (SRF) based controller is used to generate harmonic inverter voltage commands based on measured supply current values. A feed forward command signal generator may be used to improve the response of the control system. The active filter inverter (54, 56) is preferably implemented as a square-wave inverter. The active filter inverter DC bus is controlled to achieve power balancing and to provide real power to compensate for losses of the inverter.

Audio sample-rate conversion using a linear-interpolation stage with a multi-tap low-pass filter requiring reduced coefficient storage

Abstract: Audio sample rates are converted by an arbitrary ratio of Q/P using a two-stage sample-rate converter. One stage is an L-tap low-pass finite-impulse-response (FIR) filter, while the other stage is a linear interpolator. Coefficient storage for the L-tap low-pass FIR filter is dramatically reduced by reducing the effective P factor. The effective P factor is reduced by using two stages, with each stage adjusting the sampling rate by a different ratio. A first stage adjusts the sampling rate by Q0/P0, while a second stage further adjusts the sampling rate by Q1/P1. Q0 and P0 are large integers of about 400 to 700 that differ by one or three; thus the ratio Q0/P0 is very close to one. The linear interpolator stage eliminates or adds one or three samples and smoothes the samples by linear interpolation over the 400 to 700 remaining samples. The FIR filter stage adjusts the sample rate by a ratio of Q1/P1, which is approximately but not exactly Q/P. The FIR filter smoothes the expanded or reduced samples using weighting coefficients. Only P1 sets of coefficients are stored, rather than P sets. Since P1 is only about 10, while P is 400 to 700, coefficient storage is dramatically reduced.

WLS design of variable frequency response FIR filters

Abstract: This paper extends the Weighted Least Squares method to designing FIR filters capable of changing, in the real-time, one of their frequency response characteristics (group delay, the width of the passband, resonance frequency or any other). The filter coefficients are polynomial functions of the parameter characterising the variable feature. The computations needed in such designs can be kept at low level if the weight function in the performance criterion is separable. The advantages of the proposed approach are illustrated by a design of a Fractional Sample Delay filter with variable delay. If this filter has to meet demanding specifications then the proposed approach provides a cheaper and more effective solution than traditional approaches based on Lagrange interpolation.

Phase-locked loop with protected output during instances when the phase-locked loop is unlocked

Abstract: A circuit is provided for controlling or regulating a phase-locked loop (PLL) output during times when the PLL is unlocked. Noise or corruption on the input signal of the PLL may cause the PLL output frequency to suddenly rise to match the input signal frequency. In many instances, the noise or corruption cannot be filtered by the low pass filter within the PLL. A detection circuit is coupled to receive the input signal, and discern times in which non-filterable noise occurs. The detection circuit may include a decoder which decodes, e.g., error correction coding within the input signal data stream to indicate possible instances in which the PLL will unlock. Once the detection circuit indicates an unlock condition and forwards an unlock selection signal to a multiplexer, the multiplexer chooses a frequency divided clocking signal rather than the PLL output clocking signal. The frequency divided clocking signal transitions at a rate acceptable to a digital processor, while the PLL output clocking signal during an unlock state is not acceptable. Thus, the digital processor can maintain its operating state during times when the PLL clocking signal exceeds the processor maximum operation frequency.

A Shunt Active Power Filter Applied to High Voltage Distribution Lines

Abstract: The high requirement of rated power of an active power filter leads to high costs and limits the range of operation especially for high voltage applications. To overcome these problems, a combined system of a passive filter, using only one LC filter tuned to the lowest typical line current harmonic, and a shunt active power filter, sharing the filter capacitor to be decoupled from the fundamental line voltage, is proposed. These features strongly decrease the rated power of the active filter which is controlled only to suppress the harmonics of higher order and to eliminate resonance effects between the line impedance and the passive filter.

A comb filter design using fractional-sample delay

Abstract: In this paper, a new comb filter design method using fractional sample delay is presented. First, the specification of the comb filter design is transformed into that of fractional delay filter design. Then, conventional FIR and allpass filter design techniques are directly applied to design fractional delay filter with transformed specification. Next, we develop a constrained fractional delay filter design approach to improve the performance of the direct design method. Finally, several design examples are demonstrated to illustrate the effectiveness of this new design approach.

A programmable loop filter for carrier recovery in a radio receiver

Abstract: A digital loop filter in the carrier-recovery loop of a digital communications receiver. The recovery loop is a PLL that keeps the receiver oscillator locked to the carrier wave, and the loop filter provides control over the PLL's frequency response by conditioning an error signal that is fed back to the receiver oscillator. In the present invention, the error signal is a digital signal, and the loop filter is implemented in digital hardward. With this implementation the characteristics of the loop filter are determined by logic design rather than by physical features of analog components, thereby giving this filter a more precise function than one with analog integrators. This implementation is also immune to the low tolerances typical of the manufacturing process for analog devices (especially on monolithic circuits), and is more easily adjusted than its analog counterparts. Two gain coefficients characterize the loop filter in the present invention. These gain coefficients are chosen to be powers of two, simplifying the process of multiplying them with the digital error signal. The gain coefficients are read from a memory, making the loop filter easily programmable. By changing the gain coefficients during operation of the receiver, the carrier-recovery loop can be placed in one of the several operating modes, including acquisition, tracking, and hold. The receiver can be configured with the appropriate values of the gain coefficients for each operating mode during the initial assembly and during subsequent reconfigurations.

Universal three input and one output current-mode filter without external passive elements

Abstract: A new current-mode universal filter is proposed. The filter uses only operational amplifiers and operational transconductance amplifiers (OTAs) and can realise lowpass, highpass, bandpass, notch and allpass responses without changing circuit topology. The parameters /spl omega//sub 0/, /spl omega//sub 0//Q/sub 0/, and the gain can be electronically tuned by adjusting the bias currents of the OTAs. The proposed circuit has low sensitivity.

Noninteracting electronically tunable CCII-based current-mode biquadratic filters

Abstract: A complete state variable biquadratic filter built by CCIIs with variable current gain is presented and analysed. All the coefficients of the filter can be independently tuned through the variable current gain factors of the current conveyors. The authors propose fundamental techniques for the circuit implementation of the filter from the state variable block diagram. Design criteria to minimise the influence of the current conveyors' parasitic elements on the filter performance are presented. Based on the principles upon which the general biquadratic filter was constructed, a universal filter is proposed which implements the low-pass, high-pass, band-pass, band-reject and all-pass second order transfer functions simultaneously. Experimental measurements using Senani's current conveyor as well as PSPICE simulation using Surakampontorn's CCII were very close to theoretical values.

Pulse modulation power amplifier with enhanced cascade control method

Abstract: A digital switching power amplifier with Multivariable Enhanced Cascade Controlled (MECC) includes a modulator, a switching power stage and a low pass filter. In the first preferred embodiment an enhanced cascade control structure local to the switching power stage is added, characterised by having a single local feedback path A (7) with a lowpass characteristic and local forward blocks B1 or B (3, 4). The leads to a much improved system with a very low sensitivity to errors in the switching power stage. In the second preferred embodiment of the invention the control structure is extended with a global structure composed of a single feed-back path C (8) and forward paths blocks D1 or D (1, 2). This provides further improvements and a very low sensitivity to load variations and filter errors. Both MECC embodiments are characterised by being simple in implementation, stable and extendible by adding/removing simple local (3) or global (1) forward path blocks. A third embodiment of the invention is a controlled self-oscillating pulse modulator, characterised by first a non-hysteresis comparator as modulator and second by a higher order oscillating loop realised in both forward path B1 and feedback path A to determine stable self-oscillating conditions. An implemented 250W example MECC digital power amplifier has proven superior performance in terms of audio performance (0.005 % distortion, 115 dB dynamic range) and efficiency (92 %).