Showing papers on "Optical proximity correction published in 2004"

Method for improving optical proximity correction

Abstract: A method for performing model based optical proximity correction (MBOPC) and a system for performing MBOPC is described, wherein the process model is decomposed into a constant process model term and a pattern dependent portion. The desired wafer target is modified by the constant process model term to form a simulation target that is used as the new target within the MBOPC process. The pattern dependent portion of the model is used as the process model in the MBOPC algorithm. This results final mask designs that result in improved across-chip line width variations, and a more robust MBOPC process.

Toward a methodology for manufacturability-driven design rule exploration

Abstract: Resolution enhancement techniques (RET) such as optical proximity correction (OPC) and phase-shift mask (PSM) technology are deployed in modern processes to increase the fidelity of printed features, especially critical dimensions (CD) in polysilicon. Even given these exotic technologies, there has been momentum towards less flexibility in layout, in order to ensure printability. However, there has not been a systematic study of the performance and manufacturability impact of such a move towards restrictive design rules. In this paper we present a design flow that evaluates the application of various restricted design rule (RDR) sets in deep submicron ASIC designs in terms of circuit performance and parametric yield. Using such a framework, process and design engineers can identify potential solutions to maximize manufacturability by selectively applying RDRs while maintaining chip performance. In this work we focus attention on the device layer which is the most difficult design layer to manufacture. We quantify the performance, manufacturability and mask cost impact of several common design rules. For instance, we find that small increal3es in the minimum allowable poly line end extension beyond active provide high levels of immunity to lithographic defocus conditions. Also, modification of the minimum field poly to diffusion spacing can provide good manufacturability, while a single pitch single orientation design rule can reduce gate 30σ uncertainty. Both of these improve in data volume as well, with little to no performance penalties. Reductions in data volume and worst-case edge placement error are on the order of 20-30% and 30-50% respectively compared to a standard baseline design rule set.

Proximity effect in electron beam lithography

Abstract: Proximity effect is the most severe factor that influences the exposure resolution of electron beam. In this paper, the mechanism of proximity effect is discussed through Monte Carlo simulation of the electron scattering processes. And effective approaches of proximity effect correction are proposed. The theoretical results of Monte Carlo simulation and experimental results show that proximity effect is determined by many factors, in addition to the shape, size and packing density of patterns, proximity effect is also dependent on processes conditions. Only on the basis of optimizing the processes conditions and mask design, the expectant purpose of proximity effect correction by software can be achieved. Proximity effect is effectively reduced through improving mask design, optimizing processes conditions and utilizing proximity effect correction software.

Optical proximity correction method

Abstract: An integrated circuit layout includes dense figures and at least one isolated figure. A plurality of dummy patterns are formed to surround the isolated figure, so as to reduce the difference in pattern density of the integrated circuit layout. A transmitted light of the dummy patterns provides a phase difference of 0 or 180 degrees relative to a transmitted light of the integrated circuit layout. The integrated circuit layout and the plurality of dummy patterns are formed on a photo-mask.

Backend CAD flows for "restrictive design rules"

Abstract: To meet challenges of deep-subwavelength technologies (particularly 130 nm and following), lithography has come to rely increasingly on data processes such as shape fill, optical proximity correction, and RETs like altPSM. For emerging technologies (65 nm and following) the computation cost and complexity of these techniques are themselves becoming bottlenecks in the design-silicon flow. This has motivated the recent calls for restrictive design rules such as fixed width/pitch/orientation of gate-forming polysilicon features. We have been exploring how design might take advantage of these restrictions, and present some preliminary ideas for how we might reduce the computational cost throughout the back end of the design flow through the post-tapeout data processes while improving quality of results: the reliability of OPC/RET algorithms and the accuracy of models of manufactured products. We also believe that the underlying technology, including simulation and analysis, may be applicable to a variety of approaches to design for manufacturability (DFM).

Optical proximity correction (OPC)-friendly maze routing

Abstract: As the technology migrates into the deep submicron manufacturing(DSM) era, the critical dimension of the circuits is getting smaller than the lithographic wavelength. The unavoidable light diffraction phenomena in the sub-wavelength technologies have become one of the major factors in the yield rate. Optical proximity correction (OPC) is one of the methods adopted to compensate for the light diffraction effect as a post layout process.However, the process is time-consuming and the results are still limited by the original layout quality. In this paper, we propose a maze routing method that considers the optical effect in the routing algorithm. By utilizing the symmetrical property of the optical system, the light diffraction is efficiently calculated and stored in tables. The costs that guide the router to minimize the optical interferences are obtained from these look-up tables. The problem is first formulated as a constrained maze routing problem, then it is shown to be a multiple constrained shortest path problem. Based on the Lagrangian relaxation method, an effective algorithm is designed to solve the problem.

Fast model-based optical proximity correction

Abstract: An efficient method and system is provided for computing lithographic images that takes into account vector effects such as lens birefringence, resist stack effects and tailored source polarizations, and may also include blur effects of the mask and the resist. These effects are included by forming a generalized bilinear kernel, which is independent of the mask transmission function, which can then be treated using a decomposition to allow rapid computation of an image that includes such non-scalar effects. Dominant eigenfunctions of the generalized bilinear kernel can be used to pre-compute convolutions with possible polygon sectors. A mask transmission function can then be decomposed into polygon sectors, and weighted pre-images may be formed from a coherent sum of the pre-computed convolutions for the appropriate mask polygon sectors. The image at a point may be formed from the incoherent sum of the weighted pre-images over all of the dominant eigenfunctions of the generalized bilinear kernel. The resulting image can then be used to perform model-based optical proximity correction (MBOPC).

Fast proximity correction with zone sampling

Abstract: Proximity effects cause integrated circuit features to be distorted when compared to the original mask pattern. These effects are becoming widely recognized as serious barriers to achieving effective half-micrometer and smaller wafer lithography processes. A promising remedy for proximity effects is to adjust mask feature shapes to compensate for predictable distortions in the wafer lithography process. Proximity effects are systematic -- the effects on a pattern repeat when printed with the same equipment under the same process conditions. Predicting proximity distortions is a non-trivial problem. The distortions are functions of the size and shape of each feature as well as the sizes, shapes, and spacings of nearby features. Imaging characteristics of the exposure tool, resist and etch characteristics, and effects from the underlying substrate all contribute to wafer feature distortions. We present a general method for computing proximity-corrected shapes. A technique we call "zone sampling" provides accurate models of proximity behaviors with optimum computational efficiency. Proximity behavior for arbitrary layout configurations is derived from two-dimensional density measurements (zone samples) computed from IC layout pattern data. Zone sampling provides a complete "behavior model" of combined, non-linear proximity effects, including optical, process, and underlying substrate mechanisms.

Automated optical proximity correction: a rules-based approach

Abstract: In this work we demonstrate the power, speed and effectiveness of an automated rules-based approach for performing optical proximity correction. The approach applies to both conventional and phase-shifting mask layouts for optical lithography. Complex imaging, substrate and process phenomena can be folded into comparatively few rules parameters. Using simple arithmetic, these parameters pre-compensate the layout for the combined proximity effects. The rules consist of edge rules and corner rules for biasing feature edges and for adding sub-resolution assist features. This paper describes an integrated solution which includes rules parameter generation and fast, hierarchical rules application. Experimental results demonstrate improved edge placements and wider process latitude than for non-corrected layouts.

Method and apparatus for providing optical proximity features to a reticle pattern for deep sub-wavelength optical lithography

Abstract: A method of generating a mask design having optical proximity correction features disposed therein. The methods includes the steps of obtaining a desired target pattern having features to be imaged on a substrate; determining an interference map based on the target pattern, the interference map defining areas of constructive interference and areas of destructive interference between at least one of the features to be imaged and a field area adjacent the at least one feature; and placing assist features in the mask design based on the areas of constructive interference and the areas of destructive interference.

Method utilizing compensation features in semiconductor processing

Abstract: A photolithography and etch process sequence includes a photomask having a pattern with compensation features that alleviate patterning variations due to the proximity effect and depth of focus concerns during photolithography. The compensation features may be disposed near isolated or outermost lines of a device pattern. A photoresist pattern is formed to include the compensation features and the pattern etched to form a corresponding etched pattern including the compensation features. After etching, a protection material is formed over the layer and a trim mask is used to form a further photoresist pattern over the protection material. A subsequent etching pattern etches the protection material and removes the compensation features and results in the device lines being formed unaffected by proximity effects. Flare dummies may additionally be added to the mask pattern to increase pattern density and assist in endpoint detection. Flare dummies, like the compensation features, are subsequently removed by a photolithography and etching process sequence.

Mask data preparation

Abstract: The manufacturing of integrated circuits relies on the use of optical proximity correction (OPC) to correct the printing of the features on the wafer. The data is subsequently fractured to accommodate the format of existing mask writer. The complexity of the correction after OPC can create some issues for vector-scan e-beam mask writing tools as very small slivers are created when the data is converted to the mask write tool format. Moreover the number of shapes created after fracturing is quite large and are not related to some important characteristics of the layout like for example critical areas. A new technique is proposed where the order of the OPC and fracturing steps is reversed. The fracturing step is done first in order to guarantee that no slivers are created and that the number of shapes is minimized. The shapes created can also follow the edges of critical zones so that critical and non-critical edges can be differentiated during the subsequent OPC step.

Optimization of sub-100-nm designs for mask cost reduction

Abstract: For sub-100 nm integrated circuit (IC) technologies, many of the factors that affect the cost of photomasks, the cost of material, of the writing process, of the develop/etch process, and of inspection, are increasing by an order of magnitude per generation. In order to mitigate the impact of that increase on the return on investment of new IC products, mask shop deliverables such as yield or alignment with technology requirements need to reach new quality. This work focuses on cost containment of the mask by optimally utilizing existing reticle technology to meet device requirements at the product level. We first compare the increase of mask cost with that of other manufacturing equipment categories, and discuss their dependence on layer properties and how to control increasing costs. We then propose use of a new procedure called integrated simulation (optical combined with electrical) to estimate the impact of the mask critical dimension (CD) budget on transistor performance on the local scale (cell level) and global scale (die level). In the process, at the cell level, simulated aerial images of metal-oxide-semiconductor field-effect transistor channels are used to evaluate the parametric data dependence on the optical proximity effects and correction features at the mask grade assumed. At the die level, statistical distribution of device parameters in the die is derived to estimate the parametric yield impacted by mask CD variation. We also discuss how integrated simulation can help in resolving other challenges of advanced reticle manufacturing such as qualification of masks or the generation of dummy patterns.

Method and apparatus for performing model based placement of phase-balanced scattering bars for sub-wavelength optical lithography

Abstract: A method of generating a mask design having optical proximity correction features disposed therein. The methods includes the steps of obtaining a desired target pattern having features to be imaged on a substrate; determining a first interference map based on the target pattern, which defines areas of constructive interference between at least one of the features to be imaged and a field area adjacent the at least one feature; placing a first set of assist features having a first phase in the mask design based on the areas of constructive interference defined by the first interference map; determining a second interference map based on the first set of assist features, which defines areas of constructive interference between assist features of the first set of assist features and a field area adjacent at least one of the assist features of the first set of assist features; and placing a second set of assist features having a second phase in the mask design based on the areas of constructive interference defined by the second interference map, wherein the first phase does not equal the second phase.

Effective proximity effect correction methodology

Abstract: The invention describes a methodology based on the interpolation (503) of the correction (501 and 502) between selected evaluation points (505 and 506) of the target layout (504). By connecting the correction points this technique provides a means of reducing data volume and simplifying the mask writing, inspection and repair process. The same methodology can be applied to layouts with non-printing features, where the correction is based on the quality of the image of the main feature. For vector-scan mask writing tools the segments interpolating the corrections can be fractured in segments suitable with angles.

Fast calculation of images for high numerical aperture lithography

Abstract: Many hitherto small effects will become numerically significant in lithography at 70nm and below. The simple assumptions of scalar imaging and uniformly-polarized sources will no longer be tenable. Contrast losses in the resist (e.g. by diffusion) will become appreciable. In addition, the elements of 157nm lenses will be intrinsically polarizing due to spatial dispersion in CaF2, and in general lenses will exhibit residual polarization aberrations. We show here that these effects can be accounted for in a fast "sum-of-coherent-systems" (SOCS) algorithm that is suitable for model-based optical proximity correction (MBOPC). First, we cast the classic equations of vector image formation in a new form that explicitly distinguishes scalar and vector field terms. Lens birefringence is then added to the model; in doing so we take into account the classic phenomenon of double refraction, wherein a given ray splits into two rays each time it passes through an element. In principle, each incident ray then gives rise to an extended family of rays in the exit pupil. However, we show that this coherent set of rays can be merged into a single plane-wave component of the image, allowing a Jones matrix pupil to be defined. Once the vector imaging equations are modified to accommodate customized polarization distributions in the source as well as matrix pupils in the lens, we show that tractable SOCS kernels can be obtained under a generalization of the thin-mask approximation. Such models can be extended to include non-optical effects like resist blur, along with empirical modeling terms. We also discuss computational efficiencies that can be achieved when calculating SOCS kernels, for example by iteratively refining kernels calculated from a reduced basis, and by exploiting system symmetry (radial, dipole, or quadrupole).

Method of verifying an optical proximity correction (OPC) model

Abstract: A method verifying an optical proximity correction (OPC) model is disclosed. The method can include correcting a test pattern having a plurality of structures and extracting critical dimension (CD) values from a corrected output file for layout locations corresponding to a plurality of selected structures of the test pattern. A data set from the extracted CD values can be developed where the data set is indicative of corrected test pattern CD versus pitch for at least one target CD. Also disclosed is a method of collecting wafer test measurement data.

Two threshold resist models for optical proximity correction

Abstract: There have been several kinds of resist model proposed for optical proximity correction. The simplest one is the constant threshold resist model. By this method, only area with intensity above a certain threshold value would be developed. Unfortunately, the constant threshold resist model is too simplified to accurately describe the entire resist processes. To solve this problem, variable threshold resist models were proposed thereafter. The printed resist edge is characterized in terms of the aerial image properties, such as intensity, intensity slope and so forth. More parameters and freedoms are required to describe the complicated chemical reactions of the resist during exposure and development processes. However, the computation time for OPC would increase significantly due to the supplementary calculation of the extra aerial image properties. In this paper, the dual model of constant threshold was proposed to enhance the accuracy of constant threshold resist models. Two constant threshold resist models were determined by model fitting process based on different types of pattern structures. During the correction, one-dimensional and two-dimensional edges are identified first and different constant-threshold models were applied for simulation. Good corrections on both of the one-dimensional line/space widths and two-dimensional line-ends could be achieved. The simulation results were also compared with experimental data.

Method of developing optimized optical proximity correction (OPC) fragmentation script for photolithographic processing

Abstract: A method for developing an optimized layout fragmentation script for an optical proximity correction (OPC) simulation tool. A test pattern layout having at least one structure representing a portion of the integrated circuit layout is provided. Optical proximity correction is iteratively conducted on the test pattern layout for each desired permutation of at least one fragmentation parameter associated with the test pattern layout and, for each permutation, a corrected test pattern layout is generated. A printed simulation of each corrected test pattern layout is made and analyzed to select one of the permutations of the at least one fragmentation parameter to apply to a integrated circuit layout prior to correction with the OPC simulation tool.

Proximity effects and influences of nonuniform illumination in projection lithography

Abstract: The change in the size of a feature due to the proximity of large features is explored experimentally and theoretically, and the effects of nonuniform light source intensity are examined theoretically. For proximity effects, a test mask was designed to provide test patterns for two different systems: the Perkin-Elmer "Micralign" model 220 and the Canon FPA-141 4x reduction projection printer. The mask consists of isolated features of various widths which pass parallel to large features at various spacings. Exposures made on the Perkin-Elmer showed proximity effects dependent on the amount of partial coherence present in the light. For relatively incoherent light, proximity effects are intuitive and cause linewidth and spacewidth changes for small features. For relatively coherent light, the proximity effects can be counterintuitive in that the width of a small feature can be reduced due to the presence of adjacent features. Proximity effects are particularly significant for small geometries in the range of 0.5w/(NA) and below, where w is the wavelength. Some mask design guidelines are offered, suggesting that better overall image quality may be obtained not with coherent illumination, but with a partial coherence factor of about 0.5. Several types of condenser aperture illumination sources are explored. Central obscuration is shown to be disadvantageous for traditional optical lithography where the fundamental image spatial frequency is below that of coherent cutoff. A four spot Gaussian source is shown to give image quality similar to that of a uniform source of the same diameter. It is shown that source asymmetry cannot contribute asymmetrical resist profiles in a diffraction limited system, and thus any resist asymmetry must be attributed to proximity effects.

Impact of measured pupil illumination fill distribution on lithography simulation and OPC models

Abstract: Increasing miniaturization and decreasing k1 factors impose continuously growing demands on optical lithography. These requirements are reflected in the need for increasingly accurate lithography simulations, which are prerequisite for successful optical proximity correction (OPC) of the mask layout. Therefore, the physical conditions of the lithography tools and their impact on the resulting printed image have to be carefully considered. The illumination distribution in scanners and steppers is commonly simplified by a top-hat (rectangular cross-section) function. The illuminator is therefore assumed to consist of either completely dark or homogeneously bright areas. In this paper, we investigate the effect of using the measured source, which can deviate significantly from a simple top-hat function, on simulation results and OPC treatment. We compare simulations with measurement and show that there are cases where significant improvements occur by using the real source distribution.

A multi-objective floorplanner for shuttle mask optimization

Abstract: Shrinkage of VLSI feature size and use of advanced Reticle Enhancement Technologies (RET) in manufacturing such as OPC and PSM have dramatically pushed up cost of mask. For example of a 130nm or 90nm mask set, the mask cost can easily reach one or two million US dollars. Shuttle mask is an effective method to share the mask cost by putting different chips on the same mask. Shuttle mask floorplanning is a key step to pack these chips according to certain objectives and constraints related to cost, yield, and manufacturability. In this paper, we present a simulated annealing based floorplanner to solve the shuttle mask floorplanning problem with multiple optimization objectives and constraints. We will consider area minimization, density optimization (for manufacturability enhancement with CMP), wafer utilization maximization, die-to-die inspection constraint, die orientation constraint and their combinations. A nice property of our floorplanner is that it can be easily adapted to different cost models of mask and wafer manufacturing. Experiments on industry data show promising results.

Methods of forming patterned reticles

Abstract: The invention includes methods of forming patterned reticles. Design features can be introduced into a layout for a reticle prior to optical proximity correction, and then removed prior to taping a pattern onto the reticle. Design features can alternatively, or additionally, be introduced after optical proximity correction and asymmetrically relative to one or more parts of a reticle pattern. The introduced features can subsequently be taped to the reticle as part of the formation of the patterned reticle.

Method of checking optical proximity correction data

Abstract: A method of inspecting full-chip mask data to locate layout pattern design induced defects and weak points that cause functional failure or performance degradation for integrated circuits (ICs) manufactured in subwavelength technology. Given the pre-OPC integrated circuit design layout data, the method of present invention refers to available post-OPC data or generates post-OPC data condition to do the inspection based on the modeling of integrated circuit wafer patterning. Build-in direct checks of specified electrical functional defects and a multilayer pattern-centric approach are used to improve the accuracy and performance. A technique of adaptive search is used to speed up the critical dimension search during the process of optical proximity correction data verification. A defect synthesis capability is supplied for defect disposition to facilitate systematic correction and prevention of the defects in integrated circuit layout design.

System and method for automatic generation of optical proximity correction (OPC) rule sets

Abstract: A method of automatically creating and/or optimizing an optical proximity correction (OPC) rule set can include providing an initial OPC rule set and applying the initial OPC rule set to a layout data set to generate a corrected layout data set. The corrected data set can be simulated and optical rule checking (ORC) can be performed. Based on the simulation and ORC, it can be determined whether residual edge placement errors are present within the corrected layout data set and whether the residual errors lie outside specified limits. If residual edge placement errors are present within the corrected layout data set or lie outside of specified limits, existing OPC rules can be modified and/or new OPC rules can be added to the initial OPC rule set to correct the residual edge placement errors.

Yield-enhanced layout generation by new design for manufacturability (DfM) flow

Abstract: Design for manufacturability ( DfM ) flow consisting of a new lithography design approach at the design rule definition stage and manufacturability check at physical layout stage is proposed to clean up hot spots and guarantee the final layouts to be free of hot spots under low-k1 lithography condition. At the initial development stage, design rules ( DRs ), resolution enhancement technique ( RET ) and optical proximity correction ( OPC ) methods and critical dimension ( CD ) target and specification are determined by the new lithography design approach to reduce hot spots next-generation’s tentative layout made by the compactor. At the physical layout stage, a manufacturability check ( MC ) is essential to wipe out hot spots resulted from immaturity of DRs and process parameters fixed at the initial development stage by making three feedback approaches: the refinement of design rule, the repair of hot spots by designers and the refinement of OPC parameters and/or methods. Also, an alternative of layout modification or OPC improvement for cleaning hot spots are cleared by categorization of CD variation induced by some dose and focus conditions and an error of CD average for the target pattern. The proposed DfM flow is found to be highly effective for the robust pattern formation under the low-k1 lithography condition.

Fast and accurate optical proximity correction engine for incorporating long range flare effects

Abstract: A method is described for performing model-based optical proximity corrections on a mask layout used in an optical lithography process having a plurality of mask shapes. Model-based optical proximity correction is performed by computing the image intensity on selected evaluation points on the mask layout. The image intensity to be computed includes optical flare and stray light effects due to the interactions between the shapes on the mask layout. The computation of the image intensity involves sub-dividing the mask layout into a plurality of regions, each region at an increasing distance from the evaluation point. The contributions of the optical flare and stray light effects due to mask shapes in each of the regions are then determined. Finally, all the contributions thus obtained are combined to obtain the final computation of the image intensity at the selected point.

Method and system for reducing the impact of across-wafer variations on critical dimension measurements

Abstract: First and second exposures of a mask onto a wafer are performed such that the exposure field of the second exposure partially overlaps the exposure field of the first exposure. A characteristic of a set of features is determined, and a value of a parameter of an optical proximity correction model is determined. An alignment feature can be used to align a measurement tool. In yet another embodiment, pupil intensity distribution of an imaging system is measured by exposing an image field of a radiation detector with a bright feature, positioning the detector at a distance away from the image plane, and exposing the image field of the detector with a bright feature, resulting in a cumulative exposure of the image field of the detector from the two exposures. A characteristic of a spatial pattern in the cumulative exposure of the image field of the detector is then determined.

Method and apparatus for expediting convergence in model-based OPC

Abstract: One embodiment of the invention provides a system that expedites or stabilizes convergence in a model-based optical proximity correction (OPC) process. During operation, the system receives a layout for an integrated circuit. Next, the system dissects shapes in the layout into a number of segments, and then runs a number of OPC iterations on the segments to produce an OPC-corrected layout. During each OPC iteration, the system calculates a chrome shift for each segment based on a current layout obtained from the previous iteration, wherein the chrome shift for a segment is measured from the previous position of the chrome edge in that segment. The system then calculates an adjusted chrome shift for each segment based on the newly calculated chrome shift and chrome shift values obtained in one or more previous iterations. Next, the system applies the adjusted chrome shift values to the current layout to obtain an updated layout.

Effect of mask pattern correction for off-axis incident light in extreme ultraviolet lithography

Abstract: The effect of mask pattern correction for off-axis incident light on the pattern fidelity of a model pattern with 22nm wide lines and spaces was investigated. Corrections were made to the edges of mask patterns, because off-axis incident light produces an asymmetric aerial image. The corrections were found to compensate effectively for the degradation in pattern fidelity due to the influence of off-axis incident light and optical proximity effects. Off-axis incident light causes asymmetry in the positions of pattern edges, the mask error enhancement factor, and pattern edge contrast, even when a symmetric mask pattern layout is designed. It was found that these asymmetries could be suppressed by employing thin buffer and absorber films and a large numerical aperature of projection optics.