Showing papers on "Power MOSFET published in 2002"

SiC power-switching devices-the second electronics revolution?

Abstract: Silicon carbide (SiC) offers significant advantages for power-switching devices because the critical field for avalanche breakdown is about ten times higher than in silicon. SiC power devices have made remarkable progress in the past five years, demonstrating currents in excess of 100 A and blocking voltages in excess of 19000 V. In this paper we describe the latest progress in three classes of SiC devices: diodes (p-i-n and Schottky), transistors (junction field-effect transistor, metal-oxide-semiconductor field-effect transistor, and bipolar junction transistor), and thyristors (gate turn-off).

Dual trench power MOSFET

Abstract: In accordance with an embodiment of the present invention, a MOSFET includes a first semiconductor region of a first conductivity type, a gate trench which extends into the first semiconductor region, and a source trench which extends into the first semiconductor region. The source trench is laterally spaced from the gate trench.

Manufacturing of high aspect-ratio p-n junctions using vapor phase doping for application in multi-Resurf devices

Abstract: A new technique to manufacture vertical Resurf devices is presented, in which the alternating p-n junctions in the drift region are formed by a combination of trench etching and vapor phase doping (VPD). Scanning capacitance microscopy (SCM) was performed to investigate these deep p-n junctions, showing a uniform doping profile along the full depth of the devices. Electrical measurements on such Resurf diodes display an increase in breakdown voltage from 30 V to 145 V for a device with a 10 /spl mu/m deep drift region doped at 3.5/spl times/10/sup 16/ cm/sup -3/. Such a concept leads to prediction of a specific on-resistance well below the silicon limit for an equivalent MOSFET.

A new hybrid active power filter (APF) topology

Abstract: In this paper, a new hybrid active power filter topology is presented. A higher-voltage, low-switching frequency insulated gate bipolar transistor (IGBT) inverter and a lower-voltage high-switching frequency metal oxide semiconductor field effect transistor (MOSFET) inverter are used in combination to achieve harmonic current compensation. The function of the IGBT inverter is to support utility fundamental voltage and to compensate for the fundamental reactive power. The MOSFET inverter fulfills the function of harmonic current compensation. To further reduce cost and to simplify control, the IGBT and MOSFET inverters share the same DC-link via a split capacitor bank. With this approach harmonics can be cancelled over a wide frequency range. Compared to the conventional APF topology, the proposed approach employs lower dc-link voltage and generates less noise. Simulation and experimental results show that the proposed active power filter topology is capable of compensating for the load harmonics.

Prediction of IMD in LDMOS transistor amplifiers using a new large-signal model

Abstract: In this paper, the intermodulation distortion (IMD) behavior of LDMOS transistors is treated. First, an analysis is performed to explain measured IMD characteristics in different classes of operation. It is shown that the turn-on region plays an important role in explaining measured IMD behavior, which may also give a clue to the excellent linearity of LDMOS transistors. Thereafter, with this knowledge, a new empirical large-signal model with improved capability of predicting IMD in LDMOS amplifiers is presented. The model is verified against various measurements at low as well as high frequency in a class-AB power amplifier circuit.

A resonant power MOSFET/IGBT gate driver

Abstract: This paper discusses a resonant gate driver that employs a new method of driving a power MOSFET or IGBT. This resonant gate driver recycles the energy stored in the gate capacitance to reduce the CV/sup 2/f losses associated with a conventional gate driver. Reducing the CV/sup 2/f losses reduces the power consumption and hence the subsequent power dissipation in the resonant gate driver. Less power dissipation enables the driver to operate to higher frequencies. In addition, this topology allows the resonant gate driver to drive the MOSFET gate with a much higher peak to peak voltage swing than it is supplied with and to drive the gate negative in its off cycle. The resonant gate driver can drive the gate with a variable frequency and duty cycle, and very fast switching of the power MOSFET is obtained. An introduction into the low loss capacitance driver circuit topology (patent pending) is presented. The design considerations of implementing a practical MOSFET gate driver using this topology are discussed. Practical implications and considerations of using this topology to drive power MOSFETs/IGBTs are briefly put forward. Experimental test circuits and results are then presented.

Smart power ICs : technologies and applications

Abstract: 1 BCD Technologies for Smart Power ICs.- 2 Technologies for High Voltage ICs.- 3 Smart Discrete Technologies.- 4 Dielectric Isolation Technologies and Power ICs.- 5 Power Mosfets Driving Circuits and Protection Techniques.- 6 Motion Control.- 7 Switching Regulators.- 8 High Voltage Integrated Circuits for Off-Line Power Applications.- 9 Automotive Electronics.- 10 Audio Amplifiers.- 11 High Complexity Smart Power Devices and Future Developments.- 12 Modeling, Design and Simulation of Power Electronic Devices and Circuits.- 13 Packaging.- 14 Reliability of Smart Power ICs.

A three-level MOSFET inverter for low power drives

Abstract: This paper proposes operating a three-level neutral-point-clamped (NPC) inverter using a two-level pulsewidth-modulation method. This allows for the clamping diodes to be rated at a fraction of the main switches due to their low average current requirement. The use of a bootstrap charge pump as a low-cost method to obtain the isolated gate drive power supplies is extended for use with the NPC topology. Using this control method and circuits, an inverter based on high-volume, low-cost, low-voltage power MOSFETs is experimentally demonstrated as a possible economic alternative to an insulated-gate-bipolar-transistor-based drive for 120-Vrms-supplied systems.

Low-loss high power RF switching using multifinger AlGaN/GaN MOSHFETs

Abstract: We demonstrate a novel RF switch based on a multifinger AlGaN/GaN MOSHFET. Record high saturation current and breakdown voltage, extremely low gate leakage current and low gate capacitance of the III-N MOSHFETs make them excellent active elements for RF switching. Using a single element test circuit with 1-mm wide multifinger MOSHFET we achieved 0.27 dB insertion loss and more than 40 dB isolation. These parameters can be further improved by impedance matching and by using submicron gate devices. The maximum switching power extrapolated from the results for 1A/mm 100 /spl mu/m wide device exceeds 40 W for a 1-mm wide 2-A/mm MOSHFET.

Semiconductor device and manufacturing method thereof

Abstract: PROBLEM TO BE SOLVED: To provide a power MOSFET for an amplifier device which is satisfactory in output power characteristics and high-frequency characteristics. SOLUTION: Related to the power MOSFET, a shield conductive film 10 of the same electric potential as a source is provided at the upper part of an n-type semiconductor region (drain/offset layer) 8. The shield conductive film 10 and other electrode wirings are arranged in the following order; a drain electrode 15, the shield conductive film 10, a gate electrode 3, a source electrode 13, and a gate-shorting wiring 14. The shield conductive film 10 is formed thinner than the gate electrode 3.

Series-parallel connection of DC-DC converter modules with active sharing of input voltage and load current

Abstract: This paper proposes a novel control strategy, such that equal rating DC-DC power converter modules, can be connected in series at the input side for higher input voltages and in parallel at the output side for higher output currents. Closed-loop control ensures that each module equally shares the total input voltage and the output current. Analytical discussion is confirmed by a laboratory hardware prototype. Such modular converters may find immediate application in working with various utility voltages around the world.

New considerations for MOSFET power clamps

Abstract: Two ESD clamp circuit design techniques have been developed to reduce cell size and to combat the effects of gate leakage that have become significant in recent generations of digital CMOS process technology. Such clamps have proven to be able to withstand HBM stresses of 6kV and CDM pulses of 1.2kV.

A double RESURF LDMOS with drain profile engineering for improved ESD robustness

Abstract: This letter reports a novel 50 V lateral power MOSFET structure that is self-protecting with respect to electrostatic discharge (ESD) strikes. This device features a double RESURF technique in conjunction with a deep drain engineered profile that eliminates soft leakage degradation after snapback, thus demonstrating immunity to filamentation. Maximum second breakdown current (I/sub t2/) of 16 mA//spl mu/m has been realized in a 100 ns transmission line pulse (TLP) measurement even with a higher holding voltage of 20 V. ESD protection level in excess of 5 kV with an equivalent human body model (HBM) has been shown to be feasible for this device without significant compromise in device size.

Power supply with integrated bridge and boost circuit

Abstract: The specification discloses an alternating current to direct current switching power supply, with power factor correction, and having an integrated rectifying bridge and boost circuit that results in the use of fewer power semiconductor devices in the rectification and boosting process. The use of fewer power semiconductor devices translates into a power supply with greater efficiency and/or smaller size. More particularly, the diodes in a rectifying bridge that typically conduct power back to the alternating current power source are paralleled by power MOSFETs, and the boost inductor is coupled between the source and the modified bridge. Charging of the boost inductor takes place through the power MOSFETs, resulting in only a two MOSFET power dissipation. Discharging of the boost inductor (and therefore supplying power not the load) takes place through two diodes, and therefore two forward power losses (as opposed to three diodes and three forward conduction losses associated in the related art). The reduction in internal power dissipation, therefore, results in smaller size and greater efficiency of the switching power supply.

Power MOSFET having enhanced breakdown voltage

Abstract: A MOSFET (100) includes a dielectric, preferably in the form of a metal thick oxide (118) that extends alongside the MOSFET's drift region (104). A voltage across this dielectric between its opposing sides exerts an electric field into the drift region to modulate the drift region electric field distribution so as to increase the breakdown voltage of a reverse biased semiconductor junction between the drift region and body region (108). The voltage is applied to conductive region (120). This allows for higher doping of the drift region, for a given breakdown voltage when compared to conventional MOSFET's. The MOSFET is made by forming opposed vertical trenches in a semiconductor wafer, covering the walls of the trenches with dielectric (118), filling the trenches between the dielectric with conductive material (120), and forming a double diffused MOSFET structure between the pair of opposed vertical trenches such that a drift region abuts the dielectric material (118).

Power mosfet with integrated drivers in a common package

Abstract: A driver stage consisting of an N channel FET and a P channel FET are mounted in the same package as the main power FET. The power FET is mounted on a lead frame and the driver FETs are mounted variously on a separate pad of the lead frame or on the main FET or on the lead frame terminals. All electrodes are interconnected within the package by mounting on common conductive surfaces or by wire bonding. The drivers are connected to define either an inverting or non-inverting drive.

Power MOSFET switching waveforms: an empirical model based on a physical analysis of charge locations

Abstract: This study deals with power MOSFET models Parasitic capacitances are one of the main parameters for dynamic models, and have a critical influence on switching waveforms and switching losses Most classical models consider that these capacitances are only mono-voltage dependent, but these models do not take into account the two (drain and gate) voltage influences on parasitic capacitances values, and consequently on switching behavior Therefore simulation results have not been properly estimated, especially for switching losses This aspect may appear critical for driver design or integration perspectives Moreover, manufacturers' datasheets offer a description of these capacitances out of nominal operation; this kind of data is not sufficient to build an accurate dynamic model of the component In this paper, we show the inadequacy of this kind of model, by referring to a physical structure analysis of charge locations during switching transitions Next, the article presents a new insight based on this approach Firstly, we describe the analytical equations ruling this model with respect to critical voltage changes After an experimental parameter extraction under nominal operation, our empirical model is established and implanted in the PSPICE simulator Its topology allows the modeling of both voltages-depending nonlinear capacitances to be taken into account The complete model is tested on components from various manufacturers, and results are compared with experimental curves This model appears to be more accurate and more reliable than PSPICE or manufacturer original models Consequently, this accuracy in switching waveforms is invaluable for driver design It improves switching losses and EMI predictions, and could be used for optimizing the design of drive circuit (eg in applications such as integrated functions) This aspect appears greatly valuable for manufacturers

Method for fabricating a high voltage power mosfet having a voltage sustaining region that includes doped columns formed by rapid diffusion

Abstract: A method of fabricating a high voltage power MOSFET having a voltage-sustaining region that includes doped columns (410) formed by rapid diffusion. A semiconductor device having a substrate (402), an epitaxial layer (401) and a voltage-sustaining region formed in the epitaxial layer (401), the voltage-sustaining region including columns (410) formed along at least outer sidewalls of a filled trench, the column (410) including first, second and third diffused regions, the first diffused region having a deeper junction depth than the second diffused region and the third diffused region extends from the surface of the epitaxial layer (401) to intersect one of the first and second diffused regions.

Impact of SiC Power Electronic Devices for Hybrid Electric Vehicles

Abstract: The superior properties of silicon carbide (SiC) power electronic devices compared with silicon (Si) are expected to have a significant impact on next-generation vehicles, especially hybrid electric vehicles (HEVs). The system-level benefits of using SiC devices in HEVs include a large reduction in the size, weight, and cost of the power conditioning and/or thermal systems. However, the expected performance characteristics of the various semiconductor devices and the impact that these devices could have in applications are not well understood. Simulation tools have been developed and are demonstrated for SiC devices in relevant transportation applications. These tools have been verified by experimental analysis of SiC diodes and MOSFETs and can be used to assess the impact of expected performance gains in SiC devices and determine areas of greatest impact in HEV systems. INTRODUCTION Presently, almost all of the power electronics converter systems in automotive applications use silicon(Si-) based power semiconductor switches. The performance of these systems is approaching the theoretical limits of the Si fundamental material properties. The emergence of silicon carbide(SiC-) based power semiconductor switches likely will result in substantial improvements in the performance of power electronics converter systems in transportation applications. SiC is a wide-bandgap semiconductor, and SiC-based power switches can be used in electric traction drives and other automotive electrical subsystems with many benefits compared with Si-based switches. In this paper, experimental characteristics of Si and SiC are used to develop a simulation model for SiC power electronics devices. The main objective of developing these simulation tools is to show some of the systemlevel benefits of using SiC devices in HEVs such as the large reduction in the size, weight, and cost of the power conditioning and/or thermal management systems. Temperature-dependent circuit models for SiC diodes and MOSFETs have been developed. Power losses and device temperatures have been computed for a traction drive in HEVs. Temperature and efficiency profiles have been created for the devices for powering a vehicle over an urban driving cycle. The system benefits in using SiC devices are highlighted through simulation and experimental results. At Oak Ridge National Laboratory (ORNL), a SiC power MOSFET is presently being designed. This power device will be used in power electronics converter systems for automotive applications to demonstrate the benefits of SiC-based power devices. One of the selected automotive applications for this project is a traction drive. New gate drive layouts, circuit topologies, and filter requirements will also be developed to take advantage of the special properties of SiC devices. ADVANTAGES OF SiC COMPARED WITH Si As mentioned earlier, SiC is a wide-bandgap semiconductor, and this property of SiC is expected to yield greatly superior power electronics devices once processing and fabrication issues with this material are solved. Some of the advantages of SiC compared with Si based power devices are as follows: 1. SiC-based power devices have higher breakdown voltages (5 to 30 times higher than those of Si) because of their higher electric breakdown field. 2. SiC devices are thinner, and they have lower onresistances. The substantially higher breakdownvoltage for SiC allows higher concentrations of doping and consequently a lower series resistance. For lowbreakdown voltage devices (~50V), SiC unipolar device on-resistances are around 100 times less; and at higher breakdown voltages (~5000V), they are up __________________________________________________ *Prepared by the Oak Ridge National Laboratory, Oak Ridge, Tennessee 37831, managed by UT-Battelle for the U.S. Department of Energy under contract DE-AC05-00OR22725. The submitted manuscript has been authored by a contractor of the U.S. Government under Contract No. DE-AC0500OR22725. Accordingly, the U.S. Government retains a nonexclusive, royalty-free license to publish from the contribution, or allow others to do so, for U.S. Government purposes. to 300 times less [1]. With lower Ron, SiC unipolar power devices have lower conduction losses (Figure 1) and therefore higher overall efficiency. 3. SiC has a higher thermal conductivity and thus a lower junction-to-case thermal resistance, Rth-jc. This means heat is more easily conducted away from the device junction, and thus the device temperature increase is slower. 4. SiC can operate at high temperatures because of its wider bandgap. SiC device operation at up to 600°C is mentioned in the literature [2]. Most Si devices, on the other hand, can operate at a maximum junction temperature of only 150°C. 5. Forward and reverse characteristics of SiC power devices vary only slightly with temperature and time; therefore, SiC devices are more reliable. 6. SiC-based devices have excellent reverse recovery characteristics [3]. With less reverse recovery current, the switching losses and electromagnetic interference (EMI) are reduced and there is less or no need for snubbers. Typical turn-off waveforms of commercial Si and SiC diodes are given in Figure 2. 7. SiC is extremely radiation hard; i.e., radiation does not degrade the electronic properties of SiC. MACHINE AND INVERTER MODELING System level simulation tools have been developed to calculate the conduction and switching losses of the power devices in an inverter used as a motor drive in an HEV. The efficiency of the inverter can then be determined from these losses. The simulation tool is also able to estimate the junction temperature of the power semiconductor devices and recommend an appropriate heatsink size. In this paper, an averaging technique [4] is used to model the power electronics switching losses in an HEV traction drive system. The models are compatible with the Department of Energy’s ADvanced VehIcle SimulatOR (ADVISOR) models. The developed system models use torque and speed values from the ADVISOR simulation to determine the current profile of the system over the Federal Urban Driving Schedule (FUDS). Circuit-level simulation is not practical for this work because the device variables are in microor nanoseconds and the system variables are in 1-second increments. Figure 3 shows the block diagram of the system modeling approach, and Figure 4 shows the three-phase inverter and induction machine for the traction drive system. 300 320 340 360 380 400 420 440 460 480 500 0.01 1

Novel ESD protection structure with embedded SCR LDMOS for smart power technology

Abstract: In this paper, a new robust ESD protection structure has been proposed for smart power technology. By inserting a P+ diffusion into the drain region of 40 V-LDMOS power transistor, the embedded SCR (ESCR-LDMOS) device can be built and without changing any DC I-V characteristics of a 40 V-LDMOS power transistor. It is also found that the method with P+ strap inserted into drain region (N+ in NW) can improve the ESD failure threshold from 1 kV to 6 kV for HBM and from 100 V to 350 V for MM.

Field coupled power MOSFET bus architecture using trench technology

Abstract: A power metal oxide semiconductor-field-effect-transistor (MOSFET) device using trench technology to achieve a reduced-mask-production process. The power MOSFET device includes a gate signal bus having multiple gate trenches formed using fewer masks than previously required for a similar device. The two-dimensional behavior of the trenches provides an advantageous field-coupling effect that suppresses hot-carrier generation without the need for the commonly used thick layer of silicon dioxide beneath the gate polysilicon. The use of easily controlled silicon trench etching in production of the power MOSFET results in stable, low cost, and high yielding manufacturing.

Self-aligned power MOSFET with enhanced base region

Abstract: A power MOSFET transistor is formed on a substrate including a source, body layer, and drain layer and an optional fourth layer for an IGBT. The device is characterized by a conductive gate having a high conductivity metal layer coextensive with a polysilicon layer for high power and high speed operation.

Total-dose and single-event effects in switching DC/DC power converters

Abstract: Total-dose and single-event effects in discrete switching DC/DC power converters are examined using a combination of circuit measurements and simulations. The total-dose experiments focus on the response of the power MOSFET used as the switching element for the converters. The efficiencies of two different types of converters (boost and buck) degrade with increasing total dose, leading to eventual functional failure. The single-event transient response of the converters is determined by the response of the feedback control circuitry. Radiation response is studied using both electrical measurements and simulation techniques, and issues affecting circuit failure are identified.

Power efficient ADSL central office downstream Class G power switch

Abstract: Systems and methods are provided for switching between power supply rail voltages for a differential driver device of a class G amplifier device. The amplifier device employs power MOSFETs to switch between supplying high supply voltages and low supply voltages to the power rails of the differential driver. The class G amplifier can be employed in driving an ADSL signal over a telephone line. A control device ramps the power supply rail voltage between low power supply states and high power supply states to mitigate noise and spikes that can be coupled to the output signal.

Analytical model for thermal instability of low voltage power MOS and SOA in pulse operation

Abstract: Thermal instability presented by some high current power MOS has been shown to limit significantly the SOA capability. In this paper, we present a new analytical model to explain this type of instability in transient operation, based on an analytical formulation for both the positive temperature coefficient of the drain current and for the thermal resistance. The model is capable of predicting the onset of thermal instability for a given device structure and layout, and can be used both to define the allowed SOA of the device and as a design guide to design more rugged devices.

Super junction LDMOST in silicon-on-sapphire technology (SJ-LDMOST)

Abstract: This paper reports on a novel Super Junction LDMOST in SOS technology (SJ-LDMOST) targeting Power Integrated Circuits (PICs) and discusses a CMOS compatible process used in the implementation of the device. The proposed structure uses a simple and practical method to achieve charge compensation between the n and p SJ-pillars and a uniform electric field distribution in the forward blocking mode. 3D device simulations indicate that a significant reduction of the specific on-resistance for a given breakdown voltage can be achieved over conventional RESURF devices using a realistic aspect ratio for the SJ pillars.

An integrated 500-V power DMOSFET/antiparallel rectifier device with improved diode reverse recovery characteristics

Abstract: We propose and demonstrate an integrated power MOSFET structure where a fast-switching antiparallel rectifier with improved reverse recovery is integrated within the conventional DMOSFET structure. In this device, the source metal electrode of the DMOSFET is extended to the n-drift region, and a thin p-layer is implanted under the metal forming a junction diode antiparallel to the DMOSFET. Analysis of the experimental switching performance of the integral diode in 500-V integrated power DMOSFET/antiparallel rectifier devices indicates at least 30% decrease in peak reverse current and minority carrier stored charge at 100/spl deg/C.

A simplified method of generating thermal models for power MOSFETs

Abstract: There is an increasing need for designers to understand the thermal performance of the semiconductors they use because end-product case sizes are shrinking while product power levels remain the same or increase. A simulation tool such as P-SPICE is the most commonly available tool for engineers to use in performing thermal analysis of semiconductors. However, generating the thermal model for power semiconductors represents a major hurdle in performing such an analysis. A simplified method of model generation is needed. In this paper an Excel spreadsheet uses datasheet information published by the manufacturer to generate the R-C (resistance-capacitance) parameters for a thermal model. Implementation of the model in P-SPICE enables performance evaluation for any pre-defined operating condition. The intent is to arrive at a fair estimate of the junction temperature of the power-handling device, the MOSFET, under transient high-power pulse/s. The explanation of a proposed simplified method of thermal model generation includes an example featuring a power MOSFET.

Trench-type MOSFET having a reduced device pitch and on-resistance

Abstract: A trench-type lateral power MOSFET is manufactured by forming an n−-type diffusion region, which will be a drift region, on a p−-type substrate; selectively removing a part of substrate and a part of n−-type diffusion region to form trenches; forming a gate oxide film of 0.05 μm in thickness in each trench; forming a polycrystalline silicon gate layer on gate oxide film; forming a p−-type base region and an n+-type diffusion region, which will be a source region, in the bottom of each trench; and forming an n+-type diffusion region, which will be a drain region, in the surface portion of n−-type diffusion region. The MOSFET has reduced device pitch, a reduced on-resistance per unit area and a simplified manufacturing process